Commit Graph

1166 Commits

Author SHA1 Message Date
Alexander Allen
e5ee501116
Remove redundant breakout mode for SN3800 (#9912) 2022-02-06 12:53:00 +05:30
Aravind Mani
c48e2488c5
[Dell S6100] Addition of 10G ports (#9906) 2022-02-02 17:30:55 +05:30
saksarav-nokia
e7877bf9df
[Nokia][platform] Modified the bcm config file for Nokia-IXR7250E-36x400G (#9622)
Why I did it
Updated the BCM config recommended by Broadcom for Nokia-IXR7250E-36x400G

How I did it
Updated the BCM config file

How to verify it
Verified running the image with this BCM config in Nokia-IXR7250E-36x400G and ensured that the syncd container was stable, ports were up and passing the traffic.

Signed-off-by: Sakthivadivu Saravanaraj <sakthivadivu.saravanaraj@nokia.com>
2022-01-31 09:53:07 -08:00
Andriy Yurkiv
cb3b9416a6
[Mellanox][VXLAN] add params to vxlan.json file in order to configure VXLAN src port range feature (#9658)
- Why I did it
Remove obsolete parameter that enables static VXLAN src port range
provide functionality no generate json config file according to appropriate parameter in config_db
Done for
SN3800:
• Mellanox-SN3800-D28C50
• Mellanox-SN3800-C64
• Mellanox-SN3800-D28C49S1 (New 10G SKU)

SN2700:
• Mellanox-SN2700-D48C8

- How I did it
Remove SAI_VXLAN_SRCPORT_RANGE_ENABLE=1 from appropriate sai.profile files
Created vxlan.json file and added few params that depends on DEVICE_METADATA.localhost.vxlan_port_range

- How to verify it
File /etc/swss/config.d/vxlan.json should be generated inside swss docker when it restart
[
    {
        "SWITCH_TABLE:switch": {
            "vxlan_src": "0xFF00",
            "vxlan_mask": "8"
        },
        "OP": "SET"
    }
]
Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com>
2022-01-31 15:57:30 +02:00
tjchadaga
3bc5053443
Revert "Dell S6100: Addition of SFP ports (#9820)" (#9872)
Master image build break - changes to reviewed and re-merged with appropriate fix
```
====================================================================== 
FAIL: test_buffers_dell6100_render_template (tests.test_j2files.TestJ2Files) 
---------------------------------------------------------------------- 
Traceback (most recent call last): 
File "/sonic/src/sonic-config-engine/tests/test_j2files.py", line 246, in test_buffers_dell6100_render_template 
self._test_buffers_render_template('dell', 'x86_64-dell_s6100_c2538-r0', 'Force10-S6100', 'sample-dell-6100-t0-minigraph.xml', 'buffers.json.j2', 'buffers-dell6100.json') 
File "/sonic/src/sonic-config-engine/tests/test_j2files.py", line 243, in _test_buffers_render_template 
assert filecmp.cmp(sample_output_file, self.output_file) 
AssertionError 
```

This reverts commit 533471231a.
2022-01-27 10:31:28 -08:00
Aravind Mani
533471231a
Dell S6100: Addition of SFP ports (#9820) 2022-01-25 16:12:15 -08:00
vdahiya12
61e9a7683c
[y_cable] Support for initialization of new daemon ycable to support ycables (#9125)
* [y_cable] Support for initialization of new Daemon ycable to support
ycables
This PR also adds the commit in sonic-platform-daemons

94fa239 [y_cable] refactor y_cable to a seperate logic and new daemon from xcvrd (#219)

Why I did it
This PR separates the logic of Y-Cable from xcvrd. Before this change we were utilizing xcvrd daemon to control all aspects of Y-Cable right from initialization to processing requests from other entities like orch,linkmgr.
Now we would have another daemon ycabled which will serve this purpose.
Logically everything still remains the same from the perspective of other daemons.
it also take care aspects like init/delete daemon from Y-Cable perspective.

How I did it
To serve the purpose we build a new wheel sonic_ycabled-1.0-py3-none-any.whl and install it inside pmon.
We also initalize the daemon ycabled which serves our purpose for refactor inside pmon

How to verify it
Ran the changes with an image for dualtor tests on a 7050cx3 platform

Signed-off-by: vaibhav-dahiya <vdahiya@microsoft.com>
2022-01-25 11:10:25 -08:00
Alexander Allen
8a07af95e5
[Mellanox] Modified Platform API to support all firmware updates in single boot (#9608)
Why I did it
Requirements from Microsoft for fwutil update all state that all firmwares which support this upgrade flow must support upgrade within a single boot cycle. This conflicted with a number of Mellanox upgrade flows which have been revised to safely meet this requirement.

How I did it
Added --no-power-cycle flags to SSD and ONIE firmware scripts
Modified Platform API to call firmware upgrade flows with this new flag during fwutil update all
Added a script to our reboot plugin to handle installing firmwares in the correct order with prior to reboot
How to verify it
Populate platform_components.json with firmware for CPLD / BIOS / ONIE / SSD
Execute fwutil update all fw --boot cold
CPLD will burn / ONIE and BIOS images will stage / SSD will schedule for reboot
Reboot the switch
SSD will install / CPLD will refresh / switch will power cycle into ONIE
ONIE installer will upgrade ONIE and BIOS / switch will reboot back into SONiC
In SONiC run fwutil show status to check that all firmware upgrades were successful
2022-01-24 00:56:38 -08:00
Samuel Angebault
20f7ae853b
Add platform.json configs for all denali SKUs (#9717) 2022-01-20 12:14:44 +05:30
Christian Svensson
bc56e064c3
[Celestica/Seastone2] Load interface LEDs (#9769)
Tested on a Celestica Seastone2 DX030 switch

Testing scenarios:
- Various QSFP ports in both normal and breakout config.
- 100G and 40G link speed show different colors.
- SFP1 port works.

Signed-off-by: Christian Svensson <blue@cmd.nu>
2022-01-19 00:42:51 -08:00
Kebo Liu
2cc973b582
[Mellanox] update system_health_monitoring_config for MSN4410/MSN4600/MSN4700 (#9728)
- Why I did it
For MSN4410/MSN4600/MSN4700 now they can support fetching PSU voltage threshold, no need to skip the psu voltage check in system health monitoring, so update the system health monitoring configuration file for these platforms.

- How I did it
remove skip PSU change config from the system_health_monitoring_config.json file

- How to verify it
Build image run on these platforms, system health monitoring will not report error against PSU voltage

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2022-01-19 10:29:26 +02:00
Alexander Allen
c80dabd0d8
[Mellanox] Add 2x40G support to MSN4700 platform (#9485)
- Why I did it
MSN4700 platform has 8 lanes per port and thus can support 2x40G with each lane running at 10G

- How I did it
Added 40G to 2x200G breakout mode in platform.json

- How to verify it
Run config int break Ethernet0 2x40G[200G,100G,50G,25G,10G,1G]
And verify the command runs successfully and the port speed was set to 40G with a 2x breakout.
2022-01-18 08:21:25 +02:00
Andriy Kokhan
4037867b7d
[BFN] Updated platform plugins (#9540)
* [BFN] Updated platform APIs impl

Signed-off-by: Andriy Kokhan <andriyx.kokhan@intel.com>

* Extended BFN platform SFP APIs implementation

* Update sfp.py

* [BFN] Extended SFP platform plugin implementation

Signed-off-by: Andriy Kokhan <andriyx.kokhan@intel.com>

* [BFN] Extended Fans platform plugin implementation

* [BFN] divided classes Fan and  FanDrawer into 2 files

* Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com>

What I did
	Add get_model() function
	Add get_low_critical_threshold() function
	Change __get(...) function.
How I did it
	Differnece from previous implementation of __get(...) function is return real value or -9999.9 if value is not provided by thrift API

* Add get_presence() function and revised __get() function

Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com>

* [BFN] Updated PSU platform APIs impl

Signed-off-by: Dmytro Lytvynenko <dmytrox.lytvynenko@intel.com>

* Added BFN PSU cache (#9)

Signed-off-by: Andriy Kokhan <andriyx.kokhan@intel.com>

* [BFN]  Fans and Fantray platform APIs update (#7)

* [BFN] Updated SFP platform APIs (#10)

Signed-off-by: Volodymyr Boyko <volodymyrx.boiko@intel.com>

* [BFN] Updated platform API for thermal (#8)

* Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com>

* Revert "[BFN]  Fans and Fantray platform APIs update (#7)" (#11)

This reverts commit c62a733443be49cbe4ba2d06047aac7516f0495e.

* Add support health monitor system (#15)

Signed-off-by: Petro Bratash <petrox.bratash@intel.com>

* Update chassis.py

* [BFN] Updated FANs and FAN Tray platform API (#14)

* Fix fix_alignment (#17)

Signed-off-by: Petro Bratash <petrox.bratash@intel.com>

* [BFN] Improvement show environment (#16)

* Added PSU temperature skip into platform.json (#18)

Signed-off-by: Andriy Kokhan <andriyx.kokhan@intel.com>

* Do not skip psud on Newport

Signed-off-by: Andriy Kokhan <andriyx.kokhan@intel.com>

* [BFN] fix fan status from Not OK to Ok (#19)

* [BFN] Updated SFP platform plugin (#13)

Signed-off-by: Volodymyr Boyko <volodymyrx.boiko@intel.com>

* [DPB] Fix typo for Ethernet0 2x200G[100G,40G] breakout mode (#21)

Signed-off-by: Mykola Gerasymenko <mykolax.gerasymenko@intel.com>

* [barefoot] Tmp fix vendor_rev (#22)

Signed-off-by: Volodymyr Boyko <volodymyrx.boiko@intel.com>

* Fixed python issues in sonic_platform/fan_drawer.py

Signed-off-by: Andriy Kokhan <andriyx.kokhan@intel.com>

* Updated fan_drawer.py

* Fixing trailing white spaces in fan_drawer.py

* [BFN] Fix thrift for SFPs API

Signed-off-by: Volodymyr Boyko <volodymyrx.boiko@intel.com>

* In platform.json, replaced 'false' with '0' to workaround ast.literal_eval() issue

Signed-off-by: Andriy Kokhan <andriyx.kokhan@intel.com>

* [Newport] Thermal manager  (#23)

* Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com>

* Revert "In platform.json, replaced 'false' with '0' to workaround ast.literal_eval() issue"

This reverts commit 1e73127830.

* Removed 'controllable' options from platform.json to fix factory default config generation

Signed-off-by: Andriy Kokhan <andriyx.kokhan@intel.com>

* Update thermal_manager.py

* Migrated SFP plugin to sonic_xcvr API (#30)

Signed-off-by: Andriy Kokhan <andriyx.kokhan@intel.com>

Co-authored-by: KostiantynYarovyiBf <kostiantynx.yarovyi@intel.com>
Co-authored-by: Vadym Yashchenko <vadymx.yashchenko@intel.com>
Co-authored-by: Dmytro Lytvynenko <dmytrox.lytvynenko@intel.com>
Co-authored-by: Volodymyr Boiko <volodymyrx.boiko@intel.com>
Co-authored-by: Petro Bratash <petrox.bratash@intel.com>
Co-authored-by: Mykola Gerasymenko <mykolax.gerasymenko@intel.com>
2022-01-17 11:16:20 +05:30
SeanWu
a2d1798a11
[AS7315-27XB] Fix build error and incorrect I2C bus number (#9712)
* Add intel_iommu=off to installer.conf

* This solve flooding DMAR err msg: "handling fault status reg 2"

Signed-off-by: Sean Wu <sean_wu@edge-core.com>

* remove customized at24 driver

* Use kernel 5.10.46 upstream at24 driver directly. The ADDR16 issue on
old driver has gone.

Signed-off-by: Sean Wu <sean_wu@edge-core.com>

* pin I2C-0/I2C-1 bus order

* otherwise, sometimes I2C-0/I2C-1 will be assigned to the undesired one.

Signed-off-by: Sean Wu <sean_wu@edge-core.com>

* fix i2c bus num for fan driver

Signed-off-by: Sean Wu <sean_wu@edge-core.com>

* backward compatible with R0A/R0B HW

Signed-off-by: Sean Wu <sean_wu@edge-core.com>
2022-01-16 12:13:16 +05:30
Viktor Ekmark
1b657becc9
[Celestica Seastone2] Build correct platform files (#9660)
* fix workdir for seastone2

Signed-off-by: Viktor Ekmark <viktor@ekmark.se>

* seastone2: Add I2C SFP definition for SFP1

Signed-off-by: Christian Svensson <blue@cmd.nu>

* [device/cel_seastone_2] sfputil logic for SFP1

Earlier logic resulted in the name of SFP1 being SFP33 which is not
correct. The cannonical source is seastone2_fpga module and it calls it
SFP1, so ensure the logic does as well.

Signed-off-by: Christian Svensson <blue@cmd.nu>

* [device/cel_seastone_2] sysfs paths for SFP1

Various changes that plumbs the correct port presence and DOM decoding
for the SFP1 port.

Signed-off-by: Christian Svensson <blue@cmd.nu>

Co-authored-by: Christian Svensson <blue@cmd.nu>
2022-01-16 12:11:28 +05:30
Samuel Angebault
4e72757dd1
[Arista] Change default_sku for 7050QX-32S (#9730) 2022-01-16 07:36:22 +05:30
Kebo Liu
8bb9ed6876
[Mellanox] Add sensors conf for MSN4600C A1 platform (#9706)
- Why I did it
Add sensor conf for MSN4600C A1 platform

- How I did it
Add a new sensor conf file and relevant scripts to support two different versions of the platform

- How to verify it
Run "sensors" cmd to check the output on the A1 platform to see whether it's as expected.
Signed-off-by: Kebo Liu <kebol@nvidia.com>
2022-01-13 07:59:35 +02:00
SeanWu
a5515b5297
[Accton] Enable pca954x i2c mux idle_disconnect for 5.10 kernel (#9745)
Enable pca954x idle_disconnect to avoid possible I2C device address conflict.

How I did it
Change pca954x device_attr idle_state to -2 (MUX_IDLE_DISCONNECT).

How to verify it
Cat pca954x device_attr idle_state and confirm the value is -2.

Signed-off-by: Sean Wu <sean_wu@edge-core.com>
2022-01-12 13:43:47 -08:00
Aravind Mani
2865fd4c72
[DellEMC] DMA errors are seen when loading bullseye kernel (#9641)
Following errors are seen continuously on SMBus controller when loading bullseye kernel.

[ 273.643046] DMAR: [DMA Write] Request device [00:12.0] PASID ffffffff fault addr 0 [fault reason 05] PTE Write access is not set
[ 273.785784] DMAR: DRHD: handling fault status reg 2
[ 273.844072] DMAR: [DMA Write] Request device [00:12.0] PASID ffffffff fault addr 0 [fault reason 05] PTE Write access is not set
[ 273.986804] DMAR: DRHD: handling fault status reg 2
[ 274.045101] DMAR: [DMA Write] Request device [00:12.0] PASID ffffffff fault addr 0 [fault reason 05] PTE Write access is not set
[ 274.187789] DMAR: DRHD: handling fault status reg 2

root@sonic:~# lspci -s 00:12.0 -vv
00:12.0 System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller - Host (rev 11)

Issue was not seen in buster. 

Modified platform specific installer.conf to turn off io_mmu
2022-01-03 08:47:13 -08:00
Arun Saravanan Balachandran
174833d319
DellEMC: S6100, S6000 - Platform API implementation (#9586)
Why I did it
To incorporate the below changes in DellEMC S6100, S6000 platforms.

S6100, S6000:
Implement 'get_revision' method for Chassis
Implement 'get_maximum_consumed_power' method for FanDrawer
Implement 'get_revision', 'get_maximum_supplied_power' methods for PSU
Implement 'get_error_description' method for SFP.
S6100:
Implement 'get_module_index' method for Chassis
Implement 'get_description', 'get_maximum_consumed_power', 'get_oper_status', 'get_slot' methods for Module
Update component names in platform.json
How I did it
Implement the platform API methods in the respective device files

How to verify it
Verified that the respective sonic-mgmt platform API test cases report success.
2022-01-02 22:38:35 -08:00
Arun Saravanan Balachandran
a888a2d98d
DellEMC: S6000, S6100, Z9332f - Update platform.json (#9459)
Why I did it
To include newer Fan LED, thermal capabilities fields in platform.json of DellEMC S6000, S6100, Z9332f platforms.

How I did it
Add the capabilities fields in each platform's respective platform.json.

How to verify it
Ran sonic-mgmt platform api test cases that use capabilities fields and verified that the results are as expected.
2022-01-02 22:31:34 -08:00
Raphael Tryster
c2b0af89fb
Added platform.json in Mellanox Spectrum-4 and older simx platforms (#9621)
- Why I did it
Added missing functionality for dynamic buffer calculation in Spectrum-4.

- How I did it
Added a section of code in asic_table.j2 for Spectrum-4, and added the simx version of SN5600 to the supported list.

- How to verify it
Manually: buffershow -l should show all ingress/egress lossy/lossless pools, and all fields of profiles should show values.
Automatically: https://github.com/Azure/sonic-mgmt/blob/master/tests/qos/test_buffer.py

Signed-off-by: Raphael Tryster <raphaelt@nvidia.com>
2022-01-02 09:58:40 +02:00
Junchao-Mellanox
b0f0d4e963
[Mellanox] Fix platform name for SN4800 (#9635)
- Why I did it
Rename MSN4800 to SN4800 in platform files

- How I did it
Rename MSN4800 to SN4800 in platform files

- How to verify it
Run build.
2021-12-28 14:58:28 +02:00
Stephen Sun
34be53a22e
Fix typo and missing files in SN3800 and SN4600C's buffer templates (#9537)
Why I did it
Fix typo and missing files in SN3800 and SN4600C's buffer templates

How I did it
ingress_lossless_xoff_size => ingress_lossless_pool_xoff add missing files for SN4600C-D100C12S2

How to verify it
Deploy the fix and verify whether the device can be up.

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2021-12-20 13:31:45 -08:00
LuiSzee
9e19a9a7cf
[centec] support v682-48y8c and v682-48x8c (#9349)
Why I did it
Adding platform support for centec v682-48y8c and v682-48x8c.
V682-48y8c switch has 48 SFP+ (1G/10G/25G) ports, 8 QSFP28 (40G/100G) ports on CENTEC TsingMa.MX.
V682-48y8c is different from V682-48y8c_d in that:

transceiver is managed by cpu smbus rather than TsingMa.MX i2c bus.
port led is managed by mcu inside TsingMa.MX.
fan, psu, sensors, leds are managed by cpu smbus other than the cpu board vendor's close sourse driver.
V682-48x8c switch has 48 SFP+ (1G/10G) ports, 8 QSFP28 (40G/100G) ports on CENTEC TsingMa.MX.
CPU used in v682-48y8c and v682-48x8c is Intel(R) Xeon(R) CPU D-1527.

How I did it
Modify related code in platform and device directory.
Upgrade centec sai to v1.9.
upgrade python to python3 and kernel version to 5.0 for V682-48y8c_d.
How to verify it
Build centec amd64 sonic image, verify platform functions (port, sfp, led etc) on centec v682-48y8c and v682-48x8c board.

Co-authored-by: shil <shil@centecnetworks.com>
2021-12-17 15:20:27 -08:00
zzhiyuan
a6d0a27a18
[Arista] Increase switch PCIe timeout for 7060-cx32s (#9248)
Co-authored-by: Zhi Yuan (Carl) Zhao <zyzhao@arista.com>
Why I did it
Arista 7060 platform has a rare and unreproduceable PCIe timeout that could possibly be solved with increasing the switch PCIe timeout value. To do this we'll call a script for this platform to increase the PCIe timeout on boot-up.

No issues would be expected from the setpci command. From the PCIe spec:

"Software is permitted to change the value in this field at any
time. For Requests already pending when the Completion
Timeout Value is changed, hardware is permitted to use either
the new or the old value for the outstanding Requests, and is
permitted to base the start time for each Request either on when
this value was changed or on when each request was issued. "

How I did it
Add "platform-init" support in swss docker similar to how "hwsku-init" is called, only this would be for any device belonging to a platform. Then the script would reside in device data folder.

Additionally, add pciutils dependency to docker-orchagent so it can run the setpci commands.

How to verify it
On bootup of an Arista 7060, can execute:
lspci -vv -s 01:00.0 | grep -i "devctl2"
In order to check that the timeout has changed.
2021-12-17 08:43:25 -08:00
Vadym Hlushko
727a94634c
[Mellanox] [SN4410] Fixed capability files - port_config.ini, hwsku.json, platform.json (#9538)
- Why I did it
The capability files were incorrect in comparison to the marketing spec of the SN4410 platform.

- How I did it
Aligned the capability files according to the marketing spec.

- How to verify it
Basic manual sanity checks:
1. Check if critical docker containers were UP
2. Check if interfaces were created and were UP
3. Check if interfaces created in the syncd docker container by executing – sx_api_ports_dump.py script
4. Check the logs from the start of the switch – everything was OK
5. Verified the port breakout

Signed-off-by: Vadym Hlushko <vadymh@nvidia.com>
2021-12-15 19:25:20 +02:00
Junchao-Mellanox
d05afb5dbd
[Mellanox] Rename platform x86_64-mlnx_msn4800 to x86_64-nvidia_sn4800 (#9512)
- Why I did it
Rename platform x86_64-mlnx_msn4800 to x86_64-nvidia_msn4800

- How I did it
Rename platform folder as well as all code that reference the platform name

- How to verify it
Manual test
2021-12-15 09:08:04 +02:00
Alexander Allen
325276a917
[Mellanox] Add copyright headers to Mellanox-SN4600C-D100C12S2 SKU (#9345)
Missing NVIDIA copyright header from some files.
2021-12-10 08:23:26 +02:00
Raphael Tryster
e3c0a888c9
[Mellanox] Add support of SN5600 platform on top of Nvidia ASIC simulation (#9392)
- Why I did it
Add new Spectrum-4 system support SN5600 on top of Nvidia ASIC simulator.

- How I did it
Add all relevant system and simulator SKU.
Updated syseeprom.hex and related directories to reflect Nvidia SN5600 brand name.

- How to verify it
Tested init flow, basic show commands, up interfaces, traffic test.

Signed-off-by: Raphael Tryster <raphaelt@nvidia.com>
2021-12-09 17:46:24 +02:00
Aravind Mani
ac2885a988
[SFP-Refactor] Modify transceiver key name (#9447)
* Modify transceiever key name

* fix alignment
2021-12-09 12:38:45 +05:30
Samuel Angebault
d499455752
[Arista] Update driver submodules (#9393)
- Use SfpOptoeBase by default to leverage new `sonic_xcvr` refactor
 - Add support for `Woodleaf` product
 - Move `libsfp-eeprom.so` to a different `.deb` package
 - Add new logrotate configuration for arista logs
 - Improve logging mechanism for the drivers (IO loglevel, fix syslog duplicates)
 - Initialize chassis cards in parallel
 - Refactor of `get_change_event` to fix interrupts treated as presence change
2021-12-08 11:33:36 -08:00
Arun Saravanan Balachandran
6d07efa890
[DellEMC S6000]: Move fan control to thermalctld from fancontrol.sh (#7239)
Why I did it
To implement fan control using thermalctld in DellEMC S6000 platform

Requires: Azure/sonic-linux-kernel#241

How I did it
Add thermal policies in 'thermal_policy.json'
Implemented thermal_manager.py and the necessary modules to perform fan control via thermalctld
Removed fancontrol.sh
How to verify it
Verified that the fan speeds are set based on the fan and temperature status.
Logs: S6000_fan_control_test_logs.txt
2021-12-08 10:43:14 -08:00
Stephen Sun
2d097ded8a
[Mellanox] Adjust buffer parameters with 2km cable supported for 4600C non-generic SKUs (#9215)
- Why I did it
Also recalculated all parameters with the latest algorithm with per-speed peer response time taken into account

- How I did it
Detailed information of each SKU:

C64:
t0: 32 100G downlinks and 32 100G uplinks
t1: 56 100G downlinks and 8 100G uplinks with 2km-cable supported
D112C8: 112 50G downlinks and 8 100G uplinks.
D48C40: 48 50G downlinks, 32 100G downlinks, and 8 100G uplinks
D100C12S2: 4 100G downlinks, 2 10G downlinks, 100 50G downlinks, and 8 100G uplinks
2km cable is supported for C64 on t1 only

- How to verify it
Run regression test (QoS)

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2021-12-08 15:51:33 +02:00
Song Yuan
27a6641fb8
[QoS, Buffer template][new HW SKU] Add qos config and buffer profile for Arista SKU (#8380) 2021-12-07 14:14:32 -08:00
Arun Saravanan Balachandran
6d8c509817
[DellEMC] S6100 - iTCO watchdog support and reboot cause determination changes (#9149)
Why I did it
To support iTCO watchdog using watchdog APIs.
How I did it
Implemented a new watchdog class WatchdogTCO for interfacing with iTCO watchdog.
Updated reboot cause determination logic.
How to verify it
Verified that the watchdog APIs' return values are as expected.
Logs: UT_logs.txt
2021-12-06 21:52:20 -08:00
Lior Avramov
1fce3ebda3
[Mellanox] Add support for SN2201 platform (#9333)
- Why I did it
Add support for SN2201 platform

- How I did it
Add required content for SN2201 platform
Note: still missing kernel driver support for this system. Once all is upstream will be updated as well.

- How to verify it
Install and basic sanity tests including traffic.

Signed-off-by: liora liora@nvidia.com
2021-12-06 14:47:50 +02:00
byu343
a8cf990879
Add macsec_ipg setting to arista platforms (#9396) 2021-12-06 10:32:43 +08:00
Wirut Getbamrung
b28c800f17
[device/celestica]: add controllable config to platform.json of e1031 (#9183) 2021-11-30 13:59:21 +08:00
Stephen Sun
ba853348d5
[Reclaim buffer] Reclaim unused buffers by applying zero buffer profiles (#8768)
Signed-off-by: Stephen Sun stephens@nvidia.com

Why I did it
Support zero buffer profiles

Add buffer profiles and pool definition for zero buffer profiles
Support applying zero profiles on INACTIVE PORTS
Enable dynamic buffer manager to load zero pools and profiles from a JSON file
Dependency: It depends on Azure/sonic-swss#1910 and submodule advancing PR once the former merged.

How I did it
Add buffer profiles and pool definition for zero buffer profiles

If the buffer model is static:
Apply normal buffer profiles to admin-up ports
Apply zero buffer profiles to admin-down ports
If the buffer model is dynamic:
Apply normal buffer profiles to all ports
buffer manager will take care when a port is shut down
Update buffers_config.j2 to support INACTIVE PORTS by extending the existing macros to generate the various buffer objects, including PGs, queues, ingress/egress profile lists

Originally, all the macros to generate the above buffer objects took active ports only as an argument
Now that buffer items need to be generated on inactive ports as well, an extra argument representing the inactive ports need to be added
To be backward compatible, a new series of macros are introduced to take both active and inactive ports as arguments
The original version (with active ports only) will be checked first. If it is not defined, then the extended version will be called
Only vendors who support zero profiles need to change their buffer templates
Enable buffer manager to load zero pools and profiles from a JSON file:

The JSON file is provided on a per-platform basis
It is copied from platform/<vendor> folder to /usr/share/sonic/temlates folder in compiling time and rendered when the swss container is being created.
To make code clean and reduce redundant code, extract common macros from buffer_defaults_t{0,1}.j2 of all SKUs to two common files:

One in Mellanox-SN2700-D48C8 for single ingress pool mode
The other in ACS-MSN2700 for double ingress pool mode
Those files of all other SKUs will be symbol link to the above files

Update sonic-cfggen test accordingly:

Adjust example output file of JSON template for unit test
Add unit test in for Mellanox's new buffer templates.

How to verify it
Regression test.
Unit test in sonic-cfggen
Run regression test and manually test.
2021-11-29 08:04:01 -08:00
abdosi
5c2423e974
Added 40G {300/40/5m} pg lookup profile for 7260 100G SKU (#9249)
What I did:
Added 40G {300/40/5m} profile for 7260 100G SKU
2021-11-24 18:56:30 -08:00
Guohan Lu
f3faf6111b Revert "[gearbox] provide common gbsyncd.service.j2 to start for platform specific gbsyncd docker (#9286)"
This reverts commit 1d2a11bbb8.
2021-11-19 10:10:55 -08:00
Mykola Gerasymenko
fba7a7f389
[barefoot] add platform.json and hwsku.json for Newport (#8964)
To support dynamic port breakout configurations on Newport platforms.

Signed-off-by: Mykola Gerasymenko <mykolax.gerasymenko@intel.com>
2021-11-18 10:23:46 -08:00
Kostiantyn Yarovyi
dc74fd456a
[Barefoot] [newport] TF2 update switch-tna-sai.conf to use pcie cpu instead of eth cpu (#9260)
Switch hostif frpom Eth to PCIe to improve performance
2021-11-18 10:22:59 -08:00
Junhua Zhai
1d2a11bbb8
[gearbox] provide common gbsyncd.service.j2 to start for platform specific gbsyncd docker (#9286)
Why I did it
Fix #9059. It provides common gbsyncd.service.j2 to start for platform specific gbsyncd docker, which must be named 'gbsyncd'.

How I did it
All of platform specific gbsyncd dockers use a common name 'gbsyncd'
Use a unique systemd service template gbsyncd.service.j2 for gbsyncd docker
2021-11-17 23:49:49 -08:00
pettershao-ragilenetworks
0e0772596e
[ragile] support 32c and 4s platform (#8824)
Signed-off-by: pettershao-ragilenetworks pettershao@ragilenetworks.com

What I did it

Add new platform x86_64-ragile_ra-b6510-32c-r0 (Trident 3)
ASIC Vendor: Broadcom
Switch ASIC: Trident 3
Port Config: 32x100G

Add new platform x86_64-ragile_ra-b6920-4s-r0 (Tomahawk 3)
ASIC Vendor: Broadcom
Switch ASIC: Tomahawk 3
Port Config: 128x100G

-How I did it
Provide device and platform related files.

-How to verify it
show platform fan
show platform ssdhealth
show platform psustatus
show platform summary
show platform syseeprom
show platform temperature
show interface status
2021-11-17 23:49:06 -08:00
Prince Sunny
d6c3a9308c
[broadcom]: td2/td3 change cpu cos num to 10 (#9301)
bcm_num_cos=10 forces SDK default to map internal priority 0-7 to COS 0. It is now consistent with other SKUs.
2021-11-17 20:56:46 -08:00
Marty Y. Lok
0fa687a458
Update Nokia platform IXR7250E device data (#9209)
Add BCM config files for linecard Nokia-IXR7250E-36x400G and Supervisor card Nokia-IXR7250E-SUP.
2021-11-16 17:11:49 -08:00
Kostiantyn Yarovyi
39318f5549
updated platform info for device x86_64-accton_wedge100bf_32x-r0 (#9161)
Why I did it
For sonic-mgmt Platform API tests to have data to compare with

How I did it
updated platform info for device x86_64-accton_wedge100bf_32x-r0

How to verify it
Run sonic-mgmt Platform API tests get_name fo:

chassis
fans
fan_drawers
psus
thermals
2021-11-15 09:41:39 -08:00
Arun Saravanan Balachandran
f4c3aa4a03
DellEMC: S6000, S6100, Z9332f - Add capabilities fields in platform.json (#9168)
Why I did it
To include capabilities fields in platform.json of DellEMC S6000, S6100, Z9332f platforms.

How I did it
Add the capabilities fields in each platform's respective platform.json.

How to verify it
Ran sonic-mgmt platform api test cases that use capabilities fields and verified that the results are as expected.
2021-11-15 08:08:40 -08:00
Aravind Mani
c3c6a178c8 DellEMC bullseye merge (#2)
Upgrade DellEMC platforms to bullseye.
2021-11-10 15:27:22 -08:00
zzhiyuan
989bd9deb0
[Arista] Fix 7060 flex HWSKU SFP ports and Ethernet8/1 (#9173)
* [Arista] Fix 7060 flex HWSKU SFP ports and Ethernet8/1

* [Arista] Fix polarity flips for Arista 7060 on non-leading intfs

Co-authored-by: Zhi Yuan (Carl) Zhao <zyzhao@arista.com>
2021-11-10 08:46:25 -08:00
gechiang
ef457ab13f
Disable ALPM distributed hitbit thread that is used for debug purpose only but interfered with Other functional operations (#9199) 2021-11-09 07:21:57 -08:00
Marty Y. Lok
41756194c7
[Nokia][supervisor]Fixed the asic_type for Nokia IXR7250E supervisor card. (#9139)
The Nokia IXR7250E supervisor card asic_type should be broadcom-dnx instead of broadcom. Fixes #9140
2021-11-03 15:58:44 -07:00
shlomibitton
ac8fd0d5f7
[Mellanox] Fix split configuration for Mellanox SN3800-D112C8 SKU SAI profile for fast-reboot performance (#8897)
- Why I did it
Wrong SKU configuration will lead to longer init flow.
This will affect fast-reboot feature by increasing the traffic downtime.
Since MLNX met the required downtime period with this SKU this bug found with a delay.

- How I did it
Add the required split labels for ports.

- How to verify it
Run fast-reboot with this platform using SN3800-D112C8 SKU.
2021-11-01 18:53:26 +02:00
Qi Luo
7ae638c4c3
[devices]: Add platform_asic files for new platforms (#9078) 2021-10-27 08:58:05 -07:00
dflynn-Nokia
1957558362
[Nokia ixs7215] Add new platform capabilities to platform.json (#9032)
This commit more fully declares the HW capabilities of the Nokia-7215
platform. For example, support for the threshold values associated with each
thermal sensor is described. The intent here is to inform the sonic-mgmt
platform test cases of which HW features are supported.

This commit must align with PR# 4521 within the sonic-mgmt git repo which is
currently under review. Any changes to that PR will need to be reflected in
this commit.
2021-10-27 09:56:46 +08:00
Andrew Sapronov
8eab0e02df
Added Netberg Aurora 715 support (#8604)
* [202012][platform/barefoot] (#8543)

Why I did it
Pcied running by python 2.

How I did it
dropped python2 support and add python3 support for pcied in file docker-pmon.supervisord.conf.j2

How to verify it
docker exec pmon supervisorctl status

* [Netberg][nba715] Initial support for Netberg Aurora 715 switch

Signed-off-by: Andrew Sapronov <andrew.sapronov@gmail.com>

Co-authored-by: Kostiantyn Yarovyi <kostiantynx.yarovyi@intel.com>
2021-10-26 13:04:27 -07:00
LuiSzee
32ad7444f9
[centec] support TM.MX board v682-48y8c_d (#8747)
Adding platform support for centec v682-48y8c_d.

Why I did it
Adding platform support for centec v682-48y8c_d.
This switch has 48 SFP+ (1G/10G/25G) ports, 8 QSFP28 (40G/100G) ports on CENTEC TsingMa.MX.
CPU used in v682-48y8c_d is Intel(R) Xeon(R) CPU D-1527.

How I did it
Modify related code in platform and device directory.
Upgrade sai to v1.8.
fix bug for parallel compile centec platform modules.

How to verify it
Build centec amd64 sonic image, verify platform functions (port, sfp, led etc) on centec v682-48y8c_d board.

Co-authored-by: Shi Lei <shil@centecnetworks.com>
2021-10-26 12:55:24 -07:00
thaj-deen
f01076ea2a
Added Support for Dell EMC S5212f in SONiC (#8678)
Why I did it
Added Support for Dell EMC S5212f platform

How I did it
Implemented the support for Dell EMC S5212f platform

Platform: x86_64-dellemc_s5212f_c3538-r0
HwSKU: DellEMC-S5212f-P-25G
ASIC: broadcom
ASIC Count: 1

How to verify it
Verified the show command outputs
2021-10-26 12:52:03 -07:00
Kebo Liu
9c4a7c2fed
[PMON] Skip chassis_db_init task on Mellanox simx platform (#9017)
Why I did it
"chassis_db_init" task of PMON should be skipped on Mellanox simx platform, since the hardware info which this task is trying to access is not available on simx platforms, It will introduce some error log.

How I did it
Add the capability for "chassis_db_init" in the template for it can be skipped by adding configuration in "pmon_daemon_control.json".
add "skip_chassis_db_init" configuration for simx platforms.
use symbol link for "pmon_daemon_control.json" since all the simx platforms share the same configuration
How to verify it
Build an image and install it on simx platform to check whether "chassis_db_init" task is skipped.

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2021-10-24 09:10:41 -07:00
juntseng62
963217891e
[Alphanetworks] Add new platform SNJ60D0-320F (#8780)
Why I did it
Added Support for Alphanetworks SNJ60D0-320F platform

How I did it
Implemented the support for Alphanetworks SNJ60D0-320F platform

Platform: x86_64-alphanetworks_snj60d0_320f-r0
HwSKU: Alphanetworks-SNJ60D0-320F
ASIC: broadcom
ASIC Count: 1

How to verify it
Verified the show command outputs
2021-10-22 12:37:39 -07:00
pettershao-ragilenetworks
7d981b9315
Update default_sku (#8992)
Why I did it
correct the default-sku type value for ragile platform

How I did it
How to verify it
ragile platform work as excepted.
2021-10-22 07:27:11 -07:00
Santhosh Kumar T
992dc47286
[Dell] S6000 I2C not responding to certain optics (#8736)
* [Dell] S6000 I2C not responding to certain optics

* Revising return states

* Moved lock file from /var/run/platform_cache to /etc/sonic
2021-10-21 18:53:41 +05:30
Arun Saravanan Balachandran
8a2b30702a
DellEMC: Z9332f - Component firmware upgrade platform API implementation (#8973) 2021-10-20 23:04:37 -07:00
Dror Prital
5356244e53
[Mellanox] Add NVIDIA Copyright header to "mellanox" files (#8799)
- Why I did it
Add NVIDIA Copyright header to "mellanox" files

- How I did it
Add NVIDIA Copyright header as a comment for Mellanox files

- How to verify it
Sanity tests and PR checkers.
2021-10-17 19:03:02 +03:00
Marty Y. Lok
c37470544a
[Nokia][port]Modify the Nokia-IXR7250E-36x400G device data (#8875)
-- Based on the new BCM configuration, Modify the portcoreid for the front panel port in the port_config.ini for line card Nokia-IXR7250e-36x400G
 -- Correct the pcie.pmal file
 -- Update the platform_ndk.json with new field "update-asic-pvt"
 -- Add chassis-internal-intf to chassisdb.conf
 -- update platform_reboot

Signed-off-by: mlok <marty.lok@nokia.com>
2021-10-14 13:47:12 -07:00
Ze Gan
f4f6955e43
[devices]: Add new SKU for SONiC VM (#8971)
The default ethernet port naming style is Ethernet0, Ethernet4...Ethernet(i*4) which isn't compatible with EOS's style Ethernet1,Ethernet2...Etherent(i+1)
SONiC-mgmt usually use EOS as neighbor devices. To relieve the compatible issue on SONiC as neighbor devices, This PR introduces a new SKU SONiC VM.

Signed-off-by: Ze Gan <ganze718@gmail.com>
2021-10-14 10:47:40 -07:00
Sudharsan Dhamal Gopalarathnam
434a641026
[DPB][Mellanox]Fixing DPB modes in Mellanox-SN2700-D40C8S8 (#8953)
#### Why I did it
Fixing https://github.com/Azure/sonic-buildimage/issues/8938
Fixing 1x10G DPB mode in Mellanox-SN2700-D40C8S8 SKU as it was causing sonic-cfggen to fail.


#### How I did it
Added correct mode format in hwksu.json in Mellanox-SN2700-D40C8S8  and updated platform.json for the new mode.


#### How to verify it
Using sonic-cfggen verify it works fine
2021-10-12 18:16:13 -07:00
Qi Luo
add9b651b6
Add platform_asic file to each platform folder in sonic-device-data based package (#8542)
#### Why I did it
Add platform_asic file to each platform folder in sonic-device-data package. The file content will be used as the ground truth of mapping from PLATFORM_STRING to switch ASIC family.

One use case of the mapping is to prevent installing a wrong image, which targets for other ASIC platforms. For example, currently we have several ONIE images naming as sonic-*.bin, it's easy to mistakenly install the wrong image. With this mapping built into image, we could fetch the ONIE platform string, and figure out which ASIC it is using, and check we are installing the correct image.

After this PR merged, each platform vendor has to add one mandatory text file  `device/PLATFORM_VENDOR/PLATFORM_STRING/platform_asic`, with the content of the platform's switch ASIC family.

I will update https://github.com/Azure/SONiC/wiki/Porting-Guide after this PR is merged.

You can get a list of the ASIC platforms by `ls -b platform | cat`. Currently the options are
```
barefoot
broadcom
cavium
centec
centec-arm64
generic
innovium
marvell
marvell-arm64
marvell-armhf
mellanox
nephos
p4
vs
```

Also support
```
broadcom-dnx
```

#### How I did it

#### How to verify it
Test one image on DUT. And check the folders under `/usr/share/sonic/device`
2021-10-08 19:27:48 -07:00
Aravind Mani
77b6bc39be
DellEMC: Fix z9332f low power mode issue (#8693) 2021-10-08 11:17:36 +05:30
Wirut Getbamrung
800de696db
[Celestica/sonic_platform]: Fixed failed test cases in Haliburton platform testing (#8815)
* [device/celestica-e1031]: fix apis follow lastest spec
* [device/celestica-e1031]: fix lgtm (#261)
2021-10-08 11:10:05 +08:00
byu343
677f31dac3
[arista] Add asic and phy configs for clearwater2ms (#8174)
* Add ASIC configs for clearwater2ms
* Add 100G gearbox configs for clearwater2ms
2021-10-04 19:11:57 -07:00
Ying Xie
3e397ce8b2
[Nokia 7215] Rename alias column with etpN normination (#8879)
also add hwsku alias Nokia-M0-7215

Signed-off-by: Ying Xie <ying.xie@microsoft.com>
2021-09-30 15:27:54 -07:00
Alexander Allen
57ad1ed680
Add Mellanox-SN4600C-D100C12S2 SKU (#8832)
*Add Mellanox-SN4600C-D100C12S2 SKU
2021-09-29 14:14:11 -07:00
Ashok Daparthi-Dell
6cbdf11e53
SONIC QOS YANG - Remove qos tables field value refernce format (#7752)
Depends on Azure/sonic-utilities#1626
Depends on Azure/sonic-swss#1754

QOS tables in config db used ABNF format i.e "[TABLE_NAME|name] to refer fieldvalue to other qos tables.

Example:
Config DB:
"Ethernet92|3": {
"scheduler": "[SCHEDULER|scheduler.1]",
"wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]"
},
"Ethernet0|0": {
"profile": "[BUFFER_PROFILE|ingress_lossy_profile]"
},
"Ethernet0": {
"dscp_to_tc_map": "[DSCP_TO_TC_MAP|AZURE]",
"pfc_enable": "3,4",
"pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]",
"tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP|AZURE]",
"tc_to_queue_map": "[TC_TO_QUEUE_MAP|AZURE]"
},

This format is not consistent with other DB schema followed in sonic.
And also this reference in DB is not required, This is taken care by YANG "leafref".

Removed this format from all platform files to consistent with other sonic db schema.
Example:
"Ethernet92|3": {
"scheduler": "scheduler.1",
"wred_profile": "AZURE_LOSSLESS"
},

Dependent pull requests:
#7752 - To modify platfrom files
#7281 - Yang model
Azure/sonic-utilities#1626 - DB migration
Azure/sonic-swss#1754 - swss change to remove ABNF format
2021-09-28 09:21:24 -07:00
arunlk-dell
c668f2ab5e
DellEMC: Initial commit for S5224F platform support (#8717)
Why I did it
Added support for the device S5224F

How I did it
Implemented the support for the platform S5224F
Switch Vendor: DellEMC
Switch SKU: S5224F-ON
ASIC Vendor: Broadcom
SONiC Image: sonic-broadcom.bin

How to verify it
Verified the show platform/interface commands
2021-09-26 09:34:16 -07:00
arunlk-dell
b0b0ba828a
DellEMC: N3248PXE Initial platform commit (#8562)
Why I did it
Added support for the device N3248PXE

How I did it
Implemented the support for the platform N3248PXE
n3248pxe_unit_test_log.txt

Switch Vendor: DellEMC
* Switch SKU: N3248PXE
* ASIC Vendor: Broadcom
* SONiC Image: sonic-broadcom.bin

How to verify it
Verified the show platform commands
2021-09-25 15:35:16 -07:00
arunlk-dell
8325500560
DellEMC: N3248TE Initial platform commit (#8809)
Why I did it
Added support for the device N3248TE

How I did it
Implemented the support for the platform N3248TE

Switch Vendor: DellEMC

Switch SKU: N3248TE
ASIC Vendor: Broadcom
SONiC Image: sonic-broadcom.bin
How to verify it
Verified the show platform commands
2021-09-23 20:47:32 -07:00
yozhao101
e46dd633d8
[healthd] Add system health configuration for platform Celestica E1031 (#8783)
This PR aims to fix the healthd crash issue by adding system health monitoring configuration file for platform Celestica E1031 by adding a new configuration file under the path device/celestica/x86_64-cel_e1031-r0/.

How to verify it
I manually restart the system-health.service and confirmed that healthd is running.

Signed-off-by: Yong Zhao <yozhao@microsoft.com>
2021-09-18 10:31:36 -07:00
dflynn-Nokia
1a2e852483
[Nokia ixs7215] Support show system-health (#8771)
* [Nokia ixs7215] Support show system-health
* [Nokia ixs7215] Fix LGTM alert
2021-09-17 12:01:12 +08:00
Aravind Mani
5c2d4dd15c
DellEMC: Z9332f fix platform bugs (#8777)
* DellEMC: Z9332f fix platform bugs

* update sfp.py
2021-09-16 07:25:43 -07:00
Junhua Zhai
8a00ad73fd
[gearbox] support gearbox feature on docker-sonic-vs (#8765) 2021-09-15 14:02:03 -07:00
Kostiantyn Yarovyi
690f6ad883
[show] add platform components in Newport, Montara, Mavericks for fix incomprehensible firmware Error print (#8690)
What I did:
     add platform components
 How I did it:
      In platform_components.json add chassis and empty component
How to verify it:
       Run show platform firmware updates
2021-09-14 07:34:00 -07:00
Sudharsan Dhamal Gopalarathnam
d20f0cb7ea
[Mellanox] Remove 2x40G from SN3800 hwsku (#8712)
- Why I did it
Removed 2x40G for SN3800. This mode is not supported by hardware.

- How I did it
Removing it from hwsku.json and platform.json

- How to verify it
Load it in the device and check supported modes
2021-09-13 17:22:17 +03:00
Samuel Angebault
f899a82864
[Arista] Fix Clearwater2 phy initialization when no configuration is provided (#8271)
Why I did it
Fix an issue on the Clearwater2 linecard.
When the linecard is started with a fresh image without configuration, phys would not be initialized.

How I did it
Added default_sku for Clearwater2 which prevents config-setup from failing to create a default config_db.json.
Added some extra logic in the phy-credo-init script to run the phy_config.sh of the hwsku pointed by default_sku if the DEVICE_METADATA.localhost.hwsku information is not populated in CONFIG_DB.

How to verify it
Booting an image with this change and without configuration will lead to the phys being initialized using the phy_config.sh from default_sku.
2021-09-09 13:03:22 -07:00
pettershao-ragilenetworks
8514a484cd
[platform/ragile] support ra-b6910-64c (#7950)
What I did it
Add new platform x86_64-ragile_ra-b6910-64c-r0 (Tomahawk 3)
ASIC Vendor: Broadcom
Switch ASIC: Tomahawk 3
Port Config: 64x100G

-How I did it
Provide device and platform related files.

-How to verify it
show platform fan
show platform ssdhealth
show platform psustatus
show platform summary
show platform syseeprom
show platform temperature
show interface status
2021-09-09 10:49:37 -07:00
Kebo Liu
2300a88756
[Mellanox] remove sensor conf for SN4600 A0 platform due to EOL (#8629)
- Why I did it
SN4600 A0 platform was EOL, so there is no need to support it, sensor conf can be removed and we don't need to maintain 2 sensor conf files, only A1 platform is needed.

- How I did it
Remove get_sensors_conf_path which intends to load correct sensor conf for different(A0/A1) platforms.
Remove the sensor conf for A0 platform, rename previous sensor.conf.a1 to sensor.conf

- How to verify it
Run sensor test on the SN4600 platform.
2021-09-02 17:53:19 +03:00
Samuel Angebault
2e4f473237
[Arista] Update platform library submodules (#8594)
- Disable health monitoring of `psu.voltage` until support is implemented
 - chassis: disable provisioning bit once linecard has booted
 - chassis: fix issue in `show version` when running as `admin`
 - chassis: fix race when reading an eeprom before it's available
 - chassis: implement `get_all_asics` call
 - api: fix `ChassisBase.get_system_eeprom_info` implementation
 - api: add missing thermal condition and info
 - api: fix return value of `ChassisBase.set_status_led`
 - sfp: introduce SfpOptoeBase implementation used based on configuration knob
 - psu: rely on pmbus to read input/output status when other mechanism is missing
 - misc: other refactors and improvements
2021-09-01 01:52:57 -07:00
Junhua Zhai
661df5106a
[gearbox] Update gearbox_config.json for platform vs (#8641)
Add "context_id" and "hwinfo" fields for PHY object, which are must-have of attribute sanity check in swss GearboxParser.
2021-09-01 01:51:04 -07:00
SuvarnaMeenakshi
4858153d25
[vs][multi-asic]: Add new platforms for multi-asic vs. (#8269)
Why I did it
End goal: To have azure pipeline job to run multi-asic VS tests.
Intermediate goal: Require multi-asic KVM image so that the test can be run.
The difference between single asic and multi-asic KVM image is asic.conf file which has different NUM_ASIC values.
Idea behind the approach in this PR to attain the intermediate goal above:

Ease of building multi-asic KVM image so that any user or azure pipeline can use a simple make command to generate single or multi-asic KVM images as required.
Use a single onie installer image and multiple KVM images for single and multi-asic images.
Current scenario:
For VS platform, sonic-vs.bin is generated which is the onie installer image and sonic-vs.img.gz is generated which is the KVM iamge.
Scenario to be achieved:
sonic-vs.bin - which will include single asic platform, 4 asic platform and 6 asic platform.
sonic-vs.img.gz - single asic KVM image
sonic-4asic-vs.img.gz - 4 asic KVM image
sonic-6asic-vs.img.gz - 6 asic KVM image

In this PR, 2 new platforms are added for 4-asic and 6-asic VS.

How I did it
Create 4-asic and 6-asic device directories with the required files and hwsku files.
Add onie-recovery image information in vs platform.
How to verify it
After this PR change, no build change.
sonic-vs.bin onie installer image should include information of new multi-asic vs platforms.
2021-08-31 22:45:59 -07:00
Ying Xie
7735e8a792
[7050] define hwsku.json for Arista-7050QX-32S-S4Q31 to skip SFP checks for first 4 ports (#8624)
Why I did it
The first 4 ports on this dut are breakout ports. They might not always be connected in lab. Mark them as 'RJ45' to skip the SFP check since they are by default disabled.

How to verify it
run platform test_reboot.py

Signed-off-by: Ying Xie <ying.xie@microsoft.com>
2021-08-31 17:15:03 -07:00
Aravind Mani
d429c75581
DellEMC: Z9332f fix LED issue (#8639) 2021-08-31 12:37:03 -07:00
Song Yuan
d53c6248e4
[chassis] Set LAG Id range for 7800 chassis (#8052)
Configure LAG Id range in chassisdb.conf for 7800 chassis.
2021-08-30 16:04:07 -07:00
byu343
85a671f5af
[arista] Add gearbox configs for Arista 7280cr3mk (#8146)
* Add gearbox support for 7280cr3mk and its variants
2021-08-26 15:30:11 +08:00
gechiang
df66c88572
BRCM Disable ACL Drop counted towards interface RX_DRP counters part II (#8596) 2021-08-26 00:18:04 -07:00
Junchao-Mellanox
6fd31a5018
[Mellanox] Update platform files for SN4800 (#8540)
- Why I did it
Update platform data files for SN4800 to support chassis management

- How I did it
Update pcie.yml
Update sensors.conf
Update platform.json

- How to verify it
Run platform test suite in sonic-mgmt
2021-08-25 21:13:07 +03:00
Alexander Allen
7e4c4e2b95
[Mellanox] Add 2x100G and 4x50G breakout modes to MSN4410 platform (#8419)
- Why I did it
The MSN4410 platform was missing 2x100G and 4x50G supported breakout modes in platform.json

- How I did it
Added the aforementioned breakout modes to platform.json

- How to verify it
Run show interface breakout on a MSN4410 and verify that 2x100G and 4x50G are listed in the supported breakout modes for ports 1-24.
2021-08-22 15:53:03 +03:00
Samuel Angebault
18cd32a218
[Arista] Add VOQ information for Clearwater2 (#8508)
This change introduces 3 columns in the port_config.ini file.
These are coreId, corePortId and numVoq.
The ports for inband and recirc were also renamed properly.
2021-08-20 16:42:56 -07:00
Marty Y. Lok
a675493a5a
Added Nokia IXR7250E support (#7809)
Why I did it
Support Nokia ixr7250E IMM and Supervisor cards

How I did it
Added modules x86_64-nokia_ixr7250e_sup-r0 and x86_64-nokia_ixr7250e_36x400g-r0 ../device/nokia directory.
Modified the platform/broadcom/one-image.mk to include NOKIA_IXR7250_PLATFORM_MODULE
Modified the platform/broadcom/rule.mk to include the platform-module-nokia.mk
2021-08-17 12:26:04 -07:00
Christian Svensson
c64b08fb9d
[cel seastone 2] Add 10G SFP1 front port (#8267)
Why I did it
The SFP1 port was disabled in the default configuration.

How I did it
This commit enables the 10G front port for usage.
This was done using a DX030 together with an Arista switch using bcmsh and phy diag xe0 dsc to figure out what lane mappings make sense.

Validated on Celestica Seastone2 DX030.

How to verify it
Own a Celestica DX030
Connect the front SFP1 port to something.
It works :-)
You can do tcpdump -i Ethernet128 -n and you will see both incoming and outgoing LLDP.
2021-08-17 10:11:16 -07:00
zzhiyuan
144851fea8
[Arista] Add dynamic port breakout hwsku to platforms (#7975)
Co-authored-by: Zhi Yuan (Carl) Zhao <zyzhao@arista.com>
Why I did it
To support dynamic port breakout Broadcom configurations on Arista platforms.

How I did it
Updated platform.json for platforms and added new hwsku, Broadcom config, and hwsku.json for dynamic port breakout usage.

The name of the new hwsku name used is very similar to the platform name (platform x86_64-arista_7050_qx32s hwsku Arista-7050QX-32S) as the flex hwsku is meant to be the default in the future.

How to verify it
Boot up device with the new hwsku, interfaces are up.
Change hwsku.json with new default breakout mode and reload device, breakout will have successfully been applied.
2021-08-16 07:03:50 -07:00
tomer-israel
aa6d4574e3
[Mellanox] fix syseeprom info values on mellanox simulator platforms msn4700 and msn4800 (#8387)
#### Why I did it
The values of the syseeprom were not valid

#### How I did it
I took the correct hexdump values from a real switch and created this hex file again

#### How to verify it
decode-syseeprom will display the new values
2021-08-15 01:12:32 -07:00
jostar-yang
76ed66ca29
[AS4630-54PE] Add SFP reset and lpmode sysfs (#8450)
Add QSFP reset and lpmode sysfs

Signed-off-by: Jostar Yang <jostar_yang@accton.com.tw>
2021-08-14 23:58:17 -07:00
madhanmellanox
3ad4096ea2
Adding SKU Mellanox-SN3800-D100C12S2 (#8441)
* Adding SKU Mellanox-SN3800-D100C12S2

Co-authored-by: Madhan Babu <madhan@l-csi-0241l.mtl.labs.mlnx>
2021-08-13 19:17:38 -07:00
carl-nokia
88cbcb4045
[Nokia ixs7215] sfputil support + component tests (#8445)
Deliver sfputil support for sfputil show eeprom and sfputil reset along with some component test case fixes

Co-authored-by: Carl Keene <keene@nokia.com>
2021-08-13 03:27:06 -07:00
carl-nokia
28dca68925
[Nokia] Add hwsku.json for the Nokia-7215 (#8372)
* add hwsku.json for the Nokia-7215
* added required default_brkout_mode to hwsku as its not optional
* remove tabs from the file so spacing consistent

Co-authored-by: Carl Keene <keene@nokia.com>
2021-08-12 15:41:41 +08:00
Kebo Liu
9d2ccda1ec
[Mellanox] Add new sensor conf to support SN4410 A1 system (#8379)
#### Why I did it

New SN410 A1 system has a different sensor layout with A0 system, needs a new sensor conf file to support it.

#### How I did it

Since the SN4410 A1 system use exactly the same sensor layout as the SN4700 A1 system, so add a symbol link linking to the SN4700 A1 sensor conf file to reuse.

#### How to verify it

Run sensor test against the SN4410 A1 system;
Run platform related regression test against the SN4410 A1 system
2021-08-11 17:31:58 -07:00
vmittal-msft
a53f01df59
Updated PGHeadroom settings for 400G speed (DellEMC-Z9332f-M-O16C64 & DellEMC-Z9332f-O32) (#8420)
Updated pg_profile_lookup.ini for both HWSKU to match with BRCM recommendation
2021-08-11 04:09:10 -07:00
arunlk-dell
25416b2ce6
DellEMC: S5232F support for show system-health command (#8334)
Co-authored-by: Arun LK <Arun_L_K@dell.com>
Why I did it
Support for show system-health command in s5232f

How I did it
Added the configuration, API changes to support system health

How to verify it
Execute "show system-health summary/detail/monitor-list" CLI.
2021-08-10 20:35:51 -07:00
gechiang
8e903f4566
BRCM Disable ACL Drop counted towards interface RX_DRP counters (#8382)
* BRCM Disable ACL Drop counted towards interface RX_DRP counters
2021-08-10 19:03:22 -07:00
tjchadaga
504de9f305
Fix TH3 Warm-reboot failure due to Tunnel termination SAI failure (#8395) 2021-08-09 19:26:50 -07:00
Aravind Mani
fa9f8eecf1
DellEMC: Change PG values for S5232f,Z9264f (#7102)
* DellEMC: Change PG values for S5232f,Z9264f

* change-v1
2021-08-09 14:56:48 -07:00
Neetha John
9acf0744a1
Revert "Revert "Update default cable len to 0m for TD2"" (#8354)
* Update default cable len to 0m for TD2 (#8298)
* Update sonic-cfggen tests with the correct cable len

Signed-off-by: Neetha John <nejo@microsoft.com>

As part of the buffer reclamation efforts for TD2, setting the default cable len to 0m which means unused ports will have a cable len of 0m.

Why I did it
To align with the changes in Azure/sonic-swss#1830

How to verify it
- With the default cable len set to 0m and the associated changes in swss, CABLE_LENGTH table had '0m' set for unused ports and accordingly more space was reserved for the shared pool
- Cfggen tests passed with the cable len update
2021-08-06 10:36:10 -07:00
Arun Saravanan Balachandran
dc296bf135
DellEMC: Add pcie.yaml for Z9332f (#8329)
Why I did it
To support "pcied" and "pcieutil" commands in DellEMC Z9332f.

How I did it
Add 'pcie.yaml' in device/dell/[PLATFORM]/ directory.

How to verify it
Execute "pcieutil check" command.
Logs: UT_logs.txt
2021-08-05 18:50:06 -07:00
vmittal-msft
c37f6ea2c0
Dell Z9332 systems optimized MMU settings for T0/T1 topology (#8341) 2021-08-05 17:02:36 -07:00
Neetha John
4268662486
Revert "Update default cable len to 0m for TD2 (#8298)" (#8320)
This reverts commit 93e939b8af.
2021-08-03 14:07:41 -07:00
Neetha John
93e939b8af
Update default cable len to 0m for TD2 (#8298)
Signed-off-by: Neetha John <nejo@microsoft.com>

As part of the buffer reclamation efforts for TD2, setting the default cable len to 0m which means unused ports will have a cable len of 0m.

Why I did it
To align with the changes in Azure/sonic-swss#1830

How to verify it
With the default cable len set to 0m and the associated changes in swss, CABLE_LENGTH table had '0m' set for unused ports and accordingly more space was reserved for the shared pool
2021-08-02 09:09:22 -07:00
Alexander Allen
5259af2e2b
[mellanox] remove 2x40G and 4x40G breakout modes due to no hardware support (#8280)
Mellanox platforms do not support 2x40G or 4x40G breakout modes.

Signed-off-by: Alexander Allen <arallen@nvidia.com>
2021-08-01 13:24:26 -07:00
Samuel Angebault
6ae5e1d6a1
[Arista] Update platform library submodules (#8281)
- Improve chassis linecard restartability
- Fix 'show system-health' cli by adding non standard api
- Fix ledd crash on linecards with Recycle/Inband ports
- Refactor DPM management and add ADM1266 support
- Add state machine to update DPM RTC clock periodically
- Improve xcvr temperature reporting
- Fix lane mapping and `default_sku` for `x86_64-arista_7170_32c` platform
- Fix `7170-32C/CD` platform definition
2021-07-30 17:10:45 -07:00
Vivek Reddy
b0620ee055
[Mellanox] [SKU] Fix the shared headroom for 4600C-C64 SKU (#8242)
Removed ingress_lossy_pool from the BUFFER_POOL list
Fx the the egress_lossless_pool_size value

Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
2021-07-29 08:21:28 -07:00
Aravind Mani
2479898937
[DellEMC] Buffer profile changes for S5232 and Z9264 (#8170)
In QoS buffer profile, mode field is not needed.
2021-07-24 16:35:30 -07:00
Christian Svensson
6b32f06555
[DellEmc] Fix port lanes for 10G ports on alternative S5232 SKUs (#8208)
Backport the fix (444cede11) that was made for the default SKU to the alternative SKUs.

Signed-off-by: Christian Svensson <blue@cmd.nu>
2021-07-24 16:33:25 -07:00
SeanWu
fed8957b47
[Accton] AS4630-54TE Support SystemHealthMonitor (#8183)
1. Implement FanDrawer-Fan hierarchy.
2. Enable thermalctld, disable pcied.
3. Implement SystemLED in Chassis.
4. Correct Fan direction
5. Implement require Fan APIs for SystemHealthMonitoring.
6. Handle non-ascii character while reading PSU model/serial num.

```
Check if System-health can pass the check and display the SystemLED correctly.


///////// booting, DIAG_LED = GREEN_BLINKING /////////

root@sonic:/tmp# show system-health detail 
System is currently booting...
root@sonic:/tmp# cat /sys/class/leds/diag/brightness 
5


///////// container_checker fail, DIAG_LED = AMBER /////////

root@sonic:/sys/bus/i2c/devices# show system-health detail
System status summary

  System status LED  STATUS_LED_COLOR_AMBER
  Services:
    Status: OK
  Hardware:
    Status: Not OK
    Reasons: container_checker is not Status ok

System services and devices monitor list

Name                        Status    Type
--------------------------  --------  ----------
container_checker           Not OK    Program
sonic                       OK        System
rsyslog                     OK        Process
root-overlay                OK        Filesystem
var-log                     OK        Filesystem
routeCheck                  OK        Program
diskCheck                   OK        Program
container_memory_telemetry  OK        Program
FAN-1F                      OK        Fan
FAN-1R                      OK        Fan
FAN-2F                      OK        Fan
FAN-2R                      OK        Fan
FAN-3F                      OK        Fan
FAN-3R                      OK        Fan
PSU-1 FAN-1                 OK        Fan
PSU-2 FAN-1                 OK        Fan
PSU 1                       OK        PSU
PSU 2                       OK        PSU

System services and devices ignore list

Name             Status    Type
---------------  --------  ------
asic             Ignored   Device
psu.temperature  Ignored   Device

///////// skip container_checker, DIAG_LED = GREEN /////////

root@sonic:/sys/bus/i2c/devices# vi /usr/share/sonic/device/x86_64-accton_as4630_54te-r0/system_health_monitoring_config.json 
root@sonic:/sys/bus/i2c/devices# 
root@sonic:/sys/bus/i2c/devices# 
root@sonic:/sys/bus/i2c/devices# show system-health detail
System status summary

  System status LED  STATUS_LED_COLOR_GREEN
  Services:
    Status: OK
  Hardware:
    Status: OK

System services and devices monitor list

Name                        Status    Type
--------------------------  --------  ----------
sonic                       OK        System
rsyslog                     OK        Process
root-overlay                OK        Filesystem
var-log                     OK        Filesystem
routeCheck                  OK        Program
diskCheck                   OK        Program
container_memory_telemetry  OK        Program
FAN-1F                      OK        Fan
FAN-1R                      OK        Fan
FAN-2F                      OK        Fan
FAN-2R                      OK        Fan
FAN-3F                      OK        Fan
FAN-3R                      OK        Fan
PSU-1 FAN-1                 OK        Fan
PSU-2 FAN-1                 OK        Fan
PSU 1                       OK        PSU
PSU 2                       OK        PSU

System services and devices ignore list

Name               Status    Type
-----------------  --------  -------
container_checker  Ignored   Service
psu.temperature    Ignored   Device
asic               Ignored   Device
```


Signed-off-by: Sean Wu <sean_wu@edge-core.com>
2021-07-24 16:27:34 -07:00
Samuel Angebault
545c69180f
[Arista] Improve 7280CR3 platform configurations (#8234)
Introduce Arista-7280CR3-C32P4 and Arista-7280CR3-C32D4 hwskus.
Remove deprecated fancontrol configurations.
Add pcie.yaml configurations
Add missing default_sku files
2021-07-24 13:42:27 -07:00
Wirut Getbamrung
4bf873bf42
[device/celestica]: Fix failed test cases of Haliburton platform API (#7579)
- Why I did it
To fix failed test cases of Haliburton platform APIs that found on platform_tests script
- How I did it
Add device/celestica/x86_64-cel_e1031-r0/platform.json
Update functions to support python3.7
Add more functions follow latest sonic_platform_base
Fix the bug
- How to verify it
Run platform_tests script

Signed-off-by: Wirut Getbamrung [wgetbumr@celestica.com]
2021-07-23 06:18:39 -07:00
Vivek Reddy
69ed4417ca
[Mellanox] [master] Added D48C40 SKU for 4600C platform (#8201)
*Added new SKU for SN4600C Platform: Mellanox-SN4600C-D48C40
Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
2021-07-19 10:07:35 -07:00
vmittal-msft
e7cec0928b
Updated SONIC buffer pool settings to accomodate SAI adjustment for Arista-7050CX3-32S-C32 (#8159) 2021-07-16 12:32:16 -07:00
chihhan123
2a06e079fa
[accton]: Support LED (1G) on AS7326-56X (#8185)
Modify micro code of custom_led.bin to support LED 1G
2021-07-16 07:47:05 -07:00
Vivek Reddy
f95f8ead9e
[Mellanox][master][SKU] sonic interface names are aligned to 4 instead of 8 for 4600/4600C platforms (#8155)
*Edited platform.json for 4600 & 4600C
*Edited hwsku.json and port_config.ini files for all the SKU's present under these platforms
Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
2021-07-13 18:59:48 -07:00
SuvarnaMeenakshi
ba29bd60d2
Revert "[multi-asic][vs]: Add context_config.json files for multi-asic vs (#7697)" (#8147)
This reverts commit a557dbd97e.
Reverting this PR as it is not required currently for multi-asic VS.
multi-asic VS will come up with multiple instances of swss and syncd. syncd will use default hwinfo string, same as in single asic VS.
2021-07-11 15:00:04 -07:00
Samuel Angebault
17f0217f30
[Arista] Chassis device configurations (#7529)
Add configurations for the following chassis elements

Fabrics 7804R3-FM, 7808R3-FM and 7808R3A-FM
Linecard 7800R3-48CQ2
Supervisor 7800-SUP*
2021-06-30 18:16:20 -07:00
Arun Saravanan Balachandran
0135ba275b
DellEMC S6100: Determine pcie.yaml revision based on firmware (#7875)
Why I did it
To determine the revision of the pcie.yaml to be used based on BIOS version in DellEMC S6100 platform.

Depends on: Azure/sonic-platform-common#195

How I did it
Added two revisions of pcie.yaml pcie_1.yaml and pcie_2.yaml
Included a platform-specific Pcie class to provide the revision of the pcie.yaml to be used by pcieutil/pcied.
How to verify it
Execute pcieutil check (Azure/sonic-utilities#1672) command and verify the list of PCIe devices displayed.
Logs: UT_logs.txt
2021-06-29 15:19:54 -07:00
arunlk-dell
1d9fd820a3
DellEMC: S5248F - Platform API 2.0 implementation (#7930)
#### Why I did it
Support API 2.0 for S5248F platform

#### How I did it
Making changes to S5248F platform specific directory

Co-authored-by: Arun LK <Arun_L_K@dell.com>
2021-06-28 09:44:49 -07:00
Aravind Mani
5b0106944c
DellEMC: Enable Z9332f LED firmware (#7964)
#### Why I did it
Front end LED fw is not loaded in DellEMC Z9332f.

#### How I did it
Enabled LED fw files
2021-06-28 09:15:29 -07:00
vmittal-msft
2483860fd0
MMU configuration for Z9332 systems in T0 and T1 topolgy (#7973)
Why I did it
MMU configuration for DellEMC Z9332 systems in T0/T1 topology

How I did it
Updated config.bcm, QoS/Buffer pool and lossy/lossless profile settings

How to verify it
Verified that Dell systems are booting up fine and basic test cases passing.
2021-06-25 18:34:19 -07:00
gechiang
6fc279b7c1
Add BRCM SOC Property to not count ACL drops towards interface RX_DRP… (#7945)
* Add BRCM SOC Property to not count ACL drops towards interface RX_DRP counter for 7050CX3 and 7260CX3 DualToR platforms
2021-06-23 18:09:47 -07:00
ngoc-do
0ba67df0f4
Add fabric lane mapping to vs (sai.profile) and HWSKU Force10-S6000 (#7629)
This PR is actually https://github.com/Azure/sonic-buildimage/pull/6185 that was merged and then reverted to avoid test failure in swss. 

Now https://github.com/Azure/sonic-swss/pull/1459/ merged, and so this PR could merge to enable fabric test in swss.

Signed-off-by: ngocdo <ngocdo@arista.com>
2021-06-23 10:26:39 -07:00
judyjoseph
3ad830eb49
New sonic-buildimage images for Broadcom DNX ASIC family. (#7598)
Introduce new sonic-buildimage images for Broadcom DNX ASIC family.

sonic-broadcom-dnx.bin
sonic-aboot-broadcom-dnx.swi

How I did it

NO CHANGE to existing make commands

make init; make configure PLATFORM=broadcom;  make target/sonic-aboot-broadcom.swi; make  target/sonic-broadcom.bin

The difference now is that it will result in new broadcom images for DNX asic family as well. 

sonic-broadcom.bin, sonic-broadcom-dnx.bin
sonic-aboot-broadcom.swi, sonic-aboot-broadcom-dnx.swi

Note: This PR also adds support for Broadcom SAI 5.0 (based on 1.8 SAI ) for DNX based platform + changes in platform x86_64-arista_7280cr3_32p4 bcm config files and platform_env.conf files
2021-06-22 11:12:22 -07:00
roberthong-qct
95c67d2d55
[Quanta] Add and update platform and device files (#6971)
Add device and platform code for ix7-bwde, ix8a-bwde.
Support platform API 2.0 for all quanta platforms except for ix1b

Co-authored-by: robert.hong <robert.hong@qct.io>
2021-06-21 09:24:41 -07:00
DavidZagury
9d1c1659bd
[Mellanox] Update SKUs to enable SDK dumps (#7708)
- Why I did it
To create SDK dump on Mellanox devices when SDK event has occurred.

- How I did it
Set the SKUs keys needed to initialize the feature in SAI.

- How to verify it
Simulate SDK event and check that dump is created in the expected path.
2021-06-21 16:41:18 +03:00
Aravind Mani
653ff2c986
Update DellEMC-Z9332f-M-O16C64 SKU settings (#7908) 2021-06-20 18:06:00 -07:00
Alexander Allen
d2e62af85d
[device][mellanox] Fix supported breakout modes on MSN4410 (#7853)
- Why I did it
The default breakout mode according to hwsku.json for the MSN4410 is 1x400G and this is not a supported breakout mode according to its platform.json

This causes a conflict on boot of this platform and no containers on the switch will init successfully.

- How I did it
Referenced the platform specification files and updated platform.json

- How to verify it
Install master version of SONiC on MSN4410
Boot switch and verify swss is successfully running using docker ps
2021-06-20 19:35:44 +03:00
madhanmellanox
4e206ba36e
Adding new SKU Mellanox-SN4600C-C4 (#7815)
Add new SKU of SN4600C switch: Mellanox-SN4600c-c64

Co-authored-by: Madhan Babu <madhan@r-build-sonic06.mtr.labs.mlnx>
2021-06-17 10:04:38 -07:00
abdosi
9f4359804e
Updated 7260 64x100 MMU Profile. (#7849)
What I did:

Updated 7260 MMU Profile based on latest MSFT Tier 1 Tomahawk2_MMU_Setting_48x100G_40m_16x100G_300m_v1.0 and
TH2_PGHdrm_MSFT.

How I verify:
Made sure image is up/traffic is flowing/mmu dump looked fine.
SAI qos test need will be updated to support this SKU.
2021-06-15 22:06:48 -07:00
Stephen Sun
80d01f2f9a
[Mellanox] Enhance Python3 support for platform API (#7410)
- Why I did it
Enhance the Python3 support for platform API. Originally, some platform APIs call SDK API which didn't support Python 3. Now the Python 3 APIs have been supported in SDK 4.4.3XXX, Python3 is completely supported by platform API

- How I did it
Start all platform daemons from python3
1. Remove #/usr/bin/env python at the beginning of each platform API file as the platform API won't be started as daemons but be imported from other daemons.
2. Adjust SDK API calls accordingly

- How to verify it
Manually test and run regression platform test

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2021-06-15 17:57:48 +03:00
Andriy Kokhan
12a04704ad
[Arista] Added pcie.yaml for x86_64-arista_7170_32cd (#7788)
Process pcied failed on Arista-7170-32CD-C32
```
root@sonic:/# supervisorctl 
chassis_db_init                  EXITED    Jun 03 08:48 AM
dependent-startup                EXITED    Jun 03 08:48 AM
ledd                             RUNNING   pid 28, uptime 3:07:49
lm-sensors                       EXITED    Jun 03 08:48 AM
pcied                            FATAL     Exited too quickly (process log may have details)
```

Signed-off-by: Andriy Kokhan <andriyx.kokhan@intel.com>
2021-06-09 22:08:47 -07:00
Ying Xie
b2a2cf0750
[7050] updating 7050 MMU configurations (#7801)
Why I did it
7050 S4Q31 mmu configuration is missing ALPM configurations, causing not enough memory reserved for routes. Orchagent crashes on a nightly testbed with 6400 route entries.

How I did it
Add the missing ALPM configurations.

How to verify it
Load the configuration on testbed and verified new configuration exists and no more crash.

Signed-off-by: Ying Xie ying.xie@microsoft.com
2021-06-05 21:50:01 -07:00
Santhosh Kumar T
5c4d3f2561
[DellEMC] Z9332: Change in i2c mapping (#7797)
#### Why I did it
- After [sonic-linux-kernel#177](https://github.com/Azure/sonic-linux-kernel/pull/177)  changes, the I2C mux channels of Baseboard and Switchboard CPLDs are moved from i2c-4 and i2c-5 to i2c-36 and i2c-37 respectively.
- This caused QSFP driver initialization of i2c-36 to i2c-41 to fail causing the ports from Ethernet208 to Ethernet248 fail.

#### How I did it
- The fix to this problem is to change the order of QSFP driver initialization to I2C mux channels.
- Instead of the order i2c-10 to i2c-41, the order i2c-4 to i2c-35 is being utilized.
- Also, need to change the i2c-mux-channel number for Baseboard CPLD and switchboard CPLD in scripts to access them.
2021-06-04 17:34:19 -07:00
賓少鈺
53663339a2
Per-switching silicon Common config for Broadcom Supported Platforms (#7493)
* Per-switching silicon Common config for Broadcom Supported Platforms

* Per-switching silicon Common config for Broadcom Supported Platforms

* Per-switching silicon Common config for Broadcom Supported Platforms

* Remove property readme

* Add common config readme
2021-06-03 23:18:02 -07:00
pettershao-ragilenetworks
b30cf44b93
[Platform/Ragile] Support RA-B6510-48v8c platform (#7620)
Add new platform x86_64-ragile_ra-b6510-48v8c-r0
ASIC Vendor: Broadcom
Switch ASIC: Trident 3
Port Config: 48x25G+8x100G

Signed-off-by: pettershao-ragilenetworks <pettershao@ragilenetworks.com>
2021-06-03 10:51:01 -07:00
jostar-yang
b2c74afeb5
[AS5835-54x] Add get_status api and fix bug to fan.py (#7784)
Add get_status api and fix for read fan direction sysfs to fan.py

Signed-off-by: Jostar Yang <jostar_yang@accton.com.tw>
2021-06-03 08:43:26 -07:00
SuvarnaMeenakshi
a557dbd97e
[multi-asic][vs]: Add context_config.json files for multi-asic vs (#7697)
hwskus.
Why I did it
For multi-asic platforms, orchagent process in swss docker is started by passing device_ids(or asic_ids).
Each swss docker starts orchagent with a different device_id. This device_id is passed as Hardware info to syncd. For syncd to start with the right hwinfo, context_config.json is passed as an argument. context_config.json file is looked up to get the hwinfo information.
sonic-sairedis PRs required for this diff to be used to bring up multi-asic VS:
Azure/sonic-sairedis#830
Azure/sonic-sairedis#832

How I did it
Add context_config.json for each asic in the same structure as provided here: https://github.com/Azure/sonic-sairedis/blob/master/lib/src/context_config.json
Each asic context_config.json will have different hwinfo string.
hwinfo string will be same as device id retrieved from asic.conf file.
Signed-off-by: Suvarna Meenakshi <sumeenak@microsoft.com>
2021-06-01 10:18:26 -07:00
Stephen Sun
132420095a
[Mellanox] Support buffer configuration for 2km cables (#7337)
#### Why I did it
Support 2km cables for Microsoft SKUs

#### How I did it
1. Update pg_profile_lookup.ini with 2000m cable supported
2. Update buffer configuration for t1 with uplink cable 2000m
  - For SN3800 platform:
    - C64:
      - t0: 32 100G down links and 32 100G up links.
      - t1: 56 100G down links and 8 100G up links with 2 km cable.
    - D112C8: 112 50G down links and 8 100G up links.
    - D24C52: 24 50G down links, 20 100G down links, and 32 100G up links.
    - D28C50: 28 50G down links, 18 100G down links, and 32 100G up links.
  - For SN2700 platform:
    - D48C8: 48 50G down links and 8 100G up links.
    - C32:
      - t0: 16 100G down links and 16 100G up links.
      - t1: 24 100G down links and 8 100G up links with 2 km cable.
  - For SN4600C platform:
    - D112C8: 112 50G down links and 8 100G up links.

#### How to verify it
Run regression test
2021-05-30 20:07:10 -07:00
Neetha John
239a1cc1df
Rename AristaQX-32S skus (#7751)
This PR contains the following changes
Original Arista-7050-QX-32S sku (32x40G ports) has been renamed to Arista-7050QX32S-Q32
Arista-7050-QX-32S is symlinked to Arista-7050QX-32S-S4Q31 (4x10G, 31x40G ports)

Signed-off-by: Neetha John <nejo@microsoft.com>
2021-05-28 22:46:49 -07:00
Wirut Getbamrung
4ae6d3f5c9
[device/celestica]: Fix remaining failed test cases of Seastone-DX010 platform API (#7743)
**- Why I did it**
- To fix failed test cases of Seastone-DX010 platform APIs that found on [platform_tests](https://github.com/Azure/sonic-mgmt/tree/master/tests/platform_tests/api) script

**- How I did it**
1. Add device/celestica/x86_64-cel_seastone-r0/platform.json 
2. Update functions to support python3.7
3. Add more functions follow latest sonic_platform_base
4. Fix the bug
2021-05-28 12:56:09 -07:00
jostar-yang
0c5c4872dc
[as5835-54x] Add to support API2.0 (#6480)
Add platform API 2.0 support for as5835-54x platform
2021-05-28 10:50:49 -07:00
Kebo Liu
bf21dbce87
[Mellanox] Add support for MSN4600 A1 system (#7732)
Add new sensor conf for MSN4600 A1 system
Add a Mellanox hw-management patch to support MSN4600 A1 system
2021-05-27 09:52:45 -07:00
Ying Xie
a42aa3d316
[MMU] define T1 MMU configuratino for Arista-7260CX3-Q64 (#7718)
Why I did it
Arista-7260CX3-Q64 is missing T1 MMU configuration.

How I did it
Define T1 MMU configuration for Arista-7260CX3-Q64.

Signed-off-by: Ying Xie <ying.xie@microsoft.com>
2021-05-27 08:20:07 -07:00
Volodymyr Boiko
3edb4f1ebe
[barefoot][device] Drop platform API 1.0 (#7716)
#### Why I did it
To get rid of obsolete code

#### How I did it
Removed plugins folder from device/barefoot

Signed-off-by: Volodymyr Boyko <volodymyrx.boiko@intel.com>
2021-05-26 11:55:25 -07:00
Volodymyr Boiko
4448771088
[barefoot][device] Support pcied on Mavericks (#7705)
Add pcie.yaml to enable pcied on Mavericks platform

Signed-off-by: Volodymyr Boyko <volodymyrx.boiko@intel.com>
2021-05-25 13:48:17 -07:00
Kebo Liu
953f91343a
[Mellanox] Update the Spectrum-2 platform PSU sensor's label in the sensor conf file (#7706)
#### Why I did it
The label for PSU related sensors on the Spectrum-2 platform is not aligned with the physical location of the PSU. 

#### How I did it
Update the label in the sensor conf file for those relevant platforms

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2021-05-25 10:41:53 -07:00
Neetha John
6f884b7278
Update PG profile settings for Arista-7050QX-32S-S4Q31 (#7673)
Signed-off-by: Neetha John <nejo@microsoft.com>

Why I did it
PG profile settings need to be aligned with Arista-7050-QX-32S

How I did it
Copy over the current settings from Arista-7050-QX-32S and define params for 10G and 1G speeds as well
2021-05-24 17:15:37 -07:00
Neetha John
f744f9354c
Update MMU and QOS settings for Arista-7050QX-32S-S4Q31 (#7672)
Signed-off-by: Neetha John <nejo@microsoft.com>

Why I did it
Need proper MMU and Qos settings for Arista-7050QX-32S-S4Q31

How I did it
Updated the settings based on Arista-7050-QX-32S
2021-05-24 09:33:33 -07:00
tomer-israel
b1a7f670d7
[Mellanox] Add initial support for SN4800 for simulation device (#7448)
#### Why I did it
Add initial support of SN4800 platform for Mellanox ASIC simulation device.
NOTE: This is work in progress and not full support of the platform.

#### How I did it
Add new folders for SN4800 with zero ports based on SN4700 Spectrum-3 switch.
2021-05-18 09:34:33 -07:00
Prince Sunny
ea80325726
Vxlan src port range for breakout SKU (#7612)
*Extended Vxlan src port range for lab breakout SKU - Mellanox-SN3800-D112C8
2021-05-14 08:58:51 -07:00
vmittal-msft
aae315faaf
Updated MMU settings for Arista-7050CX3-32S-C32 T1 topology (#7597) 2021-05-12 21:28:19 -07:00
SeanWu
9b4ed6e6df
[accton] Add sensors.conf to multiple models (#7494)
#### Why I did it
Improve readability of `show environment` output.

#### How I did it
In all sensors.conf, give the customized labels according to HW specifications for each model.

Signed-off-by: Sean Wu <sean_wu@edge-core.com>
2021-05-12 12:42:20 -07:00
tomer-israel
3ccc45f5b8
[Mellanox] Add initial support for SN4800 platform (#7447)
- Why I did it
Add initial support of SN4800 platform .
NOTE: This is work in progress and not full support of the platform.

- How I did it
Add new folders for SN4800 with zero ports based on SN4700 Spectrum-3 switch.

- How to verify it
Simulator device was tested. See #7448
2021-05-12 22:21:04 +03:00
ec-michael-shih
a070f1a239
[Platform] Accton add to support as9726-32d platform. (#7479)
Add support for Accton as9726-32d platform

This pull request is based on as9716-32d, so I reference as9716-32d to create new model: as9726-32d.
This module do not need led driver to control led, FPGA can handle it.
I also implement API2.0(sonic_platform) for this model, CPLD driver, PSU driver, Fan driver to control these HW behavior.
2021-05-11 19:06:36 -07:00
Kebo Liu
629f4459d7
[Mellanox] Align PSU fan name in platform.json with latest change in PR #7490 (#7557)
The PSU fan name convention was changed from "psu_{}_fan_{}" to "psu{}_fan{}" in PR #7490, platform.json need to be changed and aligned.
2021-05-07 09:42:40 -07:00
Samuel Angebault
e7c26fb0c9
[Arista] Update platform configurations and library (#7527)
Platform library changes
 - Fix the use of /proc/modules during testing, fixes #7463
 - Add `libsfp-eeprom.so` build to read/write xcvr eeproms in C
 - Add some more reboot-cause information
 - Write down temperature hw thresholds to the sensors
 - Report software thresholds through platform api
 - Writ `port_name sysfs` file of optoe`
 - Tests enhancements
 - Fix dependency issues for chassis provisioning

Platform configuration changes
 - Add `pcie.yaml` configuration for a few platforms
 - Mount `libsfp-eeprom.so` inside `pmon`
 - Fix `Arista-7050SX3-48C8` and `Arista-7050SX3-48YC8' platform and hwsku
 - Miscellaneous fixes

Co-authored-by: Boyang Yu <byu@arista.com>
Co-authored-by: Zhi Yuan Carl Zhao <zyzhao@arista.com>
2021-05-06 10:59:22 -07:00
Junchao-Mellanox
a795bc0b8e
[Mellanox] Support new sensor conf file for MSN4700 A1/A0 (#7535)
#### Why I did it

MSN4700 A1/A0 used different sensor chip but keep the existing platform name *x86_64-mlnx_msn4700-r0*, this is a workaround to replace the sensor conf on MSN4700 A1/A0

#### How I did it

Use a shell script to get the sensor conf path and copy that files to /etc/sensors.d/sensors.conf
2021-05-06 10:13:26 -07:00
Aravind Mani
e7db9fe46c
DellEMC: Z9332f media settings (#7485)
Changed DellEMC Z9932f media settings from Vendor Name + PN method to common method.
2021-05-05 06:50:24 -07:00
Andriy Yurkiv
e52fdcfd72
[Mellanox] Add support to VXLAN src port range setting via SAI profile for r SN3800-D28C49S1 (#7500)
- Why I did it
Enable VXLAN src port range configuration via SAI profile for Mellanox-SN3800-D28C49S1 SKU

- How I did it
Added SAI_VXLAN_SRCPORT_RANGE_ENABLE=1 configuration to appropriate sai.profile

Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com>
2021-05-04 17:34:33 +03:00
Kebo Liu
5ac048f7e7
[Mellanox] Enhance the platform.json with adding more platform device facts. (#7495)
#### Why I did it

Current platform.json lacks some peripheral device related facts, like chassis/fan/pasu/drawer/thermal/components names, numbers, etc.

#### How I did it

Add platform device facts to the platform.json file

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2021-05-03 12:22:13 -07:00
Wirut Getbamrung
cfda77b3de
[device/celestica]: Add thermalctld support on Haliburton platform APIs (#6493)
- Removed the old function for detecting a faulty fan.
- Removed the old function for detecting excess temperature.
- Implement thermal_manager APIs based on ThermalManagerBase
- Implement thermal_conditions APIs based on ThermalPolicyConditionBase
- Implement thermal_actions APIs based on ThermalPolicyActionBase
- Implement thermal_info APIs based on ThermalPolicyInfoBase
- Add thermal_policy.json
2021-05-03 09:14:35 -07:00
guxianghong
be4cf09b5d
[Centec][arm64] support new board E530-48s4x and E530-24x2q (#7189)
1. support new board E530-48s4x E530-24x2q
2. optimize platform driver for Centec TsingMa board

Co-authored-by: shi lei <shil@centecnetworks.com>
2021-05-01 10:37:07 -07:00
vmittal-msft
68dfa704b3
Updated Qos/MMU settings for Arista-7050CX3-32S-C32 & Arista-7050CX3-32S-D48C8 (#7068)
* TD3 Qos/MMU settings for Arista-7050CX3-32S-C32 & Arista-7050CX3-32S-D48C8
2021-04-30 10:02:08 -07:00
Andriy Yurkiv
21009be840
[devices][hwsku] add support to VXLAN src port range feature (#7394)
Enable VXLAN src port range configuration via SAI profile
2021-04-29 10:05:02 -07:00
Junchao-Mellanox
e58348733d
[Mellanox] Fix platform json for MSN2100 (#7345)
2x40G is not supported on MSN2100, need remove it from platform.json
2021-04-27 16:26:42 -07:00
zzhiyuan
5f435f2296
[Arista] Add DPB for 7060CX-32S (#7413)
#### Why I did it
- To start support of dynamic port breakout as the norm for Arista platforms.
- Add a DPB hwsku for the 7060CX-32S

#### How I did it
- Expand platform.json for the 7060CX-32S
- Added a new hwsku specifically for DPB
- Added a flex Broadcom configuration

Co-authored-by: Zhi Yuan Carl Zhao <zyzhao@arista.com>
2021-04-27 11:03:20 -07:00
jostar-yang
93ceb3933e
[as7726-32x] Support PDDF (#7398)
Add PDDF support for Accton as7726-32x platform

Signed-off-by: Jostar Yang <jostar_yang@accton.com.tw>
2021-04-27 11:01:40 -07:00
Christian Svensson
186e1b9b57
[arista] Add DPB for Arista 7050 QX32 (#7342)
This change introduces dynamic port breakout (DPB) for Arista 7050 QX32 model by adding a new SKU suffixed with `-Flex`.

The breakout configuration allowed is the same as in mainline Arista EOS, i.e. 24 first ports are allowed to be used in 4x10G in addition to the default 40G mode. The last 8 ports are fixed to 40G. This is due to ASIC limitations of a total of 104 max ports.

**NOTE**: As described in https://github.com/aristanetworks/sonic/issues/30#issuecomment-820584113 front panel LEDs are likely not working when operating in breakout mode. It is not clear if the LEDs work correctly in 40G mode as I have not had a chance to physically inspect the switch with this patch.

Signed-off-by: Christian Svensson <blue@cmd.nu>
2021-04-27 10:57:07 -07:00
madhanmellanox
29763cd095
Adding new SKU Mellanox-SN3800-D28C49S1 (#7404) 2021-04-23 09:19:56 -07:00
Prince Sunny
dd4d2a75f0
[Broadcom] Set hierarchical ecmp levels to 2 (#7370)
Set hierarchical ecmp level to 2 instead of 3. Based on CS00011833367, ecmp level must be set to 2.
This is already handled for TH2 platforms. Change is required only for TD3

Co-authored-by: Ubuntu <prsunny@prince-vm.vzw1i4tqyeburcdz5lrgulxi2c.yx.internal.cloudapp.net>
2021-04-21 13:22:52 -07:00
shlomibitton
b0bfa2b86b
[Mellanox] Fix for all Spectrum based systems: SAI profile speed configurations (#7119)
Fix to the correct value for all SPC1 devices.
For 10G added 10GB_CX4_XAUI, 10GB_KX4, 10GB_KR, 10GB_SR and 10GB_ER_LR
For 50G added 50GB_SR2

This bitmask represents all the options available for interface type and some were missing.
Note: it was working just fine if you were setting the value from SONiC CLI but not from the default SAI Profile.

Signed-off-by: Shlomi Bitton <shlomibi@nvidia.com>
2021-04-19 10:03:15 -07:00
dereksun01
3b4aa00e26
[device] Add as5835_54x configuration (#6970)
Add configuration files:
- mv2-as5835-48x10G+6x100G.config.bcm
- sai.profile
- led_proc_init.soc
- custom_led.bin

Signed-off-by: derek_sun <ecsonic@edge-core.com>
2021-04-19 08:56:12 -07:00
jostar-yang
ee728aab7b
[as7326-56x] Add to support PDDF (#7176)
Support PDDF on the as7326-56x platfrom

Signed-off-by: Jostar Yang <jostar_yang@accton.com.tw>
2021-04-15 09:39:15 -07:00
jostar-yang
6641a6b1a1
[as9716-32d] Add to support PDDF (#6902)
Add PDDF support for Accton as9716-32d platform

Co-authored-by: Jostar Yang <jostar_yang@accton.com.tw>
2021-04-14 14:43:52 -07:00
jostar-yang
b4b9e4234f
[as7816-64x] Add to support PDDF (#7077)
Add PDDF support for Accton as7816-64x platform

Co-authored-by: Jostar Yang <jostar_yang@accton.com.tw>
2021-04-14 14:40:52 -07:00
Aravind Mani
95fecafdf9
Dell S6100: Modify transceiver change event from interrupt to poll mode (#7309)
#### Why I did it

- xcvrd crash was seen in latest 201811 images.
- For Dell S6100,API 2.0 uses poll mode while 1.0 was still using interrupt mode.

#### How I did it

- Modified get_transceiver_change_event in 1.0 to poll mode.
2021-04-14 12:12:30 -07:00
Kebo Liu
ef98890e6e
[Mellanox] Fix incomplete platform name for MSN4600C in sfputil plugin (#7259)
The platform name for MSN4600C in sfputil pliugin is not complete: "x86_64-mlnx_msn4600c" -> "x86_64-mlnx_msn4600c-r0"

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2021-04-08 10:15:31 -07:00
Aravind Mani
d027aee7df
DellEMC Z9332f change port alias (#7260) 2021-04-08 09:47:20 -07:00
Stephen Sun
46a7fac1aa
Bug fix: Support dynamic buffer calculation on ACS-MSN3420 and ACS-MSN4410 (#7113)
- Why I did it
Add missed files for dynamic buffer calculation for ACS-MSN3420 and ACS-MSN4410

- How I did it
asic_table.j2: Add mapping from platform to ASIC
Add buffer_dynamic.json.j2 for ACS-MSN4410.

- How to verify it
Check whether the dynamic buffer calculation daemon starts successfully.

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2021-04-07 20:33:15 +03:00
Danny Allen
fca7b2429d
Revert "Add fabric lane mapping to vs (sai.profile) and HWSKU Force10-S6000 (#6185)" (#7250)
This reverts commit c2b5e931a2.
2021-04-07 09:57:16 -07:00
ngoc-do
c2b5e931a2
Add fabric lane mapping to vs (sai.profile) and HWSKU Force10-S6000 (#6185)
Signed-off-by: ngocdo <ngocdo@arista.com>
2021-04-07 09:10:40 -07:00
Aravind Mani
e6afc5ad9a
Add DellEMC Z9332f pre-emphasis settings (#6984) 2021-04-05 09:44:37 -07:00
Wirut Getbamrung
fbcb9403e8
[device/celestica]: Fix failed test cases of DX010 platform APIs (#6564)
1. Add device/celestica/x86_64-cel_seastone-r0/platform.json 
2. Update functions to support python3.7
3. Add more functions follow latest sonic_platform_base
4. Fix the bug

Co-authored-by: 119064273 <2276096708@qq.com>
Co-authored-by: Eric Zhu <erzhu@celestica.com>
Co-authored-by: doni@celestica.com <doni@celestica.com>
2021-04-02 10:08:31 -07:00
Ying Xie
197dd4e675
[e1031] add GbE and higig port to E1031 port_config.ini (#7208)
Why I did it
These ports are being enumerated by the latest SAI. But they are not defined in port_config.ini.

SONiC end up trying to delete these 3 ports and hit SAI error and crash.

How I did it
Add the GbE and the 2 HiGig ports in the port_config.ini.

How to verify it
Put the port_config.ini on a device crashing with port deleting. load minigraph and the crash stopped.

Signed-off-by: Ying Xie ying.xie@microsoft.com
2021-04-01 07:46:03 -07:00
gechiang
6f65b42e4c
7260cx3 DualToR config.bcm support based on DualToR setting in device metadata at boot time (#7168)
* 7260cx3 DualToR config.bcm support based on DualToR setting in device metadata at boot time. 
For HWSKU Arista-7260CX3-C64 the MMU setting SOC for T0/T1 is also combined into the config.bcm.j2 logic so use just one config file and adding delta based on Switch Roles.
2021-03-31 14:23:24 -07:00
Volodymyr Boiko
e5255b3d39
[device][barefoot] Skip psud for Newport (#7200)
Temporary skip psud for Newport, for Barefoot needs.

Signed-off-by: Volodymyr Boyko <volodymyrx.boiko@intel.com>
2021-03-31 12:55:40 -07:00
Dmytro Shevchuk
d8627e6414
[yang] update yang model, add autoneg to sonic-port (#5963)
Dynamic Port Breakout fall in case "autoneg" field exist in config_db.

- How I did it
Added "autoneg" field in sonic-port yang model.

- How to verify it
Add "autoneg" field into config_db like this:

"Ethernet8": {
    "index": "2", 
    "lanes": "8,9,10,11", 
    "fec": "rs", 
    "pfc_asym": "off", 
    "mtu": "9100", 
    "alias": "Ethernet8", 
    "admin_status": "up", 
    "autoneg": "on", 
    "speed": "100000",
},
2021-03-30 08:27:58 -07:00
Junchao-Mellanox
48042b7256
[Mellanox] Use softlink for sfputils on MSN4410 platform (#7092)
The file device/mellanox/x86_64-mlnx_msn4410-r0/plugins/sfputil.py is not a software link for device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfputil.py. And it is still using python2 syntex which causes some SFP CLI error. The PR is to change it to a softlink and add 4410 support in device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfputil.py.
2021-03-27 11:56:48 -07:00
Ying Xie
832e63554a
[Arista] add MMU configuration for Arista 7260 C64 (#7027)
Signed-off-by: Ying Xie <ying.xie@microsoft.com>
2021-03-26 11:10:19 -07:00
Lior Avramov
d19bb02ce4
[Mellanox]: Fix PCIEd configuration files for SN3700 system (#7058)
Update with correct PCI addresses

Signed-off-by: liora <liora@nvidia.com>
2021-03-15 21:06:12 -07:00
vpsubramaniam
4aa3c6f488
Skip thermalctld for DellEMC S5248F platform (#7022)
Skip thermalctld in DellEMC S5248F platform since it requires platform API support

Co-authored-by: V P Subramaniam <Subramaniam_Vellalap@dell.com>
2021-03-12 11:53:36 -08:00
Volodymyr Boiko
b60d1fc526
[barefoot][device] Enable thermalctld (#7005)
Enable thermalctld on Barefoot platforms

Signed-off-by: Volodymyr Boyko <volodymyrx.boiko@intel.com>
2021-03-12 11:51:45 -08:00
madhanmellanox
721948f3e4
[mellanox]: Fixing wrong index in Mellanox-SN3800-D28C50 SKU (#7032)
Co-authored-by: Madhan Babu <madhan@l-csi-0241l.mtl.labs.mlnx>
2021-03-11 20:16:51 -08:00
vpsubramaniam
377ea1a229
DellEMC: Z9332F - Watchdog support, add platform.json, new platform API implementation and fixes (#6988)
Incorporate the below changes in DellEMC Z9332F platform:

- Implemented watchdog platform API support
- Implement ‘get_position_in_parent’, ‘is_replaceable’ methods for all device types
- Change return type of SFP methods to match specification in sonic_platform_common/sfp_base.py
- Added platform.json file in device directory.

Co-authored-by: V P Subramaniam <Subramaniam_Vellalap@dell.com>
2021-03-10 10:49:33 -08:00
Wirut Getbamrung
6ae2cb5607
[device/celestica]: Add xcvrd event support for Haliburton (#6517)
#### Why I did it
- The xcvrd service requires an event detection function, unplug or plug in the transceiver.

#### How I did it
- Add sysfs interrupt to notify userspace app of external interrupt
- Implement get_change_event() in chassis api.
- Also begin installing Python 3 sonic-platform package for Celestica platforms
2021-03-08 10:10:11 -08:00
Dror Prital
b85caa581f
[DPB] [Mellanox] added capability files for SN2700-D40C8S8 SKU (#6878)
#### Why I did it

Additional file for DPB in order to support SKU SN2700-D40C8S8 on master

#### How I did it

Add hwsku.json file

#### How to verify it

Enforce  "Mellanox-SN2700-D40C8S8 SKU on Master and see it works as expected, meaning:

Port 1/3 will be used as 4x10G
Port 2/4 - Not exist (blocked since 1 and 3 split to 4)
Port 7/8/9/10/23/24/25/26 will used as 100G
All other ports will be used as 2x50G

This PR should be added on top of PR:
https://github.com/Azure/sonic-buildimage/pull/6876

#### Description for the changelog

Adding hwsku.json file to SN2700-D40C8S8 SKU
2021-03-05 12:43:22 -08:00
Samuel Angebault
178688b415
[Arista] Refresh device folder for DCS-7060DX4-32 (#6942)
As booting on DCS-7060DX4-32 would use the default sku of DCS-7060PX4-32 which is not compatible, 
thus move some files around to properly separate the configurations that are device specific.

Signed-off-by: Samuel Angebault <staphylo@arista.com>
2021-03-05 11:23:47 -08:00
Junchao-Mellanox
0e071493de
Change buffer config for new SKU Mellanox-SN2700-D40C8S8 (#6926)
#### Why I did it

Change buffer config for new SKU Mellanox-SN2700-D40C8S8

#### How I did it

Reuse the buffer config of SKU Mellanox-SN2700-D48C8

#### How to verify it

Run sonic-mgmt qos test and all passed
2021-03-04 14:12:59 -08:00
DavidZagury
724785db15
[DPB] [Mellanox] Fix files for SN4600 platform (#6930)
- Why I did it
Fix the build and fix the SN4600 DPB support

- How I did it
Fix port configuration file for SN4600 based on recent changes

- How to verify it
System bringup is completed, all interfaces are up.
Platform tests suits all is passing.
2021-03-02 07:35:18 +02:00
Srideep
0f1d41dac2
[DellEMC:Z9332f] Modify SKU-DellEMC-Z9332f-M-O16C64 to support different port-config (#6906) 2021-03-01 09:53:35 -08:00
DavidZagury
08202017d9
[DPB] [Mellanox] added capability files for SN4600 platform (#6887)
- Why I did it
To add support for the dynamic breakout on Mellanox platform x86_64-mlnx_msn4600

- How I did it
Add the relevant files describing Mellanox platform x86_64-mlnx_msn4600 breakout modes to a new device folder.

- How to verify it
System bringup is completed, all interfaces are up.
Platform tests suits all is passing.
2021-03-01 12:43:33 +02:00
Lior Avramov
bc1ed0a516
[Mellanox]: Fix PCIEd configuration files for SN3700 and SN3800 systems (#6913)
- Why I did it
To fix PCIEd errors in log.

- How I did it
Update pcie.yaml with the right PCI addresses.

- How to verify it
Check logs, operation occurs each minute.

Signed-off-by: liora <liora@nvidia.com>
2021-03-01 12:36:18 +02:00
Nazarii Hnydyn
39b1c12731
[Mellanox]: Fix PCIEd config for SN4600c (#6892)
Signed-off-by: Nazarii Hnydyn <nazariig@nvidia.com>
2021-02-26 00:28:32 -08:00
Nazarii Hnydyn
923dc52f15
[Mellanox]: Fix PCIEd config for SN4600 (#6894)
Signed-off-by: Nazarii Hnydyn <nazariig@nvidia.com>
2021-02-26 00:28:17 -08:00
Sangita Maity
18263c99dd
[DPB|master] Update Dynamic Port Breakout Logic for flexible alias support a… (#6831)
To fix [DPB| wrong aliases for interfaces](https://github.com/Azure/sonic-buildimage/issues/6024) issue, implimented flexible alias support [design doc](https://github.com/Azure/SONiC/pull/749)

> [[dpb|config] Fix the validation logic of breakout mode](https://github.com/Azure/sonic-utilities/pull/1440) depends on this

#### How I did it

1. Removed `"alias_at_lanes"` from port-configuration file(i.e. platfrom.json) 
2. Added dictionary to "breakout_modes" values. This defines the breakout modes available on the platform for this parent port, and it maps to the alias list. The alias list presents the alias names for individual ports in order under this breakout mode.
```
{
    "interfaces": {
        "Ethernet0": {
            "index": "1,1,1,1",
            "lanes": "0,1,2,3",
            "breakout_modes": {
                "1x100G[40G]": ["Eth1"],
                "2x50G": ["Eth1/1", "Eth1/2"],
                "4x25G[10G]": ["Eth1/1", "Eth1/2", "Eth1/3", "Eth1/4"],
                "2x25G(2)+1x50G(2)": ["Eth1/1", "Eth1/2", "Eth1/3"],
                "1x50G(2)+2x25G(2)": ["Eth1/1", "Eth1/2", "Eth1/3"]
            }
        }
}
```
#### How to verify it
`config interface breakout`

Signed-off-by: Sangita Maity <samaity@linkedin.com>
2021-02-26 00:13:33 -08:00
Joe LeVeque
c6178259fc
[Celestica] Ensure concrete platform API classes call base class initializer (#6852)
In preparation for the merging of Azure/sonic-platform-common#173, which properly defines class and instance members in the Platform API base classes.

It is proper object-oriented methodology to call the base class initializer, even if it is only the default initializer. This also future-proofs the potential addition of custom initializers in the base classes down the road.
2021-02-25 11:20:53 -08:00
ec-michael-shih
66e3e51f70
[Platform] Accton add to support as4630-54te platform. (#6683)
Add support for Accton as4630-54te platform
2021-02-25 10:47:38 -08:00
DavidZagury
5aee92e56d
[Mellanox] Add support for SN4600 system (#6879)
- Why I did it
Add support for new 64x200G SN4600 systems

- How I did it
Add all relevant files (w/o platform.json and hwsku.json as they will come later) with default SKU.

- How to verify it
Install image on switch, verify all ports are up and configured properly, run full platform SONiC tests.
2021-02-25 09:30:43 +02:00
ruijie.com.cn
a582c13e98
[Ruijie] Add ruijie platform & device (#4954)
Add new platform x86_64-ruijie_b6510-48vs8cq-r0 (Trident 3)
    ASIC Vendor: Broadcom
    Switch ASIC: Trident 3
    Port Config: 48x25G+8x100G

Signed-off-by: tim-rj <sonic_rd@ruijie.com.cn>
2021-02-24 16:45:27 -08:00
rkdevi27
a37824ff0c
[dell/s6000]: Enable graceful reboot in S6000 (#6835)
The S6000 devices, the cold reboot is abrupt and it is likely to cause issues which will cause the device to land into EFI shell. Hence the platform reboot will happen after graceful unmount of all the filesystems as in S6100.

Moved the platform_reboot to platform_reboot_override and hooked it to the systemd shutdown services as in S6100
2021-02-24 12:00:24 -08:00
Dror Prital
51eee8ccce
Add new SKU of Mellanox-SN2700-D40C8S8 (#6876)
#### Why I did it

Add new SKU for SN2700 Mellanox system that supports the following port configuration:
8 X 100G
40 X 50G
8 X 10G

#### How I did it

Add new Folder - "Mellanox-SN2700-D40C8S8" under /sonic-buildimage/device/mellanox/x86_64-mlnx_msn2700-r0/
that contains the relevant files supporting this SKU

the buffers are based on SKU: D48C8 . Later on it will be configured specific for this SKU

#### How to verify it

Bring up the image, run "show interface status" and make sure that all ports are up and reflect the following requirement:
Port 1/3 will be used as 4x10G
Port 2/4 - Not exist (blocked since 1 and 3 split to 4)
Port 7/8/9/10/23/24/25/26 will used as 100G
All other ports will be used as 2x50G

#### Which release branch to backport (provide reason below if selected)

- [ ] 201811
- [ ] 201911
- [ ] 202006
- [X] 202012

#### Description for the changelog

Support new SKU under the name of SN2700-D40C8S8
2021-02-24 10:34:12 -08:00
SuvarnaMeenakshi
d88e8cf87b
[multi-asic][vs]: Add new multi-asic vs hwsku with four asics (#6558)
- Why I did it
Current mutli-asic vs hwsku consists of 6 asics with each asic having 32 interfaces. When bringing this up, below issue was seen:
When all 32 interfaces(sonic interfaces and linux interface) are set to 9100 mtu, DMA error is seen "DMA: Out of SW-IOMMU space for 4096 bytes at device 0000:06:03.0" which can be fixed by updating swiotlb=65536 in /host/grub/grub.cfg .In order to keep multi-asic VS lighter and easier to bring up and test, new hwsku 'msft_four_asic_vs' is added to represent 4-asic hwsku with 2 frontend asics and 2 backend asics and each asic having 8 interfaces interconnected by port-channels.
- How I did it
Add msft_four_asic_hwsku directory to have the right number of directories (4) and update port_config.ini and lanemap.ini files to include 8 ports information.
Add topology.sh script to create the internal asic-asic connectivity.
- How to verify it
Update asic.conf with the 4 asic information as below and build sonic-vs.img:
NUM_ASIC=4
DEV_ID_ASIC_0=0
DEV_ID_ASIC_1=1
DEV_ID_ASIC_2=2
DEV_ID_ASIC_3=3
Modify sonic_multiasic.xml to have 8 front panel interfaces.
create virtual switch using "sudo virsh sonic_mutliasic.xml" command.
Start topology service and Load config_db files for switch and each asic.
Ensure that that all internal interfaces and port_channels are coming up.
multi-asic vs testbed:
Bring up mutli-asic VS testbed with a multi-asic image(asic.conf updated to 4 asics) and using t1-lag topology.
./testbed-cli.sh -t vtestbed.csv -m veos_vtb -k ceos add-topo vms-kvm-four-asic-t1-lag password.txt
Load minigraph/config_dbs.
Ensure all internal and external interfaces come up.
No change on single asic vs.
2021-02-23 13:36:26 -08:00
Volodymyr Boiko
8ec75803a7
[barefoot][device][platform] Moved pcie.yaml (#6862)
To fix #6860

Signed-off-by: Volodymyr Boyko <volodymyrx.boiko@intel.com>
2021-02-23 13:16:42 -08:00
dflynn-Nokia
cbe7493b8e
[Nokia ixs7215] Platform API 2.0 improvements (#6787)
- Improve sonic-mgmt platform test suite pass rate
- Improve coverage of platform unit tests
- Provide platform specific reboot logic as per platform porting guide
- Fix bug due to pcie.yaml file being located in the wrong directory
2021-02-23 09:25:14 -08:00
Aravind Mani
3aee87d6dc
Dell S6000,S6100 system health changes (#6788)
Needed support for platform system health in Dell platforms
2021-02-22 23:26:59 -08:00
Sujin Kang
d5238ae8dd
[pcie.yaml] Move pcie configuration file path to platform directory (#6475)
- Why I did it
The pcie configuration file location is under plugin directory not under platform directory.
#6437

- How I did it

Move all pcie.yaml configuration file from plugin to platform directory.
Remove unnecessary timer to start pcie-check.service
Move pcie-check.service to sonic-host-services
- How to verify it
Verify on the device
2021-02-21 08:27:37 -08:00
Samuel Angebault
5fb374b03d
[Arista] Driver and platform update (#6468)
- Add support for `DCS-7050SX3-48YC8` and `DCS-7050SX3-48C8` platform
 - Add support for more variants of `DCS-7280CR3-32[PD]4`
 - Add Supervisor to Linecard consutil support
 - Complete Watchdog platform API support
 - Fix some PSU behavior on `DCS-7050QX-32` and `DCS-7060CX-32S`
 - Fix SEU management on `DCS-7060CX-32S`
 - Allow kernel modules to build up to linux 5.10
 - Rename led color `orange` to `amber`
 - Miscellaneous fixes
2021-02-19 10:48:52 -08:00
SuvarnaMeenakshi
5a49a0f499
[multi-asic][vs]: Update topology script to retrieve hwsku from minigraph (#6219)
Update topology script to retrieve hwsku from minigraph
if hwsku information is not available in config_db.
Fix clean up of interfaces in msft_multi_asic_vs hwsku
topology script.
- Why I did it
When bringing up multi-asic VS switch, topology service is started during boot up.
Topology service starts a shell script which runs the topology script present in /usr/share/sonic/device// directory. To invoke hwsku specific script, the topology script tries to retrieve hwsku information from config_db.
During initial boot up config_db might not be populated. In order to start topology service before config_db is updated,
update topology script to get hwsku information from minigraph.xml if it is available.
This will be helpful to bring up multi-asic VS testbed by loading minigraph and starting topology service.
- How I did it
Update topology.sh script to retrieve hwsku information from minigraph.xml.
Fix clean up function on msft_multi_asic_vs toplogy script.
- How to verify it
single-asic VS - no change; topology service is only enabled for multi-asic VS.
multi-asic VS - Bring up multi-asic VS image, copy minigraph to vs image, start topology service. Topology service should be successful.
to test clean up function fix, start topology service - make sure interfaces are created and moved to the right namespaces.
stop topology service - make sure namespace do not have any interface and all front end interfaces are present in default namespace.
2021-02-18 22:02:29 -08:00
shlomibitton
2076260180
Fix for Mellanox-SN4600C-D112C8 SKU (#6817)
- Why I did it
Mellanox-SN4600C-D112C8 SKU is not configured properly.
It should have 112 50G interfaces and 8 100G interfaces as described on this PR.

- How I did it
Modify sai_profile, port_config.ini and hwsku.json for DPB.

- How to verify it
Apply this HwSKU to a MSN4600C Mellanox platform.

Signed-off-by: Shlomi Bitton <shlomibi@nvidia.com>
2021-02-18 17:44:03 +02:00
vmittal-msft
02cc486511
Remove dummy MMU profiles for Arista-7050CX3-32S-C32 and Arista-7050CX3-32S-D48C8 (#6785) 2021-02-17 11:45:00 -08:00
Stephen Sun
7790a74d90
Support shared headroom pool for Microsoft SKUs (#6366)
- Why I did it
Support shared headroom pool

Signed-off-by: Stephen Sun stephens@nvidia.com

- How I did it
Port configurations for SKUs based on 2700/3800 platform from 201911
For SN3800 platform:
C64: 32 100G down links and 32 100G up links.
D112C8: 112 50G down links and 8 100G up links.
D24C52: 24 50G down links, 20 100G down links, and 32 100G up links.
D28C50: 28 50G down links, 18 100G down links, and 32 100G up links.
For SN2700 platform:
D48C8: 48 50G down links and 8 100G up links
C32: 16 100G downlinks and 16 100G uplinks
Add configuration for Mellanox-SN4600C-D112C8
112 50G down links and 8 100G up links.

- How to verify it
Run regression test.
2021-02-16 08:53:40 -08:00
Arun Saravanan Balachandran
fe1ed32c70
DellEMC: Add platform.json for S6000, S6100 (#6735)
Add platform.json used for sonic-mgmt testing in DellEMC S6000, S6100 platforms.
2021-02-11 18:14:47 -08:00
Aravind Mani
23535b13f4
DellEMC: Z9332f enable mem cache flag (#6771)
SER test script is failing as mem_cache flag is disabled.
2021-02-11 13:19:11 -08:00
carl-nokia
2bf1806a34
[Platform][ixs7215]: Platform API test required files with Updates and Improvements (#6738)
- Why I did it
Enable platform API tests to run successfully by providing required test infrastructure files along with supporting changes.

- How I did it
Added platform.json along with supporting changes.
- Addition of pcie.yaml supporting pcied
- Addition of Real fan drawer support vs Virtual
- Removal of python2 wheel with support in place for python3
- supporting changes platform api tests
2021-02-11 13:17:00 -08:00
Volodymyr Boiko
11937d379c
[barefoot][device][plugins] Fix sfp reset (#6745)
Fix sfp reset in Barefoot's sfputil

Signed-off-by: Volodymyr Boyko <volodymyrx.boiko@intel.com>
2021-02-10 18:32:22 -08:00
Joe LeVeque
7ea0d9e27a
[sonic-platform-common] Update submodule (#6742)
Submodule commits included:

* src/sonic-platform-common 6ad0004...bd4dc03 (1):
  > [sonic_sfp/qsfp_dd.py] Update DOM capability method name to align with other drivers (#163)

Also align all calling function names to match.
2021-02-10 06:12:49 -08:00
jostar-yang
c54a03fade
[as7312-54x] Support platform API2.0 (#6272)
Add platform 2.0 support for Accton as7312-54x platform
2021-02-09 10:02:09 -08:00
Dmytro Shevchuk
3cc551541f
[barefoot] Add hwsku.json, platform.json for montara (#6554)
* [device] add platform.json hwsku.json for Montara
* [device] add autonge, fec fields to hwsku
2021-02-06 17:38:29 -08:00
Aravind Mani
c6085c6e1b
[DellEMC Z9332f] Added support for platform system health daemon (#6642) 2021-02-06 13:53:35 -08:00
Vaibhav Hemant Dixit
a7ba1b8b43
Add the 10G ports with updated speed (#6699)
Port_config update for hwsku 7050CX3-32S-C3 - add two 10G ports.
This change is added to fix issue of "PortsOrch initialization failure" seen by previous removal of these 10G ports.
Tested on the device with new minigraph, and the PortsOrch initialization failure is not seen.
2021-02-05 19:34:17 -08:00
Joe LeVeque
18f2c5cfdd
[platform] Update QSFP method name 'parse_qsfp_dom_capability' -> 'parse_dom_capability' (#6695)
**- Why I did it**
PR https://github.com/Azure/sonic-platform-common/pull/102 modified the name of the SFF-8436 (QSFP) method to align the method name between all drivers, renaming it from `parse_qsfp_dom_capability` to `parse_dom_capability`. Once the submodule was updated, the callers using the old nomenclature broke. This PR updates all callers to use the new naming convention.

**- How I did it**

Update the name of the function globally for all calls into the SFF-8436 driver.

Note that the QSFP-DD driver still uses the old nomenclature and should be modified similarly. I will open a PR to handle this separately.
2021-02-05 14:41:05 -08:00
Arun Saravanan Balachandran
fa89c6dd8f
DellEMC: S6100, S6000 - Enable thermalctld, Platform API implementation and fixes (#6438)
**- Why I did it**

To incorporate the below changes in DellEMC S6100, S6000 platforms.

- S6100, S6000:
    - Enable 'thermalctld'
    - Implement DeviceBase methods (presence, status, model, serial) for Fantray and Component
    - Implement ‘get_position_in_parent’, ‘is_replaceable’ methods for all device types
    - Implement ‘get_status’ method for Fantray
    - Implement ‘get_temperature’, ‘get_temperature_high_threshold’, ‘get_voltage_high_threshold’, ‘get_voltage_low_threshold’ methods for PSU
    - Implement ‘get_status_led’, ‘set_status_led’ methods for Chassis
    - SFP:
        - Make EEPROM read both Python2 and Python3 compatible
        - Fix ‘get_tx_disable_channel’ method’s return type
        - Implement ‘tx_disable’, ‘tx_disable_channel’ and ‘set_power_override’ methods
- S6000:
    - Move PSU thermal sensors from Chassis to respective PSU
    - Make available the data of both Fans present in each Fantray


**- How I did it**

- Remove 'skip_thermalctld:true' in pmon_daemon_control.json
- Implement the platform API methods in the respective device files
- Use `bytearray` for data read from transceiver EEPROM 
- Change return type of 'get_tx_disable_channel' to match specification in sonic_platform_common/sfp_base.py
2021-02-05 12:30:08 -08:00
Aravind Mani
85a6314424
Dell S6000: Fix reboot failure issue (#6656)
Reboot command in Dell S6000 failed to reboot the switch. Added retry mechanism and CPU reset.
2021-02-04 17:58:03 -08:00
dereksun01
ca355037f6
[device] Add as4630_54pe SDK configuration parameters (#5167)
**- Why I did it**
- Add as4630_54pe SDK configuration parameters.

**- How I did it**
- Add  l3_alpm_enable=2 and ipv6_lpm_128b_enable=1 in hx5-as4630-48x1G+4x25G+2x100G.bcm.

Co-authored-by: derek_sun <derek_sun@edge-core>
Co-authored-by: derek_sun <ecsonic@edge-core.com>
2021-02-04 10:51:12 -08:00