sonic-buildimage/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-D48C8
Lawrence Lee 1b7fcb4659
[device]: Add SAI checksum verify to TD3 config (#8857)
* [device]: Add SAI checksum verify to TD3 config
* A new config option was added to control the value of IPV4_INCR_CHECKSUM_ORIGINAL_VALUE_VERIFY in the EGR_FLEX_CONFIG control register (this prevents checksums of 0xffff from being propagated to other devices)
2022-07-07 22:31:21 -07:00
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buffers_defaults_t0.j2 Updated buffer profile settings for TD3 based HWSKUs (Arista-7050CX3-32S-C32, Arista-7050CX3-32S-D48C8) (#11202) 2022-06-22 21:55:17 -07:00
buffers_extra_queues.j2 Add two extra lossless queues for bounced back traffic (#10496) 2022-06-02 13:03:27 -07:00
buffers.json.j2 Updated Qos/MMU settings for Arista-7050CX3-32S-C32 & Arista-7050CX3-32S-D48C8 (#7068) 2021-04-30 10:02:08 -07:00
config.bcm.j2 [device]: Add SAI checksum verify to TD3 config (#8857) 2022-07-07 22:31:21 -07:00
pg_profile_lookup.ini Updated buffer profile settings for TD3 based HWSKUs (Arista-7050CX3-32S-C32, Arista-7050CX3-32S-D48C8) (#11202) 2022-06-22 21:55:17 -07:00
port_config.ini [arista]: Add new 48x50G + 8x100G hwsku for Lodoga (#5452) 2020-09-23 22:41:07 -07:00
qos.json.j2 Add extra lossy PG profile for ports between T1 and T2 (#11157) 2022-06-28 12:50:33 -07:00
sai.profile [Tunnel PFC] Add property for tunnel PFC (#10962) 2022-06-05 08:08:36 -07:00