Commit Graph

5 Commits

Author SHA1 Message Date
vmittal-msft
cca17ce104
Updated config files to disable DLR_INIT capability (#12401) 2022-10-18 10:13:07 -07:00
kenneth-arista
a4b9838231
[Arista] Enable larger number of LAGs on 7800 LCs (#11070)
For 7800 LCs, set LAG mode to support 1024 number of 16-member system
LAGs.

Why I did it
The SOC property changes are necessary to match #10519 which increases the number of system LAG IDs to 1024.

Description for the changelog
For 7800 LCs, set LAG mode to support 1024 number of 16-member system
LAGs.
2022-07-06 14:42:45 -07:00
Sambath Kumar Balasubramanian
699c4e5bbf
[chassis][voq]Update bcm config file system_ref_core_clock_khz param for j2cplus linecards (#11212)
Update the bcm config file system_ref_core_clock_khz param to handlesystems with J2cplus linecards.

We need system_ref_core_clock_khz to be set to 1600000 for supporting j2 and j2cplus linecards on the same chassis.
2022-06-23 08:03:08 -07:00
byu343
da43edcf3e
[arista] Update serdes tuning values for 7800r3_48cqm2 (#9967)
This update the serdes tuning values for Arista 7800r3_48cqm2. The values are for the optical transceivers.
2022-04-12 15:53:35 -07:00
Samuel Angebault
17f0217f30
[Arista] Chassis device configurations (#7529)
Add configurations for the following chassis elements

Fabrics 7804R3-FM, 7808R3-FM and 7808R3A-FM
Linecard 7800R3-48CQ2
Supervisor 7800-SUP*
2021-06-30 18:16:20 -07:00