Commit Graph

851 Commits

Author SHA1 Message Date
Eric Zhu
8a246b88b1 Fix issue of partially parsing syseeprom value (#10020) (#10276)
Why I did it
The current code assumes that the value part does not have whitespace. So everything after the whitespace will be ignored. The syseeprom values returned from platform API do not match the output of "show platform syseeprom" on dx010 and e1031 device.

How I did it
This change improved the regular expression for parsing syseeprom values to accommodate whitespaces in the value.
PR 10021 provides the solution, but committed to the wrong place for dx010 and e1031.

How to verify it
Compile the sonic_platform wheel for dx010, then upload to device and install the wheel, verify the platform eeprom API.

Signed-off-by: Eric Zhu <erzhu@celestica.com>
2022-03-25 21:53:45 +00:00
zzhiyuan
49af3bbf0b
[202012] [Arista] Add Arista-7260CX3-D96C16 HWSKU (#10197)
This was an ask by Microsoft to provide:
7260 config.bcm file for hardware sku Arista-7260CX3-D92C16 (Named Arista-7260CX3-D96C16).

There are 16 100G uplinks:
Ethernet13-20/1
Ethernet45-52/1

All other ports are breakout to 2 50G ports.

The original ask was for 201811. This is the requested PR for 202012.

How I did it
Copied existing Arista-7260CX3-D108C8 HWSKU and altered the bcm config, port_config.ini, and buffers config files.

Co-authored-by: Zhi Yuan (Carl) Zhao <zyzhao@arista.com>
2022-03-23 14:32:54 -07:00
abdosi
c3ede8eb5d Fix Headroom value for 7260C64 SKU (#10075)
Updated the Headroom value for (100G,5m) in 7260C64 SKU.
2022-03-01 22:49:11 +00:00
Aravind Mani
331db09f88 Dell S6100: Addition of 10G ports (#9988) 2022-02-23 22:46:20 +00:00
Aravind Mani
6752e2131d [Dell S6100] Addition of 10G ports (#9906) 2022-02-23 22:46:14 +00:00
Kebo Liu
85dc6892e1 fix MSN4410 chassis name in platform_components.json (#9939)
- Why I did it
The chassis name in MSN4410 platform_components.json is not correct

- How I did it
Fix the chassis name

- How to verify it
Run relevant platform API test

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2022-02-15 23:56:50 +00:00
abdosi
4932b4202e Added 40G {300/40/5m} pg lookup profile for 7260 100G SKU (#9249)
What I did:
Added 40G {300/40/5m} profile for 7260 100G SKU
2022-02-09 19:47:44 +00:00
Junchao-Mellanox
0f983c5796 [Mellanox] Fix issue: SN4600C has 4 CPU core temperature sensors (#9930)
- Why I did it
platform.json of 4600C only has 2 CPU core thermal sensors, but there are 4 actually

- How I did it
Added thermal sensors for CPU core 2 and core 3.

- How to verify it
Build.
2022-02-09 19:27:49 +00:00
vdahiya12
73b27b7c9e
fix build error (#9902)
Signed-off-by: vaibhav-dahiya <vdahiya@microsoft.com>
2022-02-03 08:52:29 +05:30
Christian Svensson
d3df3c9e93 [Celestica/Seastone2] Load interface LEDs (#9769)
Tested on a Celestica Seastone2 DX030 switch

Testing scenarios:
- Various QSFP ports in both normal and breakout config.
- 100G and 40G link speed show different colors.
- SFP1 port works.

Signed-off-by: Christian Svensson <blue@cmd.nu>
2022-01-25 22:17:40 +00:00
gechiang
068ff9ddbd
[202012][BRCM TH3] Add SOC properties to prevent FDB events during warmboot (#9761) 2022-01-14 14:44:43 -08:00
Kebo Liu
75bd97e176 [Mellanox] Add sensors conf for MSN4600C A1 platform (#9706)
- Why I did it
Add sensor conf for MSN4600C A1 platform

- How I did it
Add a new sensor conf file and relevant scripts to support two different versions of the platform

- How to verify it
Run "sensors" cmd to check the output on the A1 platform to see whether it's as expected.
Signed-off-by: Kebo Liu <kebol@nvidia.com>
2022-01-13 07:01:26 +00:00
Stephen Sun
b36ee67bc7 Fix typo and missing files in SN3800 and SN4600C's buffer templates (#9537)
Why I did it
Fix typo and missing files in SN3800 and SN4600C's buffer templates

How I did it
ingress_lossless_xoff_size => ingress_lossless_pool_xoff add missing files for SN4600C-D100C12S2

How to verify it
Deploy the fix and verify whether the device can be up.

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2021-12-23 03:28:43 +00:00
Vadym Hlushko
d8ee1e6a63
[Mellanox] [SN4410] [202012] Fixed port_config.ini (#9542)
#### Why I did it
The capability files were incorrect in comparison to the marketing spec of the SN4410 platform.

#### How I did it
Aligned the capability files according to the marketing spec.

#### How to verify it
Did basic manual sanity checks:
- Check if critical docker containers were UP
- Check if interfaces were created and were UP
- Check if interfaces created in the syncd docker container by executing – sx_api_ports_dump.py script
- Check the logs from the start of the switch – everything was OK
- Verified the port breakout
2021-12-20 23:42:34 -08:00
Stephen Sun
8836b6bcd2 [Mellanox] Adjust buffer parameters with 2km cable supported for 4600C non-generic SKUs (#9215)
- Why I did it
Also recalculated all parameters with the latest algorithm with per-speed peer response time taken into account

- How I did it
Detailed information of each SKU:

C64:
t0: 32 100G downlinks and 32 100G uplinks
t1: 56 100G downlinks and 8 100G uplinks with 2km-cable supported
D112C8: 112 50G downlinks and 8 100G uplinks.
D48C40: 48 50G downlinks, 32 100G downlinks, and 8 100G uplinks
D100C12S2: 4 100G downlinks, 2 10G downlinks, 100 50G downlinks, and 8 100G uplinks
2km cable is supported for C64 on t1 only

- How to verify it
Run regression test (QoS)

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2021-12-12 01:36:53 +00:00
Stephen Sun
acac848858
[Reclaim buffer][202012] Reclaim unused buffers by applying zero buffer profiles (#9063)
- Why I did it
Support zero buffer profiles

1. Add buffer profiles and pool definition for zero buffer profiles
2. Support applying zero profiles on INACTIVE PORTS
3. Enable dynamic buffer manager to load zero pools and profiles from a JSON file

- How I did it
Add buffer profiles and pool definition for zero buffer profiles

If the buffer model is static:
 * Apply normal buffer profiles to admin-up ports
 * Apply zero buffer profiles to admin-down ports
If the buffer model is dynamic:
 * Apply normal buffer profiles to all ports
 * buffer manager will take care when a port is shut down

Update buffers_config.j2 to support INACTIVE PORTS by extending the existing macros to generate the various buffer objects, including PGs, queues, ingress/egress profile lists

Originally, all the macros to generate the above buffer objects took active ports only as an argument.
Now that buffer items need to be generated on inactive ports as well, an extra argument representing the inactive ports need to be added.
To be backward compatible, a new series of macros are introduced to take both active and inactive ports as arguments
The original version (with active ports only) will be checked first. If it is not defined, then the extended version will be called.
Only vendors who support zero profiles need to change their buffer templates
Enable buffer manager to load zero pools and profiles from a JSON file:

The JSON file is provided on a per-platform basis
It is copied from platform/<vendor> folder to /usr/share/sonic/temlates folder in compiling time and rendered when the swss container is being created.
To make code clean and reduce redundant code, extract common macros from buffer_defaults_t{0,1}.j2 of all SKUs to two common files:
One in Mellanox-SN2700-D48C8 for single ingress pool mode
The other in ACS-MSN2700 for double ingress pool mode
Those files of all other SKUs will be symbol link to the above files

Update sonic-cfggen test accordingly:
 * Adjust example output file of JSON template for unit test
 * Add unit test in for Mellanox's new buffer templates.

- How to verify it
Regression test.
Unit test in sonic-cfggen
Run regression test and manually test.

Signed-off-by: stephens <stephens@nvidia.com>
2021-12-09 17:34:56 +02:00
Wirut Getbamrung
933454dc29 [device/celestica]: add controllable config to platform.json of e1031 (#9183) 2021-12-01 02:29:02 +00:00
Prince Sunny
d6ab409709
[202012] td2/td3 change cpu cos num to 10 (#9311)
Cherry-pick from #9301
2021-11-18 12:48:20 -08:00
gechiang
baa00e6969
[202012] Disable ALPM distributed hitbit thread that is used for debug purpose only but interfered with Other functional operations (#9190)
This is to address an issue where it was observed that SAI operations sometime make take a very long to time complete (over 45ms). It was determined that the ALPM distributed thread was causing this issue.
The fix is to disable this debug thread that has no functional purpose.

Preliminary tests looks fine. BGP neighbors were all up with proper routes programmed
interfaces are all up
Manually ran the fib test cases on 7050CX3 (TD3), TD2, TH, TH2, and TH3 based platforms and
thy all passed.
2021-11-08 11:50:44 -08:00
shlomibitton
77910e41ce [Mellanox] Fix split configuration for Mellanox SN3800-D112C8 SKU SAI profile for fast-reboot performance (#8897)
- Why I did it
Wrong SKU configuration will lead to longer init flow.
This will affect fast-reboot feature by increasing the traffic downtime.
Since MLNX met the required downtime period with this SKU this bug found with a delay.

- How I did it
Add the required split labels for ports.

- How to verify it
Run fast-reboot with this platform using SN3800-D112C8 SKU.
2021-11-05 00:38:31 +00:00
dflynn-Nokia
f5fbb0bb31 [Nokia ixs7215] Add new platform capabilities to platform.json (#9032)
This commit more fully declares the HW capabilities of the Nokia-7215
platform. For example, support for the threshold values associated with each
thermal sensor is described. The intent here is to inform the sonic-mgmt
platform test cases of which HW features are supported.

This commit must align with PR# 4521 within the sonic-mgmt git repo which is
currently under review. Any changes to that PR will need to be reflected in
this commit.
2021-10-27 03:55:43 +00:00
Santhosh Kumar T
7137e3f949 [Dell] S6000 I2C not responding to certain optics (#8736)
* [Dell] S6000 I2C not responding to certain optics

* Revising return states

* Moved lock file from /var/run/platform_cache to /etc/sonic
2021-10-27 03:54:18 +00:00
Arun Saravanan Balachandran
4139e06260 DellEMC: Z9332f - Component firmware upgrade platform API implementation (#8973) 2021-10-22 17:16:49 +00:00
Anton Ptashnik
4447426563
updated platform info for device x86_64-accton_wedge100bf_32x-r0 (#8918)
Why I did it
For sonic-mgmt Platform API tests to have data to compare with

How I did it
How to verify it
Run sonic-mgmt Platform API tests
2021-10-12 14:16:27 -07:00
Aravind Mani
c71a263894 DellEMC: Fix z9332f low power mode issue (#8693) 2021-10-12 09:23:49 +00:00
Wirut Getbamrung
57df98f4a8 [Celestica/sonic_platform]: Fixed failed test cases in Haliburton platform testing (#8815)
* [device/celestica-e1031]: fix apis follow lastest spec
* [device/celestica-e1031]: fix lgtm (#261)
2021-10-08 03:17:51 +00:00
Lawrence Lee
a22c82288d
[device]: Add SAI checksum verify to TD3 config (#8886)
A new config option `sai_verify_incoming_chksum` was added to control the value of IPV4_INCR_CHECKSUM_ORIGINAL_VALUE_VERIFY in the EGR_FLEX_CONFIG control register (this prevents checksums of 0xffff from being propagated to other devices)

Signed-off-by: Lawrence Lee <lawlee@microsoft.com>
2021-10-04 10:45:44 -07:00
Ying Xie
20ff3e6ae5 [Nokia 7215] Rename alias column with etpN normination (#8879)
also add hwsku alias Nokia-M0-7215

Signed-off-by: Ying Xie <ying.xie@microsoft.com>
2021-10-02 03:02:21 +00:00
Kostiantyn Yarovyi
a8306b3c38 [show] add platform components in Newport, Montara, Mavericks for fix incomprehensible firmware Error print (#8690)
What I did:
     add platform components
 How I did it:
      In platform_components.json add chassis and empty component
How to verify it:
       Run show platform firmware updates
2021-09-27 02:28:09 +00:00
yozhao101
35196835ae [healthd] Add system health configuration for platform Celestica E1031 (#8783)
This PR aims to fix the healthd crash issue by adding system health monitoring configuration file for platform Celestica E1031 by adding a new configuration file under the path device/celestica/x86_64-cel_e1031-r0/.

How to verify it
I manually restart the system-health.service and confirmed that healthd is running.

Signed-off-by: Yong Zhao <yozhao@microsoft.com>
2021-09-20 02:28:06 +00:00
dflynn-Nokia
79ffde7c69 [Nokia ixs7215] Support show system-health (#8771)
* [Nokia ixs7215] Support show system-health
* [Nokia ixs7215] Fix LGTM alert
2021-09-17 08:24:29 +00:00
Aravind Mani
95f54cddf6 DellEMC: Z9332f fix platform bugs (#8777)
* DellEMC: Z9332f fix platform bugs

* update sfp.py
2021-09-17 08:24:19 +00:00
Alexander Allen
d5149889fc
Add Mellanox-SN4600C-D100C12S2 SKU (#8754)
*[mellanox] Add D100C12S2 SKU to 4600C
2021-09-16 13:31:30 -07:00
Ying Xie
08445d5b3a [7050] define hwsku.json for Arista-7050QX-32S-S4Q31 to skip SFP checks for first 4 ports (#8624)
Why I did it
The first 4 ports on this dut are breakout ports. They might not always be connected in lab. Mark them as 'RJ45' to skip the SFP check since they are by default disabled.

How to verify it
run platform test_reboot.py

Signed-off-by: Ying Xie <ying.xie@microsoft.com>
2021-09-01 01:40:55 +00:00
Aravind Mani
c8cdd6a7d3 DellEMC: Z9332f fix LED issue (#8639) 2021-09-01 01:40:50 +00:00
gechiang
4591c84d85 BRCM Disable ACL Drop counted towards interface RX_DRP counters part II (#8596) 2021-08-26 07:36:04 +00:00
Wirut Getbamrung
347d7262a1
[202012][device/celestica]: Fix failed test cases of Haliburton platform API (#8297)
To fix failed test cases of Haliburton platform APIs that found on platform_tests script
- How I did it
- Add device/celestica/x86_64-cel_e1031-r0/platform.json
- Update functions to support python3.7
- Add more functions follow latest sonic_platform_base
- Fix the bug

Signed-off-by: Wirut Getbamrung [wgetbumr@celestica.com]
2021-08-15 00:00:08 -07:00
carl-nokia
03ef275314 [Nokia ixs7215] sfputil support + component tests (#8445)
Deliver sfputil support for sfputil show eeprom and sfputil reset along with some component test case fixes

Co-authored-by: Carl Keene <keene@nokia.com>
2021-08-13 03:27:55 -07:00
carl-nokia
8fe11740f0 [Nokia] Add hwsku.json for the Nokia-7215 (#8372)
* add hwsku.json for the Nokia-7215
* added required default_brkout_mode to hwsku as its not optional
* remove tabs from the file so spacing consistent

Co-authored-by: Carl Keene <keene@nokia.com>
2021-08-12 10:44:17 -07:00
madhanmellanox
c1e31a52cb
[202012]:Adding Mellanox-SN3800-D100C12S2 SKU (#8444)
*To create a new SKU Mellanox-SN3800-D100C12S2
Co-authored-by: Madhan Babu <madhan@l-csi-0241l.mtl.labs.mlnx>
2021-08-12 10:14:22 -07:00
gechiang
8915e488b7
[202012] BRCM Disable ACL Drop counted towards interface RX_DRP counters (#8383)
* [202012] BRCM Disable ACL Drop counted towards interface RX_DRP counters
2021-08-11 09:10:17 -07:00
tjchadaga
76def5c3a0 Fix TH3 Warm-reboot failure due to Tunnel termination SAI failure (#8395) 2021-08-11 04:12:46 -07:00
vmittal-msft
b0ea180fd4 Updated PGHeadroom settings for 400G speed (DellEMC-Z9332f-M-O16C64 & DellEMC-Z9332f-O32) (#8420)
Updated pg_profile_lookup.ini for both HWSKU to match with BRCM recommendation
2021-08-11 04:10:03 -07:00
Neetha John
66c8934d84 Revert "Revert "Update default cable len to 0m for TD2"" (#8354)
* Update default cable len to 0m for TD2 (#8298)
* Update sonic-cfggen tests with the correct cable len

Signed-off-by: Neetha John <nejo@microsoft.com>

As part of the buffer reclamation efforts for TD2, setting the default cable len to 0m which means unused ports will have a cable len of 0m.

Why I did it
To align with the changes in Azure/sonic-swss#1830

How to verify it
- With the default cable len set to 0m and the associated changes in swss, CABLE_LENGTH table had '0m' set for unused ports and accordingly more space was reserved for the shared pool
- Cfggen tests passed with the cable len update
2021-08-07 12:43:46 +00:00
Arun Saravanan Balachandran
9b50d631ff DellEMC: Add pcie.yaml for Z9332f (#8329)
Why I did it
To support "pcied" and "pcieutil" commands in DellEMC Z9332f.

How I did it
Add 'pcie.yaml' in device/dell/[PLATFORM]/ directory.

How to verify it
Execute "pcieutil check" command.
Logs: UT_logs.txt
2021-08-06 02:00:04 +00:00
vmittal-msft
886846f719 Dell Z9332 systems optimized MMU settings for T0/T1 topology (#8341) 2021-08-06 01:59:59 +00:00
Samuel Angebault
99efd5346e
[202012][Arista] Update platform library submodules (#8339)
This PR only contains backports from master

Fix leak discovered on master, though 202012 is not affected it's better to have the fix (fixes [master] thermalctld leak on Arista devices makes them unreachable when memory is exhausted #7515)
Fix EepromDecoderimplementation in the platform API (fixes syseepromd crashing repeatedly on SONiC.20201231.02 #8263)
Fix Mineral platform definition and configuration
Fix build issues in environments where /proc is not mounted/restricted (fixes PLATFORM=broadcom fails arista "ReloadCauseManagerTest" first time #7800)
Fix some pytest issues
Add sfp-eeprom C API and also mount it in pmon
2021-08-05 18:35:31 -07:00
Guohan Lu
fa239270c1 Revert "Update default cable len to 0m for TD2 (#8298)"
This reverts commit af2024e567.
2021-08-04 08:40:36 -07:00
Neetha John
af2024e567 Update default cable len to 0m for TD2 (#8298)
Signed-off-by: Neetha John <nejo@microsoft.com>

As part of the buffer reclamation efforts for TD2, setting the default cable len to 0m which means unused ports will have a cable len of 0m.

Why I did it
To align with the changes in Azure/sonic-swss#1830

How to verify it
With the default cable len set to 0m and the associated changes in swss, CABLE_LENGTH table had '0m' set for unused ports and accordingly more space was reserved for the shared pool
2021-08-03 09:58:46 +00:00
Vivek Reddy
1eaa951966 [Mellanox] [SKU] Fix the shared headroom for 4600C-C64 SKU (#8242)
Removed ingress_lossy_pool from the BUFFER_POOL list
Fx the the egress_lossless_pool_size value

Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
2021-08-03 09:58:40 +00:00