Commit Graph

644 Commits

Author SHA1 Message Date
Samuel Angebault
a24b581d80
[Arista] Add pcie.yaml configuration file for a few platforms (#5527)
* Add pcie.yaml configuration for Gardena
* Add pcie.yaml configuration for Upperlake
* Add pcie.yaml configuration for Clearlake
* Add pcie.yaml configuration for Lodoga
2020-10-02 09:05:43 -07:00
jostar-yang
a92986c605
[as7326-56x]Fix port_eeprom i2c mapping (#5466)
**- Why I did it**
There is error i2c mapping for port 11,12 and port 19, 20. 

**- How I did it**
Fix to correct i2c mapping

Co-authored-by: Jostar Yang <jostar_yang@accton.com.tw>
2020-09-26 11:21:31 -07:00
Syd Logan
0311a4a037
Add gearbox phy device files and a new physyncd docker to support VS gearbox phy feature (#4851)
* buildimage: Add gearbox phy device files and a new physyncd docker to support VS gearbox phy feature

* scripts and configuration needed to support a second syncd docker (physyncd)
* physyncd supports gearbox device and phy SAI APIs and runs multiple instances of syncd, one per phy in the device
* support for VS target (sonic-sairedis vslib has been extended to support a virtual BCM81724 gearbox PHY).

HLD is located at b817a12fd8/doc/gearbox/gearbox_mgr_design.md

**- Why I did it**

This work is part of the gearbox phy joint effort between Microsoft and Broadcom, and is based
on multi-switch support in sonic-sairedis.

**- How I did it**

Overall feature was implemented across several projects. The collective pull requests (some in late stages of review at this point):

https://github.com/Azure/sonic-utilities/pull/931 - CLI (merged)
https://github.com/Azure/sonic-swss-common/pull/347 - Minor changes (merged)
https://github.com/Azure/sonic-swss/pull/1321 - gearsyncd, config parsers, changes to orchargent to create gearbox phy on supported systems
https://github.com/Azure/sonic-sairedis/pull/624 - physyncd, virtual BCM81724 gearbox phy added to vslib

**- How to verify it**

In a vslib build:

root@sonic:/home/admin# show gearbox interfaces status
  PHY Id    Interface        MAC Lanes    MAC Lane Speed        PHY Lanes    PHY Lane Speed    Line Lanes    Line Lane Speed    Oper    Admin
--------  -----------  ---------------  ----------------  ---------------  ----------------  ------------  -----------------  ------  -------
       1   Ethernet48  121,122,123,124               25G  200,201,202,203               25G       204,205                50G    down     down
       1   Ethernet49  125,126,127,128               25G  206,207,208,209               25G       210,211                50G    down     down
       1   Ethernet50      69,70,71,72               25G  212,213,214,215               25G           216               100G    down     down

In addition, docker ps | grep phy should show a physyncd docker running.

  Signed-off-by: syd.logan@broadcom.com
2020-09-25 08:32:44 -07:00
Samuel Angebault
4ec83b25bc
[arista]: Add new 48x50G + 8x100G hwsku for Lodoga (#5452) 2020-09-23 22:41:07 -07:00
vdahiya12
f2194010f8
[MSN2700] Add platform.json file containing platform hardware facts (#5189)
As part of Platform api testing for multiple platforms, this pull request adds a platform.json file which contains all
the static data for Mellanox-2700 platform. This file would provide all the platform specific data required for testing of all the Platform tests . As part of testing the API's the values of static/default objects within this specific platform file  will be compared  against the values returned by calling the Platform specific API's in a typical platform test
2020-09-22 17:12:51 -07:00
abdosi
a6a10f05b7
In SAI 3.5 by default we are supporting 256 Group with 64 Memeber each. (#5400)
However in SAI 3.7 default behaviout got changes to 128 Group and 128
    Memeber each.

    This change is to make sure we are using same ECMP Group/Memeber Per
    Group for 3.7 also so that behaviour is consistent.

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
2020-09-22 11:21:12 -07:00
Stephen Sun
c8277a4eba
Update buffer configuration for SKUs based on SN3800 (#5320)
C64: 32 100G down links and 32 100G up links.
D112C8: 112 50G down links and 8 100G up links.
D24C52: 24 50G down links, 20 100G down links, and 32 100G up links.
D28C50: 28 50G down links, 18 100G down links, and 32 100G up links.

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2020-09-22 19:10:18 +03:00
Arun Saravanan Balachandran
dd008d012c
DellEMC: PCIe config files for S6000, S6100 (#5321)
To support "pcieutil pcie-check" command in DellEMC S6000, S6100.
2020-09-22 01:24:45 -07:00
zhenggen-xu
f18b612ff9
[DPB Seastone] On boarding DPB feature to Seastone HWSKUs (#4235)
This include the platform.json for Seastone platform and
individual hwsku.json for each HWSKU

port_config.ini will be removed once the CLI/parser library etc changes are merged

**- What I did**
On boarding DPB feature to Seastone HWSKUs

**- How I did it**
Add platform.json for Seastone and hwsku.json files to relevant HWSKUs.

**- How to verify it**
```
sudo sonic-cfggen -H -k Seastone-DX010 --preset=t1 > config_db.json
sudo config reload config_db.json -y

show interface status:

admin@lnos-x1-a-csw03:~$ show interfaces status 
  Interface            Lanes    Speed    MTU    FEC    Alias    Vlan    Oper    Admin    Type    Asym PFC
-----------  ---------------  -------  -----  -----  -------  ------  ------  -------  ------  ----------
  Ethernet0      65,66,67,68     100G   9100    N/A   Eth1/1  routed    down       up     N/A         N/A
  Ethernet4      69,70,71,72     100G   9100    N/A   Eth2/1  routed    down       up     N/A         N/A
  Ethernet8      73,74,75,76     100G   9100    N/A   Eth3/1  routed    down       up     N/A         N/A
 Ethernet12      77,78,79,80     100G   9100    N/A   Eth4/1  routed    down       up     N/A         N/A
 Ethernet16      33,34,35,36     100G   9100    N/A   Eth5/1  routed    down       up     N/A         N/A
 Ethernet20      37,38,39,40     100G   9100    N/A   Eth6/1  routed    down       up     N/A         N/A
 Ethernet24      41,42,43,44     100G   9100    N/A   Eth7/1  routed    down       up     N/A         N/A
 Ethernet28      45,46,47,48     100G   9100    N/A   Eth8/1  routed    down       up     N/A         N/A
 Ethernet32      49,50,51,52     100G   9100    N/A   Eth9/1  routed    down       up     N/A         N/A
 Ethernet36      53,54,55,56     100G   9100    N/A  Eth10/1  routed    down       up     N/A         N/A
 Ethernet40      57,58,59,60     100G   9100    N/A  Eth11/1  routed    down       up     N/A         N/A
 Ethernet44      61,62,63,64     100G   9100    N/A  Eth12/1  routed    down       up     N/A         N/A
 Ethernet48      81,82,83,84     100G   9100    N/A  Eth13/1  routed    down       up     N/A         N/A
 Ethernet52      85,86,87,88     100G   9100    N/A  Eth14/1  routed    down       up     N/A         N/A
 Ethernet56      89,90,91,92     100G   9100    N/A  Eth15/1  routed    down       up     N/A         N/A
 Ethernet60      93,94,95,96     100G   9100    N/A  Eth16/1  routed    down       up     N/A         N/A
 Ethernet64     97,98,99,100     100G   9100    N/A  Eth17/1  routed    down       up     N/A         N/A
 Ethernet68  101,102,103,104     100G   9100    N/A  Eth18/1  routed    down       up     N/A         N/A
 Ethernet72  105,106,107,108     100G   9100    N/A  Eth19/1  routed      up       up     N/A         N/A
 Ethernet76  109,110,111,112     100G   9100    N/A  Eth20/1  routed    down       up     N/A         N/A
 Ethernet80          1,2,3,4     100G   9100    N/A  Eth21/1  routed    down       up     N/A         N/A
 Ethernet84          5,6,7,8     100G   9100    N/A  Eth22/1  routed    down       up     N/A         N/A
 Ethernet88       9,10,11,12     100G   9100    N/A  Eth23/1  routed    down       up     N/A         N/A
 Ethernet92      13,14,15,16     100G   9100    N/A  Eth24/1  routed    down       up     N/A         N/A
 Ethernet96      17,18,19,20     100G   9100    N/A  Eth25/1  routed    down       up     N/A         N/A
Ethernet100      21,22,23,24     100G   9100    N/A  Eth26/1  routed    down       up     N/A         N/A
Ethernet104      25,26,27,28     100G   9100    N/A  Eth27/1  routed    down       up     N/A         N/A
Ethernet108      29,30,31,32     100G   9100    N/A  Eth28/1  routed    down       up     N/A         N/A
Ethernet112  113,114,115,116     100G   9100    N/A  Eth29/1  routed    down       up     N/A         N/A
Ethernet116  117,118,119,120     100G   9100    N/A  Eth30/1  routed    down       up     N/A         N/A
Ethernet120  121,122,123,124     100G   9100    N/A  Eth31/1  routed    down       up     N/A         N/A
Ethernet124  125,126,127,128     100G   9100    N/A  Eth32/1  routed    down       up     N/A         N/A

```

**Breakout to 2x50G:**
```
admin@lnos-x1-a-csw03:~$ sudo config interface breakout Ethernet0 2x50G -y -f

Running Breakout Mode : 1x100G[40G] 
Target Breakout Mode : 2x50G

Ports to be deleted : 
 {
    "Ethernet0": "100000"
}
Ports to be added : 
 {
    "Ethernet2": "50000", 
    "Ethernet0": "50000"
}

After running Logic to limit the impact

Final list of ports to be deleted : 
 {
    "Ethernet0": "100000"
} 
Final list of ports to be added :  
 {
    "Ethernet2": "50000", 
    "Ethernet0": "50000"
}
Loaded below Yang Models
['sonic-acl', 'sonic-extension', 'sonic-interface', 'sonic-loopback-interface', 'sonic-port', 'sonic-portchannel', 'sonic-types', 'sonic-vlan']
Note: Below table(s) have no YANG models:
CONTAINER_FEATURE, BGP_NEIGHBOR, VERSIONS, DEVICE_METADATA, FEATURE, LOCK, BREAKOUT_CFG, CRM, 
Below Config can not be verified, It may cause harm to the system
 {
  "BREAKOUT_CFG": {
    "Ethernet0": {
      "brkout_mode": "1x100G[40G]"
    }
  }
}
Do you wish to Continue? [y/N]: y
Breakout process got successfully completed.
Please note loaded setting will be lost after system reboot. To preserve setting, run `config save`.
admin@lnos-x1-a-csw03:~$ 
admin@lnos-x1-a-csw03:~$ 
admin@lnos-x1-a-csw03:~$ show interfaces status 
  Interface            Lanes    Speed    MTU    FEC    Alias    Vlan    Oper    Admin    Type    Asym PFC
-----------  ---------------  -------  -----  -----  -------  ------  ------  -------  ------  ----------
  Ethernet0            65,66      50G    N/A    N/A   Eth1/1  routed    down       up     N/A         N/A
  Ethernet2            67,68      50G   9100    N/A   Eth1/3  routed    down       up     N/A         N/A
  
admin@lnos-x1-a-csw03:~$ bcmcmd ps
ps
                 ena/        speed/ link auto    STP                  lrn  inter   max   cut   loop
           port  link  Lns   duplex scan neg?   state   pause  discrd ops   face frame  thru?  back
       xe0( 68)  down   2   50G  FD   SW  No   Forward          None   FA    KR2  9412    No      
       xe1( 69)  !ena   1     -       SW  No   Forward          None   FA   None  9122    No      

```

**Breakout to 4x25G[10G]:**
```
admin@lnos-x1-a-csw03:~$ sudo config interface breakout Ethernet0 4x25G[10G] -y -f

Running Breakout Mode : 2x50G 
Target Breakout Mode : 4x25G[10G]

Ports to be deleted : 
 {
    "Ethernet2": "50000", 
    "Ethernet0": "50000"
}
Ports to be added : 
 {
    "Ethernet2": "25000", 
    "Ethernet3": "25000", 
    "Ethernet0": "25000", 
    "Ethernet1": "25000"
}

After running Logic to limit the impact

Final list of ports to be deleted : 
 {
    "Ethernet2": "50000", 
    "Ethernet0": "50000"
} 
Final list of ports to be added :  
 {
    "Ethernet2": "25000", 
    "Ethernet3": "25000", 
    "Ethernet0": "25000", 
    "Ethernet1": "25000"
}
Loaded below Yang Models
['sonic-acl', 'sonic-extension', 'sonic-interface', 'sonic-loopback-interface', 'sonic-port', 'sonic-portchannel', 'sonic-types', 'sonic-vlan']
Note: Below table(s) have no YANG models:
CONTAINER_FEATURE, BGP_NEIGHBOR, VERSIONS, DEVICE_METADATA, FEATURE, LOCK, BREAKOUT_CFG, CRM, 
Below Config can not be verified, It may cause harm to the system
 {
  "BREAKOUT_CFG": {
    "Ethernet0": {
      "brkout_mode": "2x50G"
    }
  }
}
Do you wish to Continue? [y/N]: y
Breakout process got successfully completed.
Please note loaded setting will be lost after system reboot. To preserve setting, run `config save`.

admin@lnos-x1-a-csw03:~$ show interfaces status 
  Interface            Lanes    Speed    MTU    FEC    Alias    Vlan    Oper    Admin    Type    Asym PFC
-----------  ---------------  -------  -----  -----  -------  ------  ------  -------  ------  ----------
  Ethernet0               65      25G    N/A    N/A   Eth1/1  routed    down       up     N/A         N/A
  Ethernet1               66      25G   9100    N/A   Eth1/2  routed    down       up     N/A         N/A
  Ethernet2               67      25G    N/A    N/A   Eth1/3  routed    down       up     N/A         N/A
  Ethernet3               68      25G   9100    N/A   Eth1/4  routed    down       up     N/A         N/A

admin@lnos-x1-a-csw03:~$ bcmcmd ps
ps
                 ena/        speed/ link auto    STP                  lrn  inter   max   cut   loop
           port  link  Lns   duplex scan neg?   state   pause  discrd ops   face frame  thru?  back
       xe0( 68)  down   1   25G  FD   SW  No   Forward          None   FA     KR  9412    No      
       xe1( 69)  down   1   25G  FD   SW  No   Forward          None   FA     KR  9122    No      
       xe2( 70)  down   1   25G  FD   SW  No   Forward          None   FA     KR  9412    No      
       xe3( 71)  down   1   25G  FD   SW  No   Forward          None   FA     KR  9122    No   

```

**Breakin back to 1x100G[40G]:**
```
admin@lnos-x1-a-csw03:~$ sudo config interface breakout Ethernet0 1x10G[40G] -y -f
[ERROR] Target mode 1x10G[40G] is not available for the port Ethernet0
Aborted!
admin@lnos-x1-a-csw03:~$ sudo config interface breakout Ethernet0 1x100G[40G] -y -f

Running Breakout Mode : 4x25G[10G] 
Target Breakout Mode : 1x100G[40G]

Ports to be deleted : 
 {
    "Ethernet2": "25000", 
    "Ethernet3": "25000", 
    "Ethernet0": "25000", 
    "Ethernet1": "25000"
}
Ports to be added : 
 {
    "Ethernet0": "100000"
}

After running Logic to limit the impact

Final list of ports to be deleted : 
 {
    "Ethernet2": "25000", 
    "Ethernet3": "25000", 
    "Ethernet0": "25000", 
    "Ethernet1": "25000"
} 
Final list of ports to be added :  
 {
    "Ethernet0": "100000"
}
Loaded below Yang Models
['sonic-acl', 'sonic-extension', 'sonic-interface', 'sonic-loopback-interface', 'sonic-port', 'sonic-portchannel', 'sonic-types', 'sonic-vlan']
Note: Below table(s) have no YANG models:
CONTAINER_FEATURE, BGP_NEIGHBOR, VERSIONS, DEVICE_METADATA, FEATURE, LOCK, FLEX_COUNTER_TABLE, BREAKOUT_CFG, CRM, 
Below Config can not be verified, It may cause harm to the system
 {
  "BREAKOUT_CFG": {
    "Ethernet0": {
      "brkout_mode": "4x25G[10G]"
    }
  }
}
Do you wish to Continue? [y/N]: y
Breakout process got successfully completed.
Please note loaded setting will be lost after system reboot. To preserve setting, run `config save`.
admin@lnos-x1-a-csw03:~$ show interfaces status 
  Interface            Lanes    Speed    MTU    FEC    Alias    Vlan    Oper    Admin    Type    Asym PFC
-----------  ---------------  -------  -----  -----  -------  ------  ------  -------  ------  ----------
  Ethernet0      65,66,67,68     100G    N/A    N/A   Eth1/1  routed    down       up     N/A         N/A

admin@lnos-x1-a-csw03:~$ bcmcmd ps
ps
                 ena/        speed/ link auto    STP                  lrn  inter   max   cut   loop
           port  link  Lns   duplex scan neg?   state   pause  discrd ops   face frame  thru?  back
       ce0( 68)  down   4  100G  FD   SW  No   Forward          None   FA    KR4  9412    No      
       xe0( 69)  !ena   1     -       SW  No   Forward          None   FA   None  9122    No      
       xe1( 70)  !ena   2     -       SW  No   Forward          None   FA   None  9412    No      
       xe2( 71)  !ena   1     -       SW  No   Forward          None   FA   None  9122    No  
```

Signed-off-by: Zhenggen Xu <zxu@linkedin.com>
2020-09-18 15:29:29 -07:00
Wirut Getbamrung
47316de5c4
[device/celestica]: Update DX010 reboot cause API (#4678)
- Add more cases support in DX010 reboot cause API
    - Add Thermal Overload reboot cause support
    - Add new Watchdog reboot cause support
2020-09-17 08:56:52 -07:00
Vitaliy Senchyshyn
3397e41aa8
[barefoot][platform] Update BFN platforms (#5356)
1. Added support of BFN newport new platform name.
2. Updated debian version for montara and mavericks platforms.
2020-09-16 10:34:49 -07:00
hanstseng
c6f714ba81
[delta] Support front-panel LEDs (#5348)
Support controlling front-panel LEDs on x86_64-delta_ag9032v2a-r0 platform

Signed-off-by: hans-tseng <hans.tseng@deltaww.com>
2020-09-14 10:58:59 -07:00
Nazarii Hnydyn
e2b4afc438
[Mellanox] Update platform components config files. (#5360)
Signed-off-by: Nazarii Hnydyn <nazariig@nvidia.com>
2020-09-13 10:23:22 +03:00
Kebo Liu
72ec212fa7
[Mellanox] Refactor SFP related platform API and plugins with new SDK API (#5326)
Refactor SFP reset, low power get/set API, and plugins with new SDK SX APIs. Previously they were calling SDK SXD APIs which have glibc dependency because of shared memory usage.

Remove implementation "set_power_override", "tx_disable_channel", "tx_disable" which using SXD APIs, once related SDK SX API available, will add them back based on new SDK SX APIs.
2020-09-11 13:23:23 -07:00
Samuel Angebault
0b4191fe2a
[Arista] Updating driver submodules (#5352)
- Merge chassis codebase upstream
 - Add support for Otterlake supervisor
 - Add support for NorthFace and Camp chassis
 - Add support for Eldridge, Dragonfly and Brooks fabrics
 - Add support for Clearwater2 and Clearwater2Ms linecards
 - Add new arista Cli to power on/off cards
 - Add new arista show Cli to inspect supervisor, chassis, fabrics and linecards
2020-09-10 01:34:38 -07:00
Petro Bratash
12f864a92e
[BFN] Fix vulnerability in eeprom.py (#5333)
Due to https://github.com/yaml/pyyaml/wiki/PyYAML-yaml.load(input)-Deprecation, yaml.load(input) is deprecated. Added a specifying parameter to fix this issue.

Signed-off-by: Petro Bratash <petrox.bratash@intel.com>
2020-09-09 12:33:13 -07:00
Wirut Getbamrung
aa601f4b0a
[device/celestica]: Implement Seastone2 platform API (#5080)
Implement Seastone2 platform API:

1. Implement Fan APIs.
2. Implement Psu APIs.
3. Implement Thermal APIs.
4. Implement Component APIs.
5. Implement Chassis APIs.
6. Implement Sfp APIs.
7. Implement Watchdog APIs. (Required new CPLD version)
8. Upgrade switchboard driver to support port insert/remove interrupt
9. Init all above APIs class on chassis API.

Co-authored-by: pjaipakdee <jai.peerapong@gmail.com>
Co-authored-by: Pradchaya P <pphuchar@celestica.com>
2020-09-09 10:32:56 -07:00
Blueve
01fb32fa08
[conf] append nos-config-part for s6100 (#5234)
* [conf] append nos-config-part for s6100

* modify rc.local

Signed-off-by: Guohan Lu <lguohan@gmail.com>

* Update rc.local

Co-authored-by: Blueve <jika@microsoft.com>
Co-authored-by: Guohan Lu <lguohan@gmail.com>
Co-authored-by: Ying Xie <yxieca@users.noreply.github.com>
2020-09-08 12:29:02 -07:00
Wei Bai
0b6fd70767
Update PG profiles for Arista 7050 (#5324)
* Update pg_profile_lookup.ini
2020-09-08 11:57:21 -07:00
abdosi
b6efb49817
Update bcm soc property bcm_num_cos from 8 to 10 (#5314)
as needed by SAI 3.7 and above. Without this change
Warmboot fails from 3.5 to 3.7 as Braodcoam Datastructure
gets corrupted after warm-boot.

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
2020-09-04 07:40:17 -07:00
brandonchuang
8793814d53
[Device] Disabled thermalctld for Accton platforms (#5276)
Disable thermalctld on Accton platforms until support is added as to avoid logs flooding

Signed-off-by: brandon_chuang <brandon_chuang@edge-core.com>
2020-08-31 17:09:19 -07:00
Petro Bratash
52b349442d
[BFN] Add support pcied daemon for Montara and Newport (#5199)
Signed-off-by: Petro Bratash <petrox.bratash@intel.com>
2020-08-18 14:32:48 -07:00
SuvarnaMeenakshi
8be30c4e10
[multi-asic]: Update port_config files for multi-asic vs image (#5121)
Modify port_config.ini files multi-asic vs platform. Changes done:
- Add new columns: index, asic_port_name, role(Int/Ext)
- Modify alias of interface names. Alias should match the interface names present in minigraph file.

Signed-off-by: SuvarnaMeenakshi <sumeenak@microsoft.com>
2020-08-14 18:54:44 -07:00
jostar-yang
e87de49ecb
[as9716-32d] Add to support lpmode for sfputil (#5171)
Implement code to set/get lpmode for as9716-32d platform
2020-08-13 11:19:14 -07:00
Stephen Sun
54fcdbb380
Support single ingress pool for MSFT SKUs and optimize headroom calculation (#4686)
Calculate pool size in t1 as 24 * downlink port + 8 * uplink port

- Take both port and peer MTU into account when calculating headroom
- Worst case factor is decreased to 50%
- Mellanox-SN2700-C28D8 t0, assume 48 * 50G/5m + 8 * 100G/40m ports
- Mellanox-SN2700 (C32)
  - t0: 16 * 100G/5m + 16 * 100G/40m
  - t1: 16 * 100G/40m + 16 * 100G/300m

Signed-off-by: Stephen Sun <stephens@mellanox.com>

Co-authored-by: Stephen Sun <stephens@mellanox.com>
2020-08-13 13:12:09 +03:00
taochengyi
08f3b9720b
[centec]: Add centec arm64 architecture support for E530 (#4641)
summary of E530 platfrom:
 - CPU: CTC5236, arm64
 - LAN switch chip set: CENTEC CTC7132 (TsingMa). TsingMa is a purpose built device to address the challenge in the recent network evolution such as Cloud computing. CTC7132 provides 440Gbps I/O bandwidth and 400Gcore bandwidth, the CTC7132 family combines a feature-rich switch core and an embedded ARM A53 CPU Core running at 800MHz/1.2GHz. CTC7132 supports a variety of port configurations, such as QSGMII and USXGMII-M, providing full-rate port capability from 100M to 100G.
- device E530-48T4X: 48 * 10/100/1000 Base-T Ports, 4 * 10GE SFP+ Ports.
- device E530-24X2C: 24 * 10 GE SFP+ Ports, 2 * 100GE QSFP28 Ports.

add new files in three directories:
device/centec/arm64-centec_e530_24x2c-r0
device/centec/arm64-centec_e530_48t4x_p-r0
platform/centec-arm64

Co-authored-by: taocy <taocy2@centecnetworks.com>
Co-authored-by: Gu Xianghong <gxh2001757@163.com>
Co-authored-by: shil <shil@centecnetworks.com>
2020-08-06 03:16:11 -07:00
Petro Bratash
6c2c9fe93c
[BFN] Added skip_pcied for Barefoot platforms (#5105)
It`s a temporary solution to avoid pmon container failure, implementation will be added later.

Signed-off-by: Petro Bratash <petrox.bratash@intel.com>
2020-08-05 10:47:07 -07:00
shlomibitton
70bf65302d
MSN2100 and MSN2010 platforms are not supporting PSU temperature sampling, ignore temperature check by default for these platforms (#5047)
Signed-off-by: Shlomi Bitton <shlomibi@mellanox.com>
2020-08-04 14:49:19 +03:00
Joe LeVeque
3b89e5d467
[Python] Migrate applications/scripts to import sonic-py-common package (#5043)
As part of consolidating all common Python-based functionality into the new sonic-py-common package, this pull request:
1. Redirects all Python applications/scripts in sonic-buildimage repo which previously imported sonic_device_util or sonic_daemon_base to instead import sonic-py-common, which was added in https://github.com/Azure/sonic-buildimage/pull/5003
2. Replaces all calls to `sonic_device_util.get_platform_info()` to instead call `sonic_py_common.get_platform()` and removes any calls to `sonic_device_util.get_machine_info()` which are no longer necessary (i.e., those which were only used to pass the results to `sonic_device_util.get_platform_info()`.
3. Removes unused imports to the now-deprecated sonic-daemon-base package and sonic_device_util.py module

This is the next step toward resolving https://github.com/Azure/sonic-buildimage/issues/4999

Also reverted my previous change in which device_info.get_platform() would first try obtaining the platform ID string from Config DB and fall back to gathering it from machine.conf upon failure because this function is called by sonic-cfggen before the data is in the DB, in which case, the db_connect() call will hang indefinitely, which was not the behavior I expected. As of now, the function will always reference machine.conf.
2020-08-03 11:43:12 -07:00
Stephen Sun
0db7e88313
[Mellanox] Update the buffer setting (#4989)
* Update the buffer size based on the latest excel

Signed-off-by: Stephen Sun <stephens@mellanox.com>

* Align the buffer configuration with the latest formula:

- reduce redundant "*2" in formula
- use port MTU for local sending the PFC frame and peer lossless MTU for peer sending lossless traffic

Buffer pool size updated accordingly.

Signed-off-by: Stephen Sun <stephens@mellanox.com>
2020-07-30 14:22:08 +03:00
OlaOliynyk
2e8992d24a
Added skip_fancontrol, skip_thermalctld for Newport (#5027)
Signed-off-by: Olha Oliynyk <olhax.oliynyk@intel.com>
2020-07-24 19:25:02 -07:00
Volodymyr Boiko
52c3a238bb
[barefoot][platform] increase init timeout in eeprom.py (#5006)
Because of platform-specific reasons I have to increase init timeout in (platform-plugin)/eeprom.py
2020-07-20 11:11:51 -07:00
ciju-juniper
b3ae7858ca
[Juniper][QFX5200] Adding qos.json (#4982)
Adding buffers.json.j2, buffers_defaults_t1.j2 and
qos.json.j2 for qfx5200 platform.

Signed-off-by: Ciju Rajan K <crajank@juniper.net>
2020-07-18 04:52:05 -07:00
Joe LeVeque
9905d9382d
[devices] Update SFP keys to align with new standard (#4975)
Align SFP key names with new standard defined in https://github.com/Azure/sonic-platform-common/pull/97

- hardwarerev -> hardware_rev
- serialnum -> serial
- manufacturename -> manufacturer
- modelname -> model
- Connector -> connector
2020-07-16 13:03:50 -07:00
ciju-juniper
46cc6968d7
[Juniper][QFX52xx] Platform fixes/enhancements (#4953)
1) Fixing the issues while applying platform TxCTLE settings in sfputil.py for QFX5200
 2) Adding the support for transceiver dom threshold info in sfputil.py for both  QFX5210 & QFX5200 platforms
 3) Updating the sfputil.py for QFX5210 & QFX5200 platforms
4) Adding a new platform specific command 'show_thresholds' to display the FAN dutycycle percentage for various temperature ranges (for both AFI & AFO QFX5200 systems).

Signed-off-by: Ciju Rajan K <crajank@juniper.net>
2020-07-14 14:20:41 -07:00
Junchao-Mellanox
e1f7fb135b
[Mellanox] Add system health configuration file for Mellanox platforms (#4834)
The new feature system health support a platform based configuration file. Add configuration files for all Mellanox platform.

Add a configuration file for SN2700, other platform will use a soft link to it.
2020-07-13 10:20:22 -07:00
Stephen Sun
153f880e6b [mellanox]: Support warm reboot on MSN4700 (#4910) 2020-07-12 18:08:52 +00:00
shlomibitton
e666bf8490 [Mellanox] Add a new SKU Mellanox-SN4600C-D112C8 (#4833)
Add related files to the device folder:

buffer config templates
pg lookup profile
port_config.ini
sai profile
sensor conf
plugins

Co-authored-by: Stephen Sun <stephens@mellanox.com>
2020-07-12 18:08:52 +00:00
zzhiyuan
2c426a8290 Skip thermalctld for arista platforms (#4893)
thermalctld throwing error messages because it is not yet fully configured, disabling it for now on arista platforms.

Co-authored-by: Zhi Yuan Carl Zhao <zyzhao@arista.com>
2020-07-12 18:08:51 +00:00
Aravind Mani
0c3ec0e644
[DellEMC] S52xx fix SFP reset in 1.0 API (#4858)
Issue: Port with AOC cable does not come up when "sfputil reset <port_name>" is executed.

Modified the incorrect mask used in reset API to resolve the issue.
2020-06-27 12:02:53 -07:00
carycelestica
b88770a67b
add PCIe config file (#4724) 2020-06-25 15:02:21 -07:00
Junchao-Mellanox
563a0fd21e
[Mellanox] Change port index in port_config.ini to 1-based (#4781)
* Change port index in port_config.ini to 1-based
* Add default port index to port_config.ini, change platform plugins to accept 1-based port index
* fix port index in sfp_event.py
2020-06-23 17:21:36 -07:00
madhanmellanox
d2366d4ff7
added files to create SKU Mellanox-SN3800-C64 (#4812)
* added files to create SKU Mellanox-SN3800-C64
Co-authored-by: Madhan Babu <madhan@arc-build-server.mtr.labs.mlnx>
2020-06-22 08:42:30 -07:00
madhanmellanox
b5f1b37386
added files to create SKU Mellanox-SN3800-D24C52 (#4808)
* added files to create SKU Mellanox-SN3800-D24C52

Co-authored-by: Madhan Babu <madhan@arc-build-server.mtr.labs.mlnx>
2020-06-21 12:19:11 -07:00
madhanmellanox
5efd1e7527
added files to create SKU Mellanox-SN3800-D28C50 (#4809)
* added files to create SKU Mellanox-SN3800-D28C50

Co-authored-by: Madhan Babu <madhan@arc-build-server.mtr.labs.mlnx>
2020-06-21 12:17:56 -07:00
madhanmellanox
b5d0bada19
modified files relevant to SKU Mellanox-SN3800-D112C8 (#4810)
* modified files relevant to SKU Mellanox-SN3800-D112C8

Co-authored-by: Madhan Babu <madhan@arc-build-server.mtr.labs.mlnx>
2020-06-21 12:16:16 -07:00
madhanmellanox
2c830f4074
Modified SKU based utils to Platform based utils (#4786)
Co-authored-by: Madhan Babu <madhan@arc-build-server.mtr.labs.mlnx>
2020-06-21 12:15:23 -07:00
shlomibitton
0029d366c4
Fix MSN4700 sensors (#4753)
Signed-off-by: Shlomi Bitton <shlomibi@mellanox.com>
2020-06-16 15:39:27 +03:00
shlomibitton
ea63f3e4b2
[mellanox]: Fix for MSN4600C sensors (#4754)
Signed-off-by: Shlomi Bitton <shlomibi@mellanox.com>
2020-06-12 16:08:27 -07:00
Aravind Mani
f31eabb5ee
[Dell] Force10-S6000-Q24S32 new HWSKU support (#4680)
**Why I did it**

- Added support for S6000 new HWSKU-Q24S32

**How I did it**

- Modified port_config.ini, TD2 settings to bring the ports UP.

**How to verify it**

- Check LLDP neighbors,LLDP table, interface status,EEPROM and other show commands.
- Do OIR, LED, Traffic testings.
2020-06-09 10:07:14 -07:00