Commit Graph

7 Commits

Author SHA1 Message Date
Sambath Kumar Balasubramanian
da348ecb79 sonic-buildimage Remove unused SAT port from arista configs. (#14167)
Why I did it
To fix aristanetworks/sonic#85

How I did it
Remove unnecessary SAT ports

How to verify it
Speed change from 400-100g without any error.
2023-03-14 04:32:42 +08:00
kenneth-arista
812c1aeecf
sonic-buildimage Make changes to arista config.bcm files to support max cores (#13831) (#14033)
To support 64 cores on arista skus. Fixes aristanetworks/sonic#77
Remapped recycle ports to lowers core port ids and set appl_param_nof_ports_per_modid to 64.

Co-authored-by: Sambath Kumar Balasubramanian <63021927+skbarista@users.noreply.github.com>
2023-03-02 13:08:00 -08:00
mssonicbld
6083175d06
[device/arista] Reduce SDK stat polling freq in DNX devices (#13429) (#13604) 2023-02-03 07:53:34 +08:00
kenneth-arista
63bdc43b7f [device/arista] Disabled polled_irq_mode for DNX SKUs (#13349)
Disabled polled_irq_mode for all Arista DNX devices as this mode
leads to excessive use of the CPU via an unneeded interrupt
polling thread.
2023-01-21 04:32:08 +08:00
Tejaswini Chadaga
3c485e02b2
[202205] Update BRCM SAI version to 7.1.31.4 (#13346)
Why I did it
To bring in the following fixes:

Revert temporary fix added to disable SA equal DA drops
CS00012273013 - [7.1][J2, J2c+] Disable SA Equals DA trap on DNX
CS00012274222 - How to block the voq for given destination port for a flow from a remote mod-id
CS00012275381 - SAI_INGRESS_PRIORITY_GROUP_STAT_PACKETS is incremented for port's PG's even if there are no traffic sent to that PG
CS00012274433 - Local Fault and Remote Fault are not polled by linkscan thread
How I did it
Merged above fixes to SAI code

How to verify it
Validated by running the basic sanity tests on XGS and DNX chassis platforms including

fib/test_fib.py
decap/test_decap.py
drop_counters/test_drop_counters.py
arp/test_arpall.py
2023-01-12 23:49:24 -08:00
mssonicbld
fd6523b423
Fix port index for multi-asic (#13042) (#13086)
Port indexes of front panel ports are not contiguous in multi-asic because we didn't distiguish between
front panel and internal ports, e.g., recycle ports. Fix this by assigning index to front panel port first
and then internal ports.

Co-authored-by: Song Yuan <64041228+ysmanman@users.noreply.github.com>
2022-12-16 14:56:12 -08:00
Bohan Yang
08da4efe34 Add 36 port 400g SKU for x86_64-arista_7800r3a_36d series of Linecards. (#11872)
Add 36 port 400g SKU for x86_64-arista_7800r3a_36d series of Linecards.
2022-10-25 20:36:37 +00:00