Commit Graph

31 Commits

Author SHA1 Message Date
vmittal-msft
7b7737ef0f Adjustment to ingress pool size to accomodate brcm sai (#10694) 2022-05-03 00:42:27 +00:00
Nikola Dancejic
602c8e99dc
[device config] Adding configuration for default route fallback (#10692)
Set sai_tunnel_underlay_route_mode attribute to fallback to default
route if more specific route is unavailable.
Signed-off-by: Nikola Dancejic <ndancejic@microsoft.com>
2022-04-29 16:20:18 -07:00
vmittal-msft
fcf5dcf5eb Changes to support topology and port speed agnostic switch init for TD3 based platforms (#10587) 2022-04-21 22:00:38 +00:00
Prince Sunny
d6ab409709
[202012] td2/td3 change cpu cos num to 10 (#9311)
Cherry-pick from #9301
2021-11-18 12:48:20 -08:00
gechiang
baa00e6969
[202012] Disable ALPM distributed hitbit thread that is used for debug purpose only but interfered with Other functional operations (#9190)
This is to address an issue where it was observed that SAI operations sometime make take a very long to time complete (over 45ms). It was determined that the ALPM distributed thread was causing this issue.
The fix is to disable this debug thread that has no functional purpose.

Preliminary tests looks fine. BGP neighbors were all up with proper routes programmed
interfaces are all up
Manually ran the fib test cases on 7050CX3 (TD3), TD2, TH, TH2, and TH3 based platforms and
thy all passed.
2021-11-08 11:50:44 -08:00
Lawrence Lee
a22c82288d
[device]: Add SAI checksum verify to TD3 config (#8886)
A new config option `sai_verify_incoming_chksum` was added to control the value of IPV4_INCR_CHECKSUM_ORIGINAL_VALUE_VERIFY in the EGR_FLEX_CONFIG control register (this prevents checksums of 0xffff from being propagated to other devices)

Signed-off-by: Lawrence Lee <lawlee@microsoft.com>
2021-10-04 10:45:44 -07:00
vmittal-msft
4b5284858a Updated SONIC buffer pool settings to accomodate SAI adjustment for Arista-7050CX3-32S-C32 (#8159) 2021-07-20 10:18:17 +00:00
gechiang
e784c2607c
[202012] Add BRCM SOC Property to not count ACL drops towards interface RX_DRP fir DualToR platforms (#8000) 2021-07-01 16:45:07 -07:00
vmittal-msft
162ec20fed Updated MMU settings for Arista-7050CX3-32S-C32 T1 topology (#7597) 2021-05-24 22:14:04 +00:00
Joe LeVeque
deb9e67838
[202012] Add SOC property to enable AN/LT on some platforms (#7547)
* [202012] Add SOC property to enable AN/LT on some platforms

Why I did it
To enable autonegotiation/link training on some Broadcom-based platforms (Arista 7060CX, 7260CX3, 7050cx3, Celestica DX010)

How I did it
Add appropriate SOC property for enabling the feature to the Broadcom config files of appropriate platforms
Also convert line endings to UNIX format for one Celestica file

* Add 'phy_an_lt_msft' to BCM config file permitted list
2021-05-06 22:21:43 -07:00
vmittal-msft
f766a1bccf Updated Qos/MMU settings for Arista-7050CX3-32S-C32 & Arista-7050CX3-32S-D48C8 (#7068)
* TD3 Qos/MMU settings for Arista-7050CX3-32S-C32 & Arista-7050CX3-32S-D48C8
2021-05-05 09:33:19 -07:00
Prince Sunny
75ac46eab0 [Broadcom] Set hierarchical ecmp levels to 2 (#7370)
Set hierarchical ecmp level to 2 instead of 3. Based on CS00011833367, ecmp level must be set to 2.
This is already handled for TH2 platforms. Change is required only for TD3

Co-authored-by: Ubuntu <prsunny@prince-vm.vzw1i4tqyeburcdz5lrgulxi2c.yx.internal.cloudapp.net>
2021-04-21 14:05:31 -07:00
vmittal-msft
61c3816e0c Remove dummy MMU profiles for Arista-7050CX3-32S-C32 and Arista-7050CX3-32S-D48C8 (#6785) 2021-04-19 13:15:55 -07:00
Sujin Kang
15aed52ef2 [pcie.yaml] Move pcie configuration file path to platform directory (#6475)
- Why I did it
The pcie configuration file location is under plugin directory not under platform directory.
#6437

- How I did it

Move all pcie.yaml configuration file from plugin to platform directory.
Remove unnecessary timer to start pcie-check.service
Move pcie-check.service to sonic-host-services
- How to verify it
Verify on the device
2021-03-04 21:23:05 +00:00
Vaibhav Hemant Dixit
f5c2e1cb54 Add the 10G ports with updated speed (#6699)
Port_config update for hwsku 7050CX3-32S-C3 - add two 10G ports.
This change is added to fix issue of "PortsOrch initialization failure" seen by previous removal of these 10G ports.
Tested on the device with new minigraph, and the PortsOrch initialization failure is not seen.
2021-02-06 23:27:46 -08:00
gechiang
fadf10529a [BCM Config] Update TD3 bcm.config files to use ISSU capable premium CANCUN 6.4.1 (#6651) 2021-02-05 16:11:59 -08:00
Tamer Ahmed
6f17c924e6 [sonic-device-data]: Update BRCM Tunnel/ECMP Parameter For 7050cx3 SKUs (#6415)
Update Tunnel and ECMP parameters for brcm 7050cx3 48x50G+8x100G and 32x100G SKUs.

signed-off-by: Tamer Ahmed <tamer.ahmed@microsoft.com>
2021-02-05 16:09:15 -08:00
Vaibhav Hemant Dixit
e35377eddf [arista]: 7050CX3-32S-C32: Remove unused 10G ports and update speed (#6638)
port_config.ini for HWSKU Arista-7050CX3-32S-C32 has missing speed column and duplicated lanes.
The incorrect speed causes issues in Orchagent RESTARTCHECK as the below task remains as the remaining item during swss shutdown.
2021-02-03 10:46:28 -08:00
Samuel Angebault
4e0a869b44
[arista]: Add placeholder healthd configuration for all platforms (#6233)
Prevent system-healthd from service from failing at boot time due to missing configuration.
Also adds basic support for healthd.
The following caveat exists with this placeholder configuration:
 - No PSU monitoring (sensors/fans)
 - No ASIC temperature monitoring
2020-12-17 05:18:38 -08:00
zzhiyuan
4d4b489a5f
Add platform.json to Arista platforms (#6150)
platform.json is needed for sonic-mgmt testing. Also in the future it will be used as part of dynamic port breakout.

Also removed the folder symlink for BlackhawkDD because it has a different platform.json than BlackhawkO.

Co-authored-by: Zhi Yuan Carl Zhao <zyzhao@arista.com>
2020-12-08 10:20:13 -08:00
Ying Xie
1ba583cb46
[TD3] add dummy MMU configuration for Arista-7050CX3-32S-D48C8 (#5950)
Need A mmu configuration to get the device going without generating lots of warnings.

Similar to dummy MMU configuration for Arista-7050CX3-32S-C32, this configuration will need to be updated with correct numbers. This MMU configuration is copied from 7060 comparable hwsku.

Signed-off-by: Ying Xie <ying.xie@microsoft.com>
2020-11-17 19:01:39 -08:00
Ying Xie
6a8ebef449
[Arista 7050cx3] add dummy MMU configurations for Arista-7050CX3-32S-C32 (#5798)
- Why I did it
On Arista-7050CX3-32S-C32, there are constant stream of errors like following.

Nov 3 21:56:24.415190 str2-7050cx3-acs-06 NOTICE swss#orchagent: :- registerInWdDb: No lossless TC found on port Ethernet68

Which causes:

loganalyzer to claim test failed.
leaving the system without MMU configuration. Which couldn't be good for any IO test.
- How I did it
Added these MMU configuraions are copied from another platform and guaranteed to be incorrect for hwsku Arista-7050CX3-32S-C32.

Adding them so that we have A MMU configuration and the system won't throw a whole bunch of errors and leave MMU unconfigured. The correct MMU configuration will come later.

This configuration is definitely not suitable for testing system performance or QoS behavior.

Signed-off-by: Ying Xie ying.xie@microsoft.com

- How to verify it
Test will have chance to pass. Ran a few test that would fail otherwise.
2020-11-09 13:27:36 -08:00
Samuel Angebault
5bfe37ca42
[Arista] Update driver submodules (#5686)
- Enable thermalctld support for our platforms
 - Fix Chassis.get_num_sfp which had an off by one
 - Implement read_eeprom and write_eeprom in SfpBase
 - Refactor of Psus and PsuSlots. Psus they are now detected and metadata reported
 - Improvements to modular support

Co-authored-by: Zhi Yuan Carl Zhao <zyzhao@arista.com>
2020-10-23 12:28:36 -07:00
Samuel Angebault
a24b581d80
[Arista] Add pcie.yaml configuration file for a few platforms (#5527)
* Add pcie.yaml configuration for Gardena
* Add pcie.yaml configuration for Upperlake
* Add pcie.yaml configuration for Clearlake
* Add pcie.yaml configuration for Lodoga
2020-10-02 09:05:43 -07:00
Samuel Angebault
4ec83b25bc
[arista]: Add new 48x50G + 8x100G hwsku for Lodoga (#5452) 2020-09-23 22:41:07 -07:00
abdosi
a6a10f05b7
In SAI 3.5 by default we are supporting 256 Group with 64 Memeber each. (#5400)
However in SAI 3.7 default behaviout got changes to 128 Group and 128
    Memeber each.

    This change is to make sure we are using same ECMP Group/Memeber Per
    Group for 3.7 also so that behaviour is consistent.

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
2020-09-22 11:21:12 -07:00
abdosi
b6efb49817
Update bcm soc property bcm_num_cos from 8 to 10 (#5314)
as needed by SAI 3.7 and above. Without this change
Warmboot fails from 3.5 to 3.7 as Braodcoam Datastructure
gets corrupted after warm-boot.

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
2020-09-04 07:40:17 -07:00
zzhiyuan
2c426a8290 Skip thermalctld for arista platforms (#4893)
thermalctld throwing error messages because it is not yet fully configured, disabling it for now on arista platforms.

Co-authored-by: Zhi Yuan Carl Zhao <zyzhao@arista.com>
2020-07-12 18:08:51 +00:00
Samuel Angebault
de4fa1874a
[arista]: remove the soc property disabling sram scan (#4623) 2020-05-20 12:44:48 -07:00
byu343
ae52223892
[arista]: Add fancontrol for arista 7050cx3 (#4121) 2020-02-11 13:19:07 -08:00
Samuel Angebault
64500e143b [Arista] Update drivers and boot script (#3959)
* Update arista driver submodule

* Add support for 7260CX3-64E in boot0

* Refactor boot0 platform specific definition

Make it easier to manage new sku

* Add support for 7050CX3-32S in boot0

Just contains the required boot0 information

* Add basic plugin support for DCS-7050CX3-32S

* Add port config for Arista-7050CX3-32S-C32

Co-authored-by: yurypm <yurypm@arista.com>
Co-authored-by: byu343 <byu@arista.com>
2020-01-17 10:44:49 -08:00