Commit Graph

841 Commits

Author SHA1 Message Date
Wirut Getbamrung
4bf873bf42
[device/celestica]: Fix failed test cases of Haliburton platform API (#7579)
- Why I did it
To fix failed test cases of Haliburton platform APIs that found on platform_tests script
- How I did it
Add device/celestica/x86_64-cel_e1031-r0/platform.json
Update functions to support python3.7
Add more functions follow latest sonic_platform_base
Fix the bug
- How to verify it
Run platform_tests script

Signed-off-by: Wirut Getbamrung [wgetbumr@celestica.com]
2021-07-23 06:18:39 -07:00
Vivek Reddy
69ed4417ca
[Mellanox] [master] Added D48C40 SKU for 4600C platform (#8201)
*Added new SKU for SN4600C Platform: Mellanox-SN4600C-D48C40
Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
2021-07-19 10:07:35 -07:00
vmittal-msft
e7cec0928b
Updated SONIC buffer pool settings to accomodate SAI adjustment for Arista-7050CX3-32S-C32 (#8159) 2021-07-16 12:32:16 -07:00
chihhan123
2a06e079fa
[accton]: Support LED (1G) on AS7326-56X (#8185)
Modify micro code of custom_led.bin to support LED 1G
2021-07-16 07:47:05 -07:00
Vivek Reddy
f95f8ead9e
[Mellanox][master][SKU] sonic interface names are aligned to 4 instead of 8 for 4600/4600C platforms (#8155)
*Edited platform.json for 4600 & 4600C
*Edited hwsku.json and port_config.ini files for all the SKU's present under these platforms
Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
2021-07-13 18:59:48 -07:00
SuvarnaMeenakshi
ba29bd60d2
Revert "[multi-asic][vs]: Add context_config.json files for multi-asic vs (#7697)" (#8147)
This reverts commit a557dbd97e.
Reverting this PR as it is not required currently for multi-asic VS.
multi-asic VS will come up with multiple instances of swss and syncd. syncd will use default hwinfo string, same as in single asic VS.
2021-07-11 15:00:04 -07:00
Samuel Angebault
17f0217f30
[Arista] Chassis device configurations (#7529)
Add configurations for the following chassis elements

Fabrics 7804R3-FM, 7808R3-FM and 7808R3A-FM
Linecard 7800R3-48CQ2
Supervisor 7800-SUP*
2021-06-30 18:16:20 -07:00
Arun Saravanan Balachandran
0135ba275b
DellEMC S6100: Determine pcie.yaml revision based on firmware (#7875)
Why I did it
To determine the revision of the pcie.yaml to be used based on BIOS version in DellEMC S6100 platform.

Depends on: Azure/sonic-platform-common#195

How I did it
Added two revisions of pcie.yaml pcie_1.yaml and pcie_2.yaml
Included a platform-specific Pcie class to provide the revision of the pcie.yaml to be used by pcieutil/pcied.
How to verify it
Execute pcieutil check (Azure/sonic-utilities#1672) command and verify the list of PCIe devices displayed.
Logs: UT_logs.txt
2021-06-29 15:19:54 -07:00
arunlk-dell
1d9fd820a3
DellEMC: S5248F - Platform API 2.0 implementation (#7930)
#### Why I did it
Support API 2.0 for S5248F platform

#### How I did it
Making changes to S5248F platform specific directory

Co-authored-by: Arun LK <Arun_L_K@dell.com>
2021-06-28 09:44:49 -07:00
Aravind Mani
5b0106944c
DellEMC: Enable Z9332f LED firmware (#7964)
#### Why I did it
Front end LED fw is not loaded in DellEMC Z9332f.

#### How I did it
Enabled LED fw files
2021-06-28 09:15:29 -07:00
vmittal-msft
2483860fd0
MMU configuration for Z9332 systems in T0 and T1 topolgy (#7973)
Why I did it
MMU configuration for DellEMC Z9332 systems in T0/T1 topology

How I did it
Updated config.bcm, QoS/Buffer pool and lossy/lossless profile settings

How to verify it
Verified that Dell systems are booting up fine and basic test cases passing.
2021-06-25 18:34:19 -07:00
gechiang
6fc279b7c1
Add BRCM SOC Property to not count ACL drops towards interface RX_DRP… (#7945)
* Add BRCM SOC Property to not count ACL drops towards interface RX_DRP counter for 7050CX3 and 7260CX3 DualToR platforms
2021-06-23 18:09:47 -07:00
ngoc-do
0ba67df0f4
Add fabric lane mapping to vs (sai.profile) and HWSKU Force10-S6000 (#7629)
This PR is actually https://github.com/Azure/sonic-buildimage/pull/6185 that was merged and then reverted to avoid test failure in swss. 

Now https://github.com/Azure/sonic-swss/pull/1459/ merged, and so this PR could merge to enable fabric test in swss.

Signed-off-by: ngocdo <ngocdo@arista.com>
2021-06-23 10:26:39 -07:00
judyjoseph
3ad830eb49
New sonic-buildimage images for Broadcom DNX ASIC family. (#7598)
Introduce new sonic-buildimage images for Broadcom DNX ASIC family.

sonic-broadcom-dnx.bin
sonic-aboot-broadcom-dnx.swi

How I did it

NO CHANGE to existing make commands

make init; make configure PLATFORM=broadcom;  make target/sonic-aboot-broadcom.swi; make  target/sonic-broadcom.bin

The difference now is that it will result in new broadcom images for DNX asic family as well. 

sonic-broadcom.bin, sonic-broadcom-dnx.bin
sonic-aboot-broadcom.swi, sonic-aboot-broadcom-dnx.swi

Note: This PR also adds support for Broadcom SAI 5.0 (based on 1.8 SAI ) for DNX based platform + changes in platform x86_64-arista_7280cr3_32p4 bcm config files and platform_env.conf files
2021-06-22 11:12:22 -07:00
roberthong-qct
95c67d2d55
[Quanta] Add and update platform and device files (#6971)
Add device and platform code for ix7-bwde, ix8a-bwde.
Support platform API 2.0 for all quanta platforms except for ix1b

Co-authored-by: robert.hong <robert.hong@qct.io>
2021-06-21 09:24:41 -07:00
DavidZagury
9d1c1659bd
[Mellanox] Update SKUs to enable SDK dumps (#7708)
- Why I did it
To create SDK dump on Mellanox devices when SDK event has occurred.

- How I did it
Set the SKUs keys needed to initialize the feature in SAI.

- How to verify it
Simulate SDK event and check that dump is created in the expected path.
2021-06-21 16:41:18 +03:00
Aravind Mani
653ff2c986
Update DellEMC-Z9332f-M-O16C64 SKU settings (#7908) 2021-06-20 18:06:00 -07:00
Alexander Allen
d2e62af85d
[device][mellanox] Fix supported breakout modes on MSN4410 (#7853)
- Why I did it
The default breakout mode according to hwsku.json for the MSN4410 is 1x400G and this is not a supported breakout mode according to its platform.json

This causes a conflict on boot of this platform and no containers on the switch will init successfully.

- How I did it
Referenced the platform specification files and updated platform.json

- How to verify it
Install master version of SONiC on MSN4410
Boot switch and verify swss is successfully running using docker ps
2021-06-20 19:35:44 +03:00
madhanmellanox
4e206ba36e
Adding new SKU Mellanox-SN4600C-C4 (#7815)
Add new SKU of SN4600C switch: Mellanox-SN4600c-c64

Co-authored-by: Madhan Babu <madhan@r-build-sonic06.mtr.labs.mlnx>
2021-06-17 10:04:38 -07:00
abdosi
9f4359804e
Updated 7260 64x100 MMU Profile. (#7849)
What I did:

Updated 7260 MMU Profile based on latest MSFT Tier 1 Tomahawk2_MMU_Setting_48x100G_40m_16x100G_300m_v1.0 and
TH2_PGHdrm_MSFT.

How I verify:
Made sure image is up/traffic is flowing/mmu dump looked fine.
SAI qos test need will be updated to support this SKU.
2021-06-15 22:06:48 -07:00
Stephen Sun
80d01f2f9a
[Mellanox] Enhance Python3 support for platform API (#7410)
- Why I did it
Enhance the Python3 support for platform API. Originally, some platform APIs call SDK API which didn't support Python 3. Now the Python 3 APIs have been supported in SDK 4.4.3XXX, Python3 is completely supported by platform API

- How I did it
Start all platform daemons from python3
1. Remove #/usr/bin/env python at the beginning of each platform API file as the platform API won't be started as daemons but be imported from other daemons.
2. Adjust SDK API calls accordingly

- How to verify it
Manually test and run regression platform test

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2021-06-15 17:57:48 +03:00
Andriy Kokhan
12a04704ad
[Arista] Added pcie.yaml for x86_64-arista_7170_32cd (#7788)
Process pcied failed on Arista-7170-32CD-C32
```
root@sonic:/# supervisorctl 
chassis_db_init                  EXITED    Jun 03 08:48 AM
dependent-startup                EXITED    Jun 03 08:48 AM
ledd                             RUNNING   pid 28, uptime 3:07:49
lm-sensors                       EXITED    Jun 03 08:48 AM
pcied                            FATAL     Exited too quickly (process log may have details)
```

Signed-off-by: Andriy Kokhan <andriyx.kokhan@intel.com>
2021-06-09 22:08:47 -07:00
Ying Xie
b2a2cf0750
[7050] updating 7050 MMU configurations (#7801)
Why I did it
7050 S4Q31 mmu configuration is missing ALPM configurations, causing not enough memory reserved for routes. Orchagent crashes on a nightly testbed with 6400 route entries.

How I did it
Add the missing ALPM configurations.

How to verify it
Load the configuration on testbed and verified new configuration exists and no more crash.

Signed-off-by: Ying Xie ying.xie@microsoft.com
2021-06-05 21:50:01 -07:00
Santhosh Kumar T
5c4d3f2561
[DellEMC] Z9332: Change in i2c mapping (#7797)
#### Why I did it
- After [sonic-linux-kernel#177](https://github.com/Azure/sonic-linux-kernel/pull/177)  changes, the I2C mux channels of Baseboard and Switchboard CPLDs are moved from i2c-4 and i2c-5 to i2c-36 and i2c-37 respectively.
- This caused QSFP driver initialization of i2c-36 to i2c-41 to fail causing the ports from Ethernet208 to Ethernet248 fail.

#### How I did it
- The fix to this problem is to change the order of QSFP driver initialization to I2C mux channels.
- Instead of the order i2c-10 to i2c-41, the order i2c-4 to i2c-35 is being utilized.
- Also, need to change the i2c-mux-channel number for Baseboard CPLD and switchboard CPLD in scripts to access them.
2021-06-04 17:34:19 -07:00
賓少鈺
53663339a2
Per-switching silicon Common config for Broadcom Supported Platforms (#7493)
* Per-switching silicon Common config for Broadcom Supported Platforms

* Per-switching silicon Common config for Broadcom Supported Platforms

* Per-switching silicon Common config for Broadcom Supported Platforms

* Remove property readme

* Add common config readme
2021-06-03 23:18:02 -07:00
pettershao-ragilenetworks
b30cf44b93
[Platform/Ragile] Support RA-B6510-48v8c platform (#7620)
Add new platform x86_64-ragile_ra-b6510-48v8c-r0
ASIC Vendor: Broadcom
Switch ASIC: Trident 3
Port Config: 48x25G+8x100G

Signed-off-by: pettershao-ragilenetworks <pettershao@ragilenetworks.com>
2021-06-03 10:51:01 -07:00
jostar-yang
b2c74afeb5
[AS5835-54x] Add get_status api and fix bug to fan.py (#7784)
Add get_status api and fix for read fan direction sysfs to fan.py

Signed-off-by: Jostar Yang <jostar_yang@accton.com.tw>
2021-06-03 08:43:26 -07:00
SuvarnaMeenakshi
a557dbd97e
[multi-asic][vs]: Add context_config.json files for multi-asic vs (#7697)
hwskus.
Why I did it
For multi-asic platforms, orchagent process in swss docker is started by passing device_ids(or asic_ids).
Each swss docker starts orchagent with a different device_id. This device_id is passed as Hardware info to syncd. For syncd to start with the right hwinfo, context_config.json is passed as an argument. context_config.json file is looked up to get the hwinfo information.
sonic-sairedis PRs required for this diff to be used to bring up multi-asic VS:
Azure/sonic-sairedis#830
Azure/sonic-sairedis#832

How I did it
Add context_config.json for each asic in the same structure as provided here: https://github.com/Azure/sonic-sairedis/blob/master/lib/src/context_config.json
Each asic context_config.json will have different hwinfo string.
hwinfo string will be same as device id retrieved from asic.conf file.
Signed-off-by: Suvarna Meenakshi <sumeenak@microsoft.com>
2021-06-01 10:18:26 -07:00
Stephen Sun
132420095a
[Mellanox] Support buffer configuration for 2km cables (#7337)
#### Why I did it
Support 2km cables for Microsoft SKUs

#### How I did it
1. Update pg_profile_lookup.ini with 2000m cable supported
2. Update buffer configuration for t1 with uplink cable 2000m
  - For SN3800 platform:
    - C64:
      - t0: 32 100G down links and 32 100G up links.
      - t1: 56 100G down links and 8 100G up links with 2 km cable.
    - D112C8: 112 50G down links and 8 100G up links.
    - D24C52: 24 50G down links, 20 100G down links, and 32 100G up links.
    - D28C50: 28 50G down links, 18 100G down links, and 32 100G up links.
  - For SN2700 platform:
    - D48C8: 48 50G down links and 8 100G up links.
    - C32:
      - t0: 16 100G down links and 16 100G up links.
      - t1: 24 100G down links and 8 100G up links with 2 km cable.
  - For SN4600C platform:
    - D112C8: 112 50G down links and 8 100G up links.

#### How to verify it
Run regression test
2021-05-30 20:07:10 -07:00
Neetha John
239a1cc1df
Rename AristaQX-32S skus (#7751)
This PR contains the following changes
Original Arista-7050-QX-32S sku (32x40G ports) has been renamed to Arista-7050QX32S-Q32
Arista-7050-QX-32S is symlinked to Arista-7050QX-32S-S4Q31 (4x10G, 31x40G ports)

Signed-off-by: Neetha John <nejo@microsoft.com>
2021-05-28 22:46:49 -07:00
Wirut Getbamrung
4ae6d3f5c9
[device/celestica]: Fix remaining failed test cases of Seastone-DX010 platform API (#7743)
**- Why I did it**
- To fix failed test cases of Seastone-DX010 platform APIs that found on [platform_tests](https://github.com/Azure/sonic-mgmt/tree/master/tests/platform_tests/api) script

**- How I did it**
1. Add device/celestica/x86_64-cel_seastone-r0/platform.json 
2. Update functions to support python3.7
3. Add more functions follow latest sonic_platform_base
4. Fix the bug
2021-05-28 12:56:09 -07:00
jostar-yang
0c5c4872dc
[as5835-54x] Add to support API2.0 (#6480)
Add platform API 2.0 support for as5835-54x platform
2021-05-28 10:50:49 -07:00
Kebo Liu
bf21dbce87
[Mellanox] Add support for MSN4600 A1 system (#7732)
Add new sensor conf for MSN4600 A1 system
Add a Mellanox hw-management patch to support MSN4600 A1 system
2021-05-27 09:52:45 -07:00
Ying Xie
a42aa3d316
[MMU] define T1 MMU configuratino for Arista-7260CX3-Q64 (#7718)
Why I did it
Arista-7260CX3-Q64 is missing T1 MMU configuration.

How I did it
Define T1 MMU configuration for Arista-7260CX3-Q64.

Signed-off-by: Ying Xie <ying.xie@microsoft.com>
2021-05-27 08:20:07 -07:00
Volodymyr Boiko
3edb4f1ebe
[barefoot][device] Drop platform API 1.0 (#7716)
#### Why I did it
To get rid of obsolete code

#### How I did it
Removed plugins folder from device/barefoot

Signed-off-by: Volodymyr Boyko <volodymyrx.boiko@intel.com>
2021-05-26 11:55:25 -07:00
Volodymyr Boiko
4448771088
[barefoot][device] Support pcied on Mavericks (#7705)
Add pcie.yaml to enable pcied on Mavericks platform

Signed-off-by: Volodymyr Boyko <volodymyrx.boiko@intel.com>
2021-05-25 13:48:17 -07:00
Kebo Liu
953f91343a
[Mellanox] Update the Spectrum-2 platform PSU sensor's label in the sensor conf file (#7706)
#### Why I did it
The label for PSU related sensors on the Spectrum-2 platform is not aligned with the physical location of the PSU. 

#### How I did it
Update the label in the sensor conf file for those relevant platforms

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2021-05-25 10:41:53 -07:00
Neetha John
6f884b7278
Update PG profile settings for Arista-7050QX-32S-S4Q31 (#7673)
Signed-off-by: Neetha John <nejo@microsoft.com>

Why I did it
PG profile settings need to be aligned with Arista-7050-QX-32S

How I did it
Copy over the current settings from Arista-7050-QX-32S and define params for 10G and 1G speeds as well
2021-05-24 17:15:37 -07:00
Neetha John
f744f9354c
Update MMU and QOS settings for Arista-7050QX-32S-S4Q31 (#7672)
Signed-off-by: Neetha John <nejo@microsoft.com>

Why I did it
Need proper MMU and Qos settings for Arista-7050QX-32S-S4Q31

How I did it
Updated the settings based on Arista-7050-QX-32S
2021-05-24 09:33:33 -07:00
tomer-israel
b1a7f670d7
[Mellanox] Add initial support for SN4800 for simulation device (#7448)
#### Why I did it
Add initial support of SN4800 platform for Mellanox ASIC simulation device.
NOTE: This is work in progress and not full support of the platform.

#### How I did it
Add new folders for SN4800 with zero ports based on SN4700 Spectrum-3 switch.
2021-05-18 09:34:33 -07:00
Prince Sunny
ea80325726
Vxlan src port range for breakout SKU (#7612)
*Extended Vxlan src port range for lab breakout SKU - Mellanox-SN3800-D112C8
2021-05-14 08:58:51 -07:00
vmittal-msft
aae315faaf
Updated MMU settings for Arista-7050CX3-32S-C32 T1 topology (#7597) 2021-05-12 21:28:19 -07:00
SeanWu
9b4ed6e6df
[accton] Add sensors.conf to multiple models (#7494)
#### Why I did it
Improve readability of `show environment` output.

#### How I did it
In all sensors.conf, give the customized labels according to HW specifications for each model.

Signed-off-by: Sean Wu <sean_wu@edge-core.com>
2021-05-12 12:42:20 -07:00
tomer-israel
3ccc45f5b8
[Mellanox] Add initial support for SN4800 platform (#7447)
- Why I did it
Add initial support of SN4800 platform .
NOTE: This is work in progress and not full support of the platform.

- How I did it
Add new folders for SN4800 with zero ports based on SN4700 Spectrum-3 switch.

- How to verify it
Simulator device was tested. See #7448
2021-05-12 22:21:04 +03:00
ec-michael-shih
a070f1a239
[Platform] Accton add to support as9726-32d platform. (#7479)
Add support for Accton as9726-32d platform

This pull request is based on as9716-32d, so I reference as9716-32d to create new model: as9726-32d.
This module do not need led driver to control led, FPGA can handle it.
I also implement API2.0(sonic_platform) for this model, CPLD driver, PSU driver, Fan driver to control these HW behavior.
2021-05-11 19:06:36 -07:00
Kebo Liu
629f4459d7
[Mellanox] Align PSU fan name in platform.json with latest change in PR #7490 (#7557)
The PSU fan name convention was changed from "psu_{}_fan_{}" to "psu{}_fan{}" in PR #7490, platform.json need to be changed and aligned.
2021-05-07 09:42:40 -07:00
Samuel Angebault
e7c26fb0c9
[Arista] Update platform configurations and library (#7527)
Platform library changes
 - Fix the use of /proc/modules during testing, fixes #7463
 - Add `libsfp-eeprom.so` build to read/write xcvr eeproms in C
 - Add some more reboot-cause information
 - Write down temperature hw thresholds to the sensors
 - Report software thresholds through platform api
 - Writ `port_name sysfs` file of optoe`
 - Tests enhancements
 - Fix dependency issues for chassis provisioning

Platform configuration changes
 - Add `pcie.yaml` configuration for a few platforms
 - Mount `libsfp-eeprom.so` inside `pmon`
 - Fix `Arista-7050SX3-48C8` and `Arista-7050SX3-48YC8' platform and hwsku
 - Miscellaneous fixes

Co-authored-by: Boyang Yu <byu@arista.com>
Co-authored-by: Zhi Yuan Carl Zhao <zyzhao@arista.com>
2021-05-06 10:59:22 -07:00
Junchao-Mellanox
a795bc0b8e
[Mellanox] Support new sensor conf file for MSN4700 A1/A0 (#7535)
#### Why I did it

MSN4700 A1/A0 used different sensor chip but keep the existing platform name *x86_64-mlnx_msn4700-r0*, this is a workaround to replace the sensor conf on MSN4700 A1/A0

#### How I did it

Use a shell script to get the sensor conf path and copy that files to /etc/sensors.d/sensors.conf
2021-05-06 10:13:26 -07:00
Aravind Mani
e7db9fe46c
DellEMC: Z9332f media settings (#7485)
Changed DellEMC Z9932f media settings from Vendor Name + PN method to common method.
2021-05-05 06:50:24 -07:00
Andriy Yurkiv
e52fdcfd72
[Mellanox] Add support to VXLAN src port range setting via SAI profile for r SN3800-D28C49S1 (#7500)
- Why I did it
Enable VXLAN src port range configuration via SAI profile for Mellanox-SN3800-D28C49S1 SKU

- How I did it
Added SAI_VXLAN_SRCPORT_RANGE_ENABLE=1 configuration to appropriate sai.profile

Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com>
2021-05-04 17:34:33 +03:00