Commit Graph

152 Commits

Author SHA1 Message Date
Samuel Angebault
178688b415
[Arista] Refresh device folder for DCS-7060DX4-32 (#6942)
As booting on DCS-7060DX4-32 would use the default sku of DCS-7060PX4-32 which is not compatible, 
thus move some files around to properly separate the configurations that are device specific.

Signed-off-by: Samuel Angebault <staphylo@arista.com>
2021-03-05 11:23:47 -08:00
Sujin Kang
d5238ae8dd
[pcie.yaml] Move pcie configuration file path to platform directory (#6475)
- Why I did it
The pcie configuration file location is under plugin directory not under platform directory.
#6437

- How I did it

Move all pcie.yaml configuration file from plugin to platform directory.
Remove unnecessary timer to start pcie-check.service
Move pcie-check.service to sonic-host-services
- How to verify it
Verify on the device
2021-02-21 08:27:37 -08:00
Samuel Angebault
5fb374b03d
[Arista] Driver and platform update (#6468)
- Add support for `DCS-7050SX3-48YC8` and `DCS-7050SX3-48C8` platform
 - Add support for more variants of `DCS-7280CR3-32[PD]4`
 - Add Supervisor to Linecard consutil support
 - Complete Watchdog platform API support
 - Fix some PSU behavior on `DCS-7050QX-32` and `DCS-7060CX-32S`
 - Fix SEU management on `DCS-7060CX-32S`
 - Allow kernel modules to build up to linux 5.10
 - Rename led color `orange` to `amber`
 - Miscellaneous fixes
2021-02-19 10:48:52 -08:00
vmittal-msft
02cc486511
Remove dummy MMU profiles for Arista-7050CX3-32S-C32 and Arista-7050CX3-32S-D48C8 (#6785) 2021-02-17 11:45:00 -08:00
Vaibhav Hemant Dixit
a7ba1b8b43
Add the 10G ports with updated speed (#6699)
Port_config update for hwsku 7050CX3-32S-C3 - add two 10G ports.
This change is added to fix issue of "PortsOrch initialization failure" seen by previous removal of these 10G ports.
Tested on the device with new minigraph, and the PortsOrch initialization failure is not seen.
2021-02-05 19:34:17 -08:00
gechiang
c98e8d6690
[BCM Config] Update TD3 bcm.config files to use ISSU capable premium CANCUN 6.4.1 (#6651) 2021-02-02 21:48:26 -08:00
Vaibhav Hemant Dixit
580666a406
[arista]: 7050CX3-32S-C32: Remove unused 10G ports and update speed (#6638)
port_config.ini for HWSKU Arista-7050CX3-32S-C32 has missing speed column and duplicated lanes.
The incorrect speed causes issues in Orchagent RESTARTCHECK as the below task remains as the remaining item during swss shutdown.
2021-02-02 11:26:36 -08:00
Tamer Ahmed
284c2738e8
[sonic-device-data]: Update BRCM Tunnel/ECMP Parameter For 7050cx3 SKUs (#6415)
Update Tunnel and ECMP parameters for brcm 7050cx3 48x50G+8x100G and 32x100G SKUs.

signed-off-by: Tamer Ahmed <tamer.ahmed@microsoft.com>
2021-01-29 14:15:48 -08:00
Samuel Angebault
4e0a869b44
[arista]: Add placeholder healthd configuration for all platforms (#6233)
Prevent system-healthd from service from failing at boot time due to missing configuration.
Also adds basic support for healthd.
The following caveat exists with this placeholder configuration:
 - No PSU monitoring (sensors/fans)
 - No ASIC temperature monitoring
2020-12-17 05:18:38 -08:00
zzhiyuan
4d4b489a5f
Add platform.json to Arista platforms (#6150)
platform.json is needed for sonic-mgmt testing. Also in the future it will be used as part of dynamic port breakout.

Also removed the folder symlink for BlackhawkDD because it has a different platform.json than BlackhawkO.

Co-authored-by: Zhi Yuan Carl Zhao <zyzhao@arista.com>
2020-12-08 10:20:13 -08:00
Samuel Angebault
468aac92b7
[Arista] Update platform configurations for 7060DX4 and 7060PX4 (#6084)
Current support for the 7060PX4-32 and 7060DX4 was broken.
With this change, ports are now linking fine.

Co-authored-by: Zhi Yuan Carl Zhao <zyzhao@arista.com>
2020-12-04 10:11:06 -08:00
Nazar Tkachuk
be145b613c
[Arista] Rename chip in sensors.conf for 7170 platform (#6026)
Rename chip name dps1900-i2c-X-58 to pmbus-i2c-X-58 in sensors.conf for Arista 7170 due to latest updates for Arista driver submodules #5686. After these updates adapter dps1900 was renamed and sensors.conf file is not applied properly. Issue was observed started from BFN SONiC image 16.

Signed-off-by: Nazar Tkachuk <nazarx.tkachuk@intel.com>
2020-12-01 15:57:31 -08:00
Joe LeVeque
7f4ab8fbd8
[sonic-utilities] Update submodule; Build and install as a Python 3 wheel (#5926)
Submodule updates include the following commits:

* src/sonic-utilities 9dc58ea...f9eb739 (18):
  > Remove unnecessary calls to str.encode() now that the package is Python 3; Fix deprecation warning (#1260)
  > [generate_dump] Ignoring file/directory not found Errors (#1201)
  > Fixed porstat rate and util issues (#1140)
  > fix error: interface counters is mismatch after warm-reboot (#1099)
  > Remove unnecessary calls to str.decode() now that the package is Python 3 (#1255)
  > [acl-loader] Make list sorting compliant with Python 3 (#1257)
  > Replace hard-coded fast-reboot with variable. And some typo corrections (#1254)
  > [configlet][portconfig] Remove calls to dict.has_key() which is not available in Python 3 (#1247)
  > Remove unnecessary conversions to list() and calls to dict.keys() (#1243)
  > Clean up LGTM alerts (#1239)
  > Add 'requests' as install dependency in setup.py (#1240)
  > Convert to Python 3 (#1128)
  > Fix mock SonicV2Connector in python3: use decode_responses mode so caller code will be the same as python2 (#1238)
  > [tests] Do not trim from PATH if we did not append to it; Clean up/fix shebangs in scripts (#1233)
  > Updates to bgp config and show commands with BGP_INTERNAL_NEIGHBOR table (#1224)
  > [cli]: NAT show commands newline issue after migrated to Python3 (#1204)
  > [doc]: Update Command-Reference.md (#1231)
  > Added 'import sys' in feature.py file (#1232)

* src/sonic-py-swsssdk 9d9f0c6...1664be9 (2):
  > Fix: no need to decode() after redis client scan, so it will work for both python2 and python3 (#96)
  > FieldValueMap `contains`(`in`)  will also work when migrated to libswsscommon(C++ with SWIG wrapper) (#94)

- Also fix Python 3-related issues:
    - Use integer (floor) division in config_samples.py (sonic-config-engine)
    - Replace print statement with print function in eeprom.py plugin for x86_64-kvm_x86_64-r0 platform
    - Update all platform plugins to be compatible with both Python 2 and Python 3
    - Remove shebangs from plugins files which are not intended to be executable
    - Replace tabs with spaces in Python plugin files and fix alignment, because Python 3 is more strict
    - Remove trailing whitespace from plugins files
2020-11-25 10:28:36 -08:00
Ying Xie
1ba583cb46
[TD3] add dummy MMU configuration for Arista-7050CX3-32S-D48C8 (#5950)
Need A mmu configuration to get the device going without generating lots of warnings.

Similar to dummy MMU configuration for Arista-7050CX3-32S-C32, this configuration will need to be updated with correct numbers. This MMU configuration is copied from 7060 comparable hwsku.

Signed-off-by: Ying Xie <ying.xie@microsoft.com>
2020-11-17 19:01:39 -08:00
Lawrence Lee
d0f16c0d79
Make backend device checking more robust (#5730)
Treat devices that are ToRRouters (ToRRouters and BackEndToRRouters) the same when rendering templates
 Except for BackEndToRRouters belonging to a storage cluster, since these devices have extra sub-interfaces created
Treat devices that are LeafRouters (LeafRouters and BackEndLeafRouters) the same when rendering templates

Signed-off-by: Lawrence Lee <lawlee@microsoft.com>
2020-11-10 15:06:35 -08:00
Ying Xie
6a8ebef449
[Arista 7050cx3] add dummy MMU configurations for Arista-7050CX3-32S-C32 (#5798)
- Why I did it
On Arista-7050CX3-32S-C32, there are constant stream of errors like following.

Nov 3 21:56:24.415190 str2-7050cx3-acs-06 NOTICE swss#orchagent: :- registerInWdDb: No lossless TC found on port Ethernet68

Which causes:

loganalyzer to claim test failed.
leaving the system without MMU configuration. Which couldn't be good for any IO test.
- How I did it
Added these MMU configuraions are copied from another platform and guaranteed to be incorrect for hwsku Arista-7050CX3-32S-C32.

Adding them so that we have A MMU configuration and the system won't throw a whole bunch of errors and leave MMU unconfigured. The correct MMU configuration will come later.

This configuration is definitely not suitable for testing system performance or QoS behavior.

Signed-off-by: Ying Xie ying.xie@microsoft.com

- How to verify it
Test will have chance to pass. Ran a few test that would fail otherwise.
2020-11-09 13:27:36 -08:00
Baptiste Covolato
527a69dfbf
[arista/7800r3_48cq(m)2_lc] remove platform_reboot (#5653)
We don't need a custom platform reboot on Clearwater2(Ms). They are expected to be rebooted via a normal linux soft reboot.

Remove symlink to the arista common platform reboot for those 2 platforms.
2020-10-29 16:26:41 -07:00
Samuel Angebault
5bfe37ca42
[Arista] Update driver submodules (#5686)
- Enable thermalctld support for our platforms
 - Fix Chassis.get_num_sfp which had an off by one
 - Implement read_eeprom and write_eeprom in SfpBase
 - Refactor of Psus and PsuSlots. Psus they are now detected and metadata reported
 - Improvements to modular support

Co-authored-by: Zhi Yuan Carl Zhao <zyzhao@arista.com>
2020-10-23 12:28:36 -07:00
BrynXu
a2e3d2fcea
[ChassisDB]: bring up ChassisDB service (#5283)
bring up chassisdb service on sonic switch according to the design in
Distributed Forwarding in VoQ Arch HLD

Signed-off-by: Honggang Xu <hxu@arista.com>

**- Why I did it**
To bring up new ChassisDB service in sonic as designed in ['Distributed forwarding in a VOQ architecture HLD' ](90c1289eaf/doc/chassis/architecture.md). 

**- How I did it**
Implement the section 2.3.1 Global DB Organization of the VOQ architecture HLD.

**- How to verify it**
ChassisDB service won't start without chassisdb.conf file on the existing platforms.
ChassisDB service is accessible with global.conf file in the distributed arichitecture.

Signed-off-by: Honggang Xu <hxu@arista.com>
2020-10-14 15:15:24 -07:00
zzhiyuan
3da996bbf8
[arista]: Add disable_pcie_firmware_check soc property (#5543)
This is to fix pcie firmware check assert in Broadcom SDK once the SAI changes merges. This will be in the future but adding the soc property in the broadcom config now.

Co-authored-by: Zhi Yuan Carl Zhao <zyzhao@arista.com>
2020-10-06 18:35:15 -07:00
Samuel Angebault
a24b581d80
[Arista] Add pcie.yaml configuration file for a few platforms (#5527)
* Add pcie.yaml configuration for Gardena
* Add pcie.yaml configuration for Upperlake
* Add pcie.yaml configuration for Clearlake
* Add pcie.yaml configuration for Lodoga
2020-10-02 09:05:43 -07:00
Samuel Angebault
4ec83b25bc
[arista]: Add new 48x50G + 8x100G hwsku for Lodoga (#5452) 2020-09-23 22:41:07 -07:00
abdosi
a6a10f05b7
In SAI 3.5 by default we are supporting 256 Group with 64 Memeber each. (#5400)
However in SAI 3.7 default behaviout got changes to 128 Group and 128
    Memeber each.

    This change is to make sure we are using same ECMP Group/Memeber Per
    Group for 3.7 also so that behaviour is consistent.

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
2020-09-22 11:21:12 -07:00
Samuel Angebault
0b4191fe2a
[Arista] Updating driver submodules (#5352)
- Merge chassis codebase upstream
 - Add support for Otterlake supervisor
 - Add support for NorthFace and Camp chassis
 - Add support for Eldridge, Dragonfly and Brooks fabrics
 - Add support for Clearwater2 and Clearwater2Ms linecards
 - Add new arista Cli to power on/off cards
 - Add new arista show Cli to inspect supervisor, chassis, fabrics and linecards
2020-09-10 01:34:38 -07:00
Wei Bai
0b6fd70767
Update PG profiles for Arista 7050 (#5324)
* Update pg_profile_lookup.ini
2020-09-08 11:57:21 -07:00
abdosi
b6efb49817
Update bcm soc property bcm_num_cos from 8 to 10 (#5314)
as needed by SAI 3.7 and above. Without this change
Warmboot fails from 3.5 to 3.7 as Braodcoam Datastructure
gets corrupted after warm-boot.

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
2020-09-04 07:40:17 -07:00
zzhiyuan
2c426a8290 Skip thermalctld for arista platforms (#4893)
thermalctld throwing error messages because it is not yet fully configured, disabling it for now on arista platforms.

Co-authored-by: Zhi Yuan Carl Zhao <zyzhao@arista.com>
2020-07-12 18:08:51 +00:00
Samuel Angebault
c8bd640ae5
[arista] Update drivers submodules (#4693)
- Sensor and Fan information added to primary platforms for thermal API.
- Refactors involving better abstractions, code reuse and dead code removal.
- Improvements to the diag capabilities
- Pylintrc added to improve code quality. Will become fatal at a later time.

Co-authored-by: Baptiste Covolato <baptiste@arista.com>
2020-06-04 13:33:33 -07:00
Samuel Angebault
d35a8a3800
[arista]: Add SmartsvilleDDBK and SmartsvilleBkMs (#4662)
Co-authored-by: Boyang Yu <byu@arista.com>
2020-05-28 14:59:00 -07:00
Samuel Angebault
de4fa1874a
[arista]: remove the soc property disabling sram scan (#4623) 2020-05-20 12:44:48 -07:00
Neetha John
286aa35ac6
[qos]: Alpha and ECN settings change for Th (#4564)
Dynamic threshold setting changed to 0 and WRED profile green min threshold set to 250000 for Tomahawk devices

Changed the dynamic threshold settings in pg_profile_lookup.ini
Added a macro for WRED profiles in qos.json.j2 for Tomahawk devices
Necessary changes made in qos.config.j2 to use the macro if present

Signed-off-by: Neetha John <nejo@microsoft.com>
2020-05-09 11:21:18 -07:00
Samuel Angebault
5b0ec7afe6
[Arista] Update drivers submodules (#4317)
* Update arista drivers submodules

* Add device configs for 7060CX2-32S

* Update boot0 and union-mount for 7060CX2-32S

* Add 7170-32C and 7170-32CD support in boot0

* Sync after writting boot configs

* Add 7170-32C and 7170-32CD device configurations

Co-authored-by: Boyang Yu <byu@arista.com>
2020-03-27 17:28:27 -07:00
byu343
ae52223892
[arista]: Add fancontrol for arista 7050cx3 (#4121) 2020-02-11 13:19:07 -08:00
Samuel Angebault
64500e143b [Arista] Update drivers and boot script (#3959)
* Update arista driver submodule

* Add support for 7260CX3-64E in boot0

* Refactor boot0 platform specific definition

Make it easier to manage new sku

* Add support for 7050CX3-32S in boot0

Just contains the required boot0 information

* Add basic plugin support for DCS-7050CX3-32S

* Add port config for Arista-7050CX3-32S-C32

Co-authored-by: yurypm <yurypm@arista.com>
Co-authored-by: byu343 <byu@arista.com>
2020-01-17 10:44:49 -08:00
byu343
8a7c1300c2 [devices]: Fix the clock setting on arista 7280 (#3788)
* Fix serdes setting for B0/B1 revision chip on 7280
2019-11-21 16:21:08 -08:00
Andriy Kokhan
fc495dc10e [barefoot][build] Fixed BFN platform build failure (#3766)
Signed-off-by: Andriy Kokhan <akokhan@barefootnetworks.com>
2019-11-19 22:14:29 -08:00
Samuel Angebault
05e659901f [arista] Add support for more 7280CR3 variants (#3711)
* Add extra Smartsville hwskus
2019-11-06 10:11:38 -08:00
zzhiyuan
4026a8bc8d Remove macro generate_pg_profils for 7170 buffer (#3635) 2019-10-24 16:48:46 -07:00
Wenda Ni
0d2aa7fb5b [devices]: PG headroom change for Arista 7260 (#3600)
Signed-off-by: Wenda Ni <wenni@microsoft.com>
2019-10-15 06:03:48 -07:00
byu343
28c358b491 Add hwSku Arista-7280CR3-C28S8 (#3574) 2019-10-08 12:05:24 -07:00
zzhiyuan
f3cfa8fdff Fix buffer configurations for 7170 (#2972)
* Fix buffer configurations for 7170

* Adjust buffer configurations for 7170

* Remove ingress lossless profiles for Arista 7170
2019-10-04 10:14:09 -07:00
Ying Xie
eeeda28434
[bcm config] enable sram scan (#3558)
Per Broadcom's recommendations.

Signed-off-by: Ying Xie <ying.xie@microsoft.com>
2019-10-03 17:02:59 -07:00
Wenda Ni
7b0a5ba6ae Remove the divide by 4 operation to the under the hood SAI (#1532)
* Remove the divide by 4 operation to the under the hood SAI

This is to avoid the need and thus the confusion for application program to know
the mmu internal architecture

This change must have support from SAI change to reach the correct
config

Signed-off-by: Wenda <wenni@microsoft.com>

* Relegate the divide by 4 operation to the under the hood SAI for egress
lossless pool

Extend to 7060 and 6100

Signed-off-by: Wenda <wenni@microsoft.com>

* Add more TH/TH2 hwskus

Signed-off-by: Wenda Ni <wenni@microsoft.com>

* Update config test

Signed-off-by: Wenda Ni <wenni@microsoft.com>

* Add TH2 ingress lossy profile

Signed-off-by: Wenda Ni <wenni@microsoft.com>

* Move the divide by 4 operation to SAI internal

Signed-off-by: Wenda Ni <wenni@microsoft.com>

* [bcm SAI] Upgrade Broadcom SAI to version 3.5.3.1-15

- Broadcom SAI 3.5 GA release 20190924.

Signed-off-by: Ying Xie <ying.xie@microsoft.com>
2019-09-25 15:57:07 -07:00
byu343
2f63e90b8b [device/arista] Add hwSku Arista-7280CR3-C40 for 7280 (#3477)
* Add hwSku Arista-7280CR3-C40

* Clean empty lines

* Fix violation to config_checker

* Fix no new line at end
2019-09-23 18:07:20 -07:00
zzhiyuan
1840bef1a1 [devices]: Add serdes tuning for Arista 7060PX4 32x400G (#3382) 2019-08-28 08:44:13 -07:00
Andriy Kokhan
f468bc7859 [barefoot]: updated SDK to 9.0 pre-release (#3350)
Signed-off-by: Andriy Kokhan <akokhan@barefootnetworks.com>
2019-08-19 10:28:00 -07:00
Ying Xie
99b0b349bf
[mmu] add mmu_init_config to HWSKU Arista-7260CX3-Q64 (#3334)
Signed-off-by: Ying Xie <ying.xie@microsoft.com>
2019-08-13 17:31:25 -07:00
zzhiyuan
0ef7dc5d98 [devices]: Update Arista 7260CX3-64 10G SFP tuning (#3151) 2019-07-16 08:42:55 -07:00
zzhiyuan
16e85712b7 [devices]: Add tuning for Arista 7060PX/DX4 32x400G (#3145)
* Add serdes polarity for 32x400G Arista 7060PX/DX4

* Add serdes polarity for 64x100G on Arista 7060PX/DX4
2019-07-12 11:25:19 -07:00
Wenda Ni
dbdc166f6f
Add new hwsku Arista-7050QX32S-Q32 (#3091)
Signed-off-by: Wenda Ni <wenni@microsoft.com>
2019-06-27 17:22:44 -07:00