Commit Graph

782 Commits

Author SHA1 Message Date
madhanmellanox
29763cd095
Adding new SKU Mellanox-SN3800-D28C49S1 (#7404) 2021-04-23 09:19:56 -07:00
Prince Sunny
dd4d2a75f0
[Broadcom] Set hierarchical ecmp levels to 2 (#7370)
Set hierarchical ecmp level to 2 instead of 3. Based on CS00011833367, ecmp level must be set to 2.
This is already handled for TH2 platforms. Change is required only for TD3

Co-authored-by: Ubuntu <prsunny@prince-vm.vzw1i4tqyeburcdz5lrgulxi2c.yx.internal.cloudapp.net>
2021-04-21 13:22:52 -07:00
shlomibitton
b0bfa2b86b
[Mellanox] Fix for all Spectrum based systems: SAI profile speed configurations (#7119)
Fix to the correct value for all SPC1 devices.
For 10G added 10GB_CX4_XAUI, 10GB_KX4, 10GB_KR, 10GB_SR and 10GB_ER_LR
For 50G added 50GB_SR2

This bitmask represents all the options available for interface type and some were missing.
Note: it was working just fine if you were setting the value from SONiC CLI but not from the default SAI Profile.

Signed-off-by: Shlomi Bitton <shlomibi@nvidia.com>
2021-04-19 10:03:15 -07:00
dereksun01
3b4aa00e26
[device] Add as5835_54x configuration (#6970)
Add configuration files:
- mv2-as5835-48x10G+6x100G.config.bcm
- sai.profile
- led_proc_init.soc
- custom_led.bin

Signed-off-by: derek_sun <ecsonic@edge-core.com>
2021-04-19 08:56:12 -07:00
jostar-yang
ee728aab7b
[as7326-56x] Add to support PDDF (#7176)
Support PDDF on the as7326-56x platfrom

Signed-off-by: Jostar Yang <jostar_yang@accton.com.tw>
2021-04-15 09:39:15 -07:00
jostar-yang
6641a6b1a1
[as9716-32d] Add to support PDDF (#6902)
Add PDDF support for Accton as9716-32d platform

Co-authored-by: Jostar Yang <jostar_yang@accton.com.tw>
2021-04-14 14:43:52 -07:00
jostar-yang
b4b9e4234f
[as7816-64x] Add to support PDDF (#7077)
Add PDDF support for Accton as7816-64x platform

Co-authored-by: Jostar Yang <jostar_yang@accton.com.tw>
2021-04-14 14:40:52 -07:00
Aravind Mani
95fecafdf9
Dell S6100: Modify transceiver change event from interrupt to poll mode (#7309)
#### Why I did it

- xcvrd crash was seen in latest 201811 images.
- For Dell S6100,API 2.0 uses poll mode while 1.0 was still using interrupt mode.

#### How I did it

- Modified get_transceiver_change_event in 1.0 to poll mode.
2021-04-14 12:12:30 -07:00
Kebo Liu
ef98890e6e
[Mellanox] Fix incomplete platform name for MSN4600C in sfputil plugin (#7259)
The platform name for MSN4600C in sfputil pliugin is not complete: "x86_64-mlnx_msn4600c" -> "x86_64-mlnx_msn4600c-r0"

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2021-04-08 10:15:31 -07:00
Aravind Mani
d027aee7df
DellEMC Z9332f change port alias (#7260) 2021-04-08 09:47:20 -07:00
Stephen Sun
46a7fac1aa
Bug fix: Support dynamic buffer calculation on ACS-MSN3420 and ACS-MSN4410 (#7113)
- Why I did it
Add missed files for dynamic buffer calculation for ACS-MSN3420 and ACS-MSN4410

- How I did it
asic_table.j2: Add mapping from platform to ASIC
Add buffer_dynamic.json.j2 for ACS-MSN4410.

- How to verify it
Check whether the dynamic buffer calculation daemon starts successfully.

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2021-04-07 20:33:15 +03:00
Danny Allen
fca7b2429d
Revert "Add fabric lane mapping to vs (sai.profile) and HWSKU Force10-S6000 (#6185)" (#7250)
This reverts commit c2b5e931a2.
2021-04-07 09:57:16 -07:00
ngoc-do
c2b5e931a2
Add fabric lane mapping to vs (sai.profile) and HWSKU Force10-S6000 (#6185)
Signed-off-by: ngocdo <ngocdo@arista.com>
2021-04-07 09:10:40 -07:00
Aravind Mani
e6afc5ad9a
Add DellEMC Z9332f pre-emphasis settings (#6984) 2021-04-05 09:44:37 -07:00
Wirut Getbamrung
fbcb9403e8
[device/celestica]: Fix failed test cases of DX010 platform APIs (#6564)
1. Add device/celestica/x86_64-cel_seastone-r0/platform.json 
2. Update functions to support python3.7
3. Add more functions follow latest sonic_platform_base
4. Fix the bug

Co-authored-by: 119064273 <2276096708@qq.com>
Co-authored-by: Eric Zhu <erzhu@celestica.com>
Co-authored-by: doni@celestica.com <doni@celestica.com>
2021-04-02 10:08:31 -07:00
Ying Xie
197dd4e675
[e1031] add GbE and higig port to E1031 port_config.ini (#7208)
Why I did it
These ports are being enumerated by the latest SAI. But they are not defined in port_config.ini.

SONiC end up trying to delete these 3 ports and hit SAI error and crash.

How I did it
Add the GbE and the 2 HiGig ports in the port_config.ini.

How to verify it
Put the port_config.ini on a device crashing with port deleting. load minigraph and the crash stopped.

Signed-off-by: Ying Xie ying.xie@microsoft.com
2021-04-01 07:46:03 -07:00
gechiang
6f65b42e4c
7260cx3 DualToR config.bcm support based on DualToR setting in device metadata at boot time (#7168)
* 7260cx3 DualToR config.bcm support based on DualToR setting in device metadata at boot time. 
For HWSKU Arista-7260CX3-C64 the MMU setting SOC for T0/T1 is also combined into the config.bcm.j2 logic so use just one config file and adding delta based on Switch Roles.
2021-03-31 14:23:24 -07:00
Volodymyr Boiko
e5255b3d39
[device][barefoot] Skip psud for Newport (#7200)
Temporary skip psud for Newport, for Barefoot needs.

Signed-off-by: Volodymyr Boyko <volodymyrx.boiko@intel.com>
2021-03-31 12:55:40 -07:00
Dmytro Shevchuk
d8627e6414
[yang] update yang model, add autoneg to sonic-port (#5963)
Dynamic Port Breakout fall in case "autoneg" field exist in config_db.

- How I did it
Added "autoneg" field in sonic-port yang model.

- How to verify it
Add "autoneg" field into config_db like this:

"Ethernet8": {
    "index": "2", 
    "lanes": "8,9,10,11", 
    "fec": "rs", 
    "pfc_asym": "off", 
    "mtu": "9100", 
    "alias": "Ethernet8", 
    "admin_status": "up", 
    "autoneg": "on", 
    "speed": "100000",
},
2021-03-30 08:27:58 -07:00
Junchao-Mellanox
48042b7256
[Mellanox] Use softlink for sfputils on MSN4410 platform (#7092)
The file device/mellanox/x86_64-mlnx_msn4410-r0/plugins/sfputil.py is not a software link for device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfputil.py. And it is still using python2 syntex which causes some SFP CLI error. The PR is to change it to a softlink and add 4410 support in device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfputil.py.
2021-03-27 11:56:48 -07:00
Ying Xie
832e63554a
[Arista] add MMU configuration for Arista 7260 C64 (#7027)
Signed-off-by: Ying Xie <ying.xie@microsoft.com>
2021-03-26 11:10:19 -07:00
Lior Avramov
d19bb02ce4
[Mellanox]: Fix PCIEd configuration files for SN3700 system (#7058)
Update with correct PCI addresses

Signed-off-by: liora <liora@nvidia.com>
2021-03-15 21:06:12 -07:00
vpsubramaniam
4aa3c6f488
Skip thermalctld for DellEMC S5248F platform (#7022)
Skip thermalctld in DellEMC S5248F platform since it requires platform API support

Co-authored-by: V P Subramaniam <Subramaniam_Vellalap@dell.com>
2021-03-12 11:53:36 -08:00
Volodymyr Boiko
b60d1fc526
[barefoot][device] Enable thermalctld (#7005)
Enable thermalctld on Barefoot platforms

Signed-off-by: Volodymyr Boyko <volodymyrx.boiko@intel.com>
2021-03-12 11:51:45 -08:00
madhanmellanox
721948f3e4
[mellanox]: Fixing wrong index in Mellanox-SN3800-D28C50 SKU (#7032)
Co-authored-by: Madhan Babu <madhan@l-csi-0241l.mtl.labs.mlnx>
2021-03-11 20:16:51 -08:00
vpsubramaniam
377ea1a229
DellEMC: Z9332F - Watchdog support, add platform.json, new platform API implementation and fixes (#6988)
Incorporate the below changes in DellEMC Z9332F platform:

- Implemented watchdog platform API support
- Implement ‘get_position_in_parent’, ‘is_replaceable’ methods for all device types
- Change return type of SFP methods to match specification in sonic_platform_common/sfp_base.py
- Added platform.json file in device directory.

Co-authored-by: V P Subramaniam <Subramaniam_Vellalap@dell.com>
2021-03-10 10:49:33 -08:00
Wirut Getbamrung
6ae2cb5607
[device/celestica]: Add xcvrd event support for Haliburton (#6517)
#### Why I did it
- The xcvrd service requires an event detection function, unplug or plug in the transceiver.

#### How I did it
- Add sysfs interrupt to notify userspace app of external interrupt
- Implement get_change_event() in chassis api.
- Also begin installing Python 3 sonic-platform package for Celestica platforms
2021-03-08 10:10:11 -08:00
Dror Prital
b85caa581f
[DPB] [Mellanox] added capability files for SN2700-D40C8S8 SKU (#6878)
#### Why I did it

Additional file for DPB in order to support SKU SN2700-D40C8S8 on master

#### How I did it

Add hwsku.json file

#### How to verify it

Enforce  "Mellanox-SN2700-D40C8S8 SKU on Master and see it works as expected, meaning:

Port 1/3 will be used as 4x10G
Port 2/4 - Not exist (blocked since 1 and 3 split to 4)
Port 7/8/9/10/23/24/25/26 will used as 100G
All other ports will be used as 2x50G

This PR should be added on top of PR:
https://github.com/Azure/sonic-buildimage/pull/6876

#### Description for the changelog

Adding hwsku.json file to SN2700-D40C8S8 SKU
2021-03-05 12:43:22 -08:00
Samuel Angebault
178688b415
[Arista] Refresh device folder for DCS-7060DX4-32 (#6942)
As booting on DCS-7060DX4-32 would use the default sku of DCS-7060PX4-32 which is not compatible, 
thus move some files around to properly separate the configurations that are device specific.

Signed-off-by: Samuel Angebault <staphylo@arista.com>
2021-03-05 11:23:47 -08:00
Junchao-Mellanox
0e071493de
Change buffer config for new SKU Mellanox-SN2700-D40C8S8 (#6926)
#### Why I did it

Change buffer config for new SKU Mellanox-SN2700-D40C8S8

#### How I did it

Reuse the buffer config of SKU Mellanox-SN2700-D48C8

#### How to verify it

Run sonic-mgmt qos test and all passed
2021-03-04 14:12:59 -08:00
DavidZagury
724785db15
[DPB] [Mellanox] Fix files for SN4600 platform (#6930)
- Why I did it
Fix the build and fix the SN4600 DPB support

- How I did it
Fix port configuration file for SN4600 based on recent changes

- How to verify it
System bringup is completed, all interfaces are up.
Platform tests suits all is passing.
2021-03-02 07:35:18 +02:00
Srideep
0f1d41dac2
[DellEMC:Z9332f] Modify SKU-DellEMC-Z9332f-M-O16C64 to support different port-config (#6906) 2021-03-01 09:53:35 -08:00
DavidZagury
08202017d9
[DPB] [Mellanox] added capability files for SN4600 platform (#6887)
- Why I did it
To add support for the dynamic breakout on Mellanox platform x86_64-mlnx_msn4600

- How I did it
Add the relevant files describing Mellanox platform x86_64-mlnx_msn4600 breakout modes to a new device folder.

- How to verify it
System bringup is completed, all interfaces are up.
Platform tests suits all is passing.
2021-03-01 12:43:33 +02:00
Lior Avramov
bc1ed0a516
[Mellanox]: Fix PCIEd configuration files for SN3700 and SN3800 systems (#6913)
- Why I did it
To fix PCIEd errors in log.

- How I did it
Update pcie.yaml with the right PCI addresses.

- How to verify it
Check logs, operation occurs each minute.

Signed-off-by: liora <liora@nvidia.com>
2021-03-01 12:36:18 +02:00
Nazarii Hnydyn
39b1c12731
[Mellanox]: Fix PCIEd config for SN4600c (#6892)
Signed-off-by: Nazarii Hnydyn <nazariig@nvidia.com>
2021-02-26 00:28:32 -08:00
Nazarii Hnydyn
923dc52f15
[Mellanox]: Fix PCIEd config for SN4600 (#6894)
Signed-off-by: Nazarii Hnydyn <nazariig@nvidia.com>
2021-02-26 00:28:17 -08:00
Sangita Maity
18263c99dd
[DPB|master] Update Dynamic Port Breakout Logic for flexible alias support a… (#6831)
To fix [DPB| wrong aliases for interfaces](https://github.com/Azure/sonic-buildimage/issues/6024) issue, implimented flexible alias support [design doc](https://github.com/Azure/SONiC/pull/749)

> [[dpb|config] Fix the validation logic of breakout mode](https://github.com/Azure/sonic-utilities/pull/1440) depends on this

#### How I did it

1. Removed `"alias_at_lanes"` from port-configuration file(i.e. platfrom.json) 
2. Added dictionary to "breakout_modes" values. This defines the breakout modes available on the platform for this parent port, and it maps to the alias list. The alias list presents the alias names for individual ports in order under this breakout mode.
```
{
    "interfaces": {
        "Ethernet0": {
            "index": "1,1,1,1",
            "lanes": "0,1,2,3",
            "breakout_modes": {
                "1x100G[40G]": ["Eth1"],
                "2x50G": ["Eth1/1", "Eth1/2"],
                "4x25G[10G]": ["Eth1/1", "Eth1/2", "Eth1/3", "Eth1/4"],
                "2x25G(2)+1x50G(2)": ["Eth1/1", "Eth1/2", "Eth1/3"],
                "1x50G(2)+2x25G(2)": ["Eth1/1", "Eth1/2", "Eth1/3"]
            }
        }
}
```
#### How to verify it
`config interface breakout`

Signed-off-by: Sangita Maity <samaity@linkedin.com>
2021-02-26 00:13:33 -08:00
Joe LeVeque
c6178259fc
[Celestica] Ensure concrete platform API classes call base class initializer (#6852)
In preparation for the merging of Azure/sonic-platform-common#173, which properly defines class and instance members in the Platform API base classes.

It is proper object-oriented methodology to call the base class initializer, even if it is only the default initializer. This also future-proofs the potential addition of custom initializers in the base classes down the road.
2021-02-25 11:20:53 -08:00
ec-michael-shih
66e3e51f70
[Platform] Accton add to support as4630-54te platform. (#6683)
Add support for Accton as4630-54te platform
2021-02-25 10:47:38 -08:00
DavidZagury
5aee92e56d
[Mellanox] Add support for SN4600 system (#6879)
- Why I did it
Add support for new 64x200G SN4600 systems

- How I did it
Add all relevant files (w/o platform.json and hwsku.json as they will come later) with default SKU.

- How to verify it
Install image on switch, verify all ports are up and configured properly, run full platform SONiC tests.
2021-02-25 09:30:43 +02:00
ruijie.com.cn
a582c13e98
[Ruijie] Add ruijie platform & device (#4954)
Add new platform x86_64-ruijie_b6510-48vs8cq-r0 (Trident 3)
    ASIC Vendor: Broadcom
    Switch ASIC: Trident 3
    Port Config: 48x25G+8x100G

Signed-off-by: tim-rj <sonic_rd@ruijie.com.cn>
2021-02-24 16:45:27 -08:00
rkdevi27
a37824ff0c
[dell/s6000]: Enable graceful reboot in S6000 (#6835)
The S6000 devices, the cold reboot is abrupt and it is likely to cause issues which will cause the device to land into EFI shell. Hence the platform reboot will happen after graceful unmount of all the filesystems as in S6100.

Moved the platform_reboot to platform_reboot_override and hooked it to the systemd shutdown services as in S6100
2021-02-24 12:00:24 -08:00
Dror Prital
51eee8ccce
Add new SKU of Mellanox-SN2700-D40C8S8 (#6876)
#### Why I did it

Add new SKU for SN2700 Mellanox system that supports the following port configuration:
8 X 100G
40 X 50G
8 X 10G

#### How I did it

Add new Folder - "Mellanox-SN2700-D40C8S8" under /sonic-buildimage/device/mellanox/x86_64-mlnx_msn2700-r0/
that contains the relevant files supporting this SKU

the buffers are based on SKU: D48C8 . Later on it will be configured specific for this SKU

#### How to verify it

Bring up the image, run "show interface status" and make sure that all ports are up and reflect the following requirement:
Port 1/3 will be used as 4x10G
Port 2/4 - Not exist (blocked since 1 and 3 split to 4)
Port 7/8/9/10/23/24/25/26 will used as 100G
All other ports will be used as 2x50G

#### Which release branch to backport (provide reason below if selected)

- [ ] 201811
- [ ] 201911
- [ ] 202006
- [X] 202012

#### Description for the changelog

Support new SKU under the name of SN2700-D40C8S8
2021-02-24 10:34:12 -08:00
SuvarnaMeenakshi
d88e8cf87b
[multi-asic][vs]: Add new multi-asic vs hwsku with four asics (#6558)
- Why I did it
Current mutli-asic vs hwsku consists of 6 asics with each asic having 32 interfaces. When bringing this up, below issue was seen:
When all 32 interfaces(sonic interfaces and linux interface) are set to 9100 mtu, DMA error is seen "DMA: Out of SW-IOMMU space for 4096 bytes at device 0000:06:03.0" which can be fixed by updating swiotlb=65536 in /host/grub/grub.cfg .In order to keep multi-asic VS lighter and easier to bring up and test, new hwsku 'msft_four_asic_vs' is added to represent 4-asic hwsku with 2 frontend asics and 2 backend asics and each asic having 8 interfaces interconnected by port-channels.
- How I did it
Add msft_four_asic_hwsku directory to have the right number of directories (4) and update port_config.ini and lanemap.ini files to include 8 ports information.
Add topology.sh script to create the internal asic-asic connectivity.
- How to verify it
Update asic.conf with the 4 asic information as below and build sonic-vs.img:
NUM_ASIC=4
DEV_ID_ASIC_0=0
DEV_ID_ASIC_1=1
DEV_ID_ASIC_2=2
DEV_ID_ASIC_3=3
Modify sonic_multiasic.xml to have 8 front panel interfaces.
create virtual switch using "sudo virsh sonic_mutliasic.xml" command.
Start topology service and Load config_db files for switch and each asic.
Ensure that that all internal interfaces and port_channels are coming up.
multi-asic vs testbed:
Bring up mutli-asic VS testbed with a multi-asic image(asic.conf updated to 4 asics) and using t1-lag topology.
./testbed-cli.sh -t vtestbed.csv -m veos_vtb -k ceos add-topo vms-kvm-four-asic-t1-lag password.txt
Load minigraph/config_dbs.
Ensure all internal and external interfaces come up.
No change on single asic vs.
2021-02-23 13:36:26 -08:00
Volodymyr Boiko
8ec75803a7
[barefoot][device][platform] Moved pcie.yaml (#6862)
To fix #6860

Signed-off-by: Volodymyr Boyko <volodymyrx.boiko@intel.com>
2021-02-23 13:16:42 -08:00
dflynn-Nokia
cbe7493b8e
[Nokia ixs7215] Platform API 2.0 improvements (#6787)
- Improve sonic-mgmt platform test suite pass rate
- Improve coverage of platform unit tests
- Provide platform specific reboot logic as per platform porting guide
- Fix bug due to pcie.yaml file being located in the wrong directory
2021-02-23 09:25:14 -08:00
Aravind Mani
3aee87d6dc
Dell S6000,S6100 system health changes (#6788)
Needed support for platform system health in Dell platforms
2021-02-22 23:26:59 -08:00
Sujin Kang
d5238ae8dd
[pcie.yaml] Move pcie configuration file path to platform directory (#6475)
- Why I did it
The pcie configuration file location is under plugin directory not under platform directory.
#6437

- How I did it

Move all pcie.yaml configuration file from plugin to platform directory.
Remove unnecessary timer to start pcie-check.service
Move pcie-check.service to sonic-host-services
- How to verify it
Verify on the device
2021-02-21 08:27:37 -08:00
Samuel Angebault
5fb374b03d
[Arista] Driver and platform update (#6468)
- Add support for `DCS-7050SX3-48YC8` and `DCS-7050SX3-48C8` platform
 - Add support for more variants of `DCS-7280CR3-32[PD]4`
 - Add Supervisor to Linecard consutil support
 - Complete Watchdog platform API support
 - Fix some PSU behavior on `DCS-7050QX-32` and `DCS-7060CX-32S`
 - Fix SEU management on `DCS-7060CX-32S`
 - Allow kernel modules to build up to linux 5.10
 - Rename led color `orange` to `amber`
 - Miscellaneous fixes
2021-02-19 10:48:52 -08:00
SuvarnaMeenakshi
5a49a0f499
[multi-asic][vs]: Update topology script to retrieve hwsku from minigraph (#6219)
Update topology script to retrieve hwsku from minigraph
if hwsku information is not available in config_db.
Fix clean up of interfaces in msft_multi_asic_vs hwsku
topology script.
- Why I did it
When bringing up multi-asic VS switch, topology service is started during boot up.
Topology service starts a shell script which runs the topology script present in /usr/share/sonic/device// directory. To invoke hwsku specific script, the topology script tries to retrieve hwsku information from config_db.
During initial boot up config_db might not be populated. In order to start topology service before config_db is updated,
update topology script to get hwsku information from minigraph.xml if it is available.
This will be helpful to bring up multi-asic VS testbed by loading minigraph and starting topology service.
- How I did it
Update topology.sh script to retrieve hwsku information from minigraph.xml.
Fix clean up function on msft_multi_asic_vs toplogy script.
- How to verify it
single-asic VS - no change; topology service is only enabled for multi-asic VS.
multi-asic VS - Bring up multi-asic VS image, copy minigraph to vs image, start topology service. Topology service should be successful.
to test clean up function fix, start topology service - make sure interfaces are created and moved to the right namespaces.
stop topology service - make sure namespace do not have any interface and all front end interfaces are present in default namespace.
2021-02-18 22:02:29 -08:00