e286869b24
- Why I did it 1. Update Mellanox HW-MGMT package to newer version V.7.0030.1011 2. Replace the SONiC PMON Thermal control algorithm with the one inside the HW-MGMT package on all Nvidia platforms 3. Support Spectrum-4 systems - How I did it 1. Update the HW-MGMT package version number and submodule pointer 2. Remove the thermal control algorithm implementation from Mellanox platform API 3. Revise the patch to HW-MGMT package which will disable HW-MGMT from running on SIMX 4. Update the downstream kernel patch list Signed-off-by: Kebo Liu <kebol@nvidia.com>
95 lines
3.7 KiB
Diff
95 lines
3.7 KiB
Diff
From 8cceb490410ba87b8f50ecbc5576f8eaab9f31bd Mon Sep 17 00:00:00 2001
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From: Shravan Kumar Ramani <shravankr@nvidia.com>
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Date: Tue, 31 Jan 2023 03:20:57 -0500
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Subject: [PATCH 11/12] UBUNTU: SAUCE: mlxbf-pmc: Bug fix for BlueField-3
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counter offsets
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X-NVConfidentiality: public
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BugLink: https://bugs.launchpad.net/bugs/2004235
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The performance counter modules inside each HW block are not
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identical and are dependent on the number of counters present
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in each case. Hence the offsets for the control and data regs
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should be calculated accordingly.
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Signed-off-by: Shravan Kumar Ramani <shravankr@nvidia.com>
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Acked-by: Tim Gardner <tim.gardner@canonical.com>
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Acked-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
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Signed-off-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
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---
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drivers/platform/mellanox/mlxbf-pmc.c | 12 +++++++-----
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drivers/platform/mellanox/mlxbf-pmc.h | 4 ++--
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2 files changed, 9 insertions(+), 7 deletions(-)
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diff --git a/drivers/platform/mellanox/mlxbf-pmc.c b/drivers/platform/mellanox/mlxbf-pmc.c
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index 285b7433e..9be5a2d68 100644
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--- a/drivers/platform/mellanox/mlxbf-pmc.c
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+++ b/drivers/platform/mellanox/mlxbf-pmc.c
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@@ -427,7 +427,8 @@ int mlxbf_clear_crspace_counter(int blk_num, uint32_t cnt_num)
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{
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void *addr;
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- addr = pmc->block[blk_num].mmio_base + MLXBF_CRSPACE_PERFMON_VAL0 +
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+ addr = pmc->block[blk_num].mmio_base +
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+ MLXBF_CRSPACE_PERFMON_VAL0(pmc->block[blk_num].counters) +
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(cnt_num * 4);
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return mlxbf_pmc_writel(0x0, addr);
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@@ -532,7 +533,8 @@ int mlxbf_read_crspace_counter(int blk_num, uint32_t cnt_num, uint64_t *result)
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int status = 0;
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status = mlxbf_pmc_readl(&value, pmc->block[blk_num].mmio_base +
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- MLXBF_CRSPACE_PERFMON_VAL0 + (cnt_num * 4));
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+ MLXBF_CRSPACE_PERFMON_VAL0(pmc->block[blk_num].counters) +
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+ (cnt_num * 4));
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if (status)
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return status;
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@@ -935,7 +937,7 @@ static ssize_t mlxbf_show_counter_state(struct kobject *ko,
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if (pmc->block[blk_num].type == MLXBF_PERFTYPE_CRSPACE) {
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err = mlxbf_pmc_readl(&word, pmc->block[blk_num].mmio_base +
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- MLXBF_CRSPACE_PERFMON_CTL);
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+ MLXBF_CRSPACE_PERFMON_CTL(pmc->block[blk_num].counters));
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if (err)
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return -EINVAL;
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value = FIELD_GET(MLXBF_CRSPACE_PERFMON_EN, word);
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@@ -967,7 +969,7 @@ static ssize_t mlxbf_enable_counters(struct kobject *ko,
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return err;
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if (pmc->block[blk_num].type == MLXBF_PERFTYPE_CRSPACE) {
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err = mlxbf_pmc_readl(&word, pmc->block[blk_num].mmio_base +
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- MLXBF_CRSPACE_PERFMON_CTL);
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+ MLXBF_CRSPACE_PERFMON_CTL(pmc->block[blk_num].counters));
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if (err)
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return -EINVAL;
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word &= ~MLXBF_CRSPACE_PERFMON_EN;
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@@ -975,7 +977,7 @@ static ssize_t mlxbf_enable_counters(struct kobject *ko,
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if (en)
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word |= FIELD_PREP(MLXBF_CRSPACE_PERFMON_CLR, 1);
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mlxbf_pmc_writel(word, pmc->block[blk_num].mmio_base +
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- MLXBF_CRSPACE_PERFMON_CTL);
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+ MLXBF_CRSPACE_PERFMON_CTL(pmc->block[blk_num].counters));
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} else {
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if (en == 0) {
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err = mlxbf_config_l3_counters(blk_num, false, false);
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diff --git a/drivers/platform/mellanox/mlxbf-pmc.h b/drivers/platform/mellanox/mlxbf-pmc.h
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index fe2516616..2ee7efc3b 100644
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--- a/drivers/platform/mellanox/mlxbf-pmc.h
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+++ b/drivers/platform/mellanox/mlxbf-pmc.h
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@@ -152,10 +152,10 @@ struct mlxbf_pmc_context {
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#define MLXBF_CRSPACE_PERFMON_REG0 0x0
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#define MLXBF_CRSPACE_PERFSEL0 GENMASK(23, 16)
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#define MLXBF_CRSPACE_PERFSEL1 GENMASK(7, 0)
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-#define MLXBF_CRSPACE_PERFMON_CTL 0x40
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+#define MLXBF_CRSPACE_PERFMON_CTL(n) (n * 2)
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#define MLXBF_CRSPACE_PERFMON_EN BIT(30)
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#define MLXBF_CRSPACE_PERFMON_CLR BIT(28)
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-#define MLXBF_CRSPACE_PERFMON_VAL0 0x4c
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+#define MLXBF_CRSPACE_PERFMON_VAL0(n) (MLXBF_CRSPACE_PERFMON_CTL(n) + 0xc)
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struct mlxbf_pmc_events {
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uint32_t evt_num;
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--
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2.14.1
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