659 lines
18 KiB
C
659 lines
18 KiB
C
/*
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* at24.c - handle most I2C EEPROMs
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*
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* Copyright (C) 2005-2007 David Brownell
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* Copyright (C) 2008 Wolfram Sang, Pengutronix
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/mutex.h>
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#include <linux/sysfs.h>
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#include <linux/mod_devicetable.h>
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#include <linux/log2.h>
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#include <linux/bitops.h>
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#include <linux/jiffies.h>
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#include <linux/of.h>
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#include <linux/i2c.h>
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#include <linux/platform_data/at24.h>
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/*
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* I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
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* Differences between different vendor product lines (like Atmel AT24C or
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* MicroChip 24LC, etc) won't much matter for typical read/write access.
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* There are also I2C RAM chips, likewise interchangeable. One example
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* would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
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*
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* However, misconfiguration can lose data. "Set 16-bit memory address"
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* to a part with 8-bit addressing will overwrite data. Writing with too
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* big a page size also loses data. And it's not safe to assume that the
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* conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
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* uses 0x51, for just one example.
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*
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* Accordingly, explicit board-specific configuration data should be used
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* in almost all cases. (One partial exception is an SMBus used to access
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* "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
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*
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* So this driver uses "new style" I2C driver binding, expecting to be
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* told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
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* similar kernel-resident tables; or, configuration data coming from
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* a bootloader.
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*
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* Other than binding model, current differences from "eeprom" driver are
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* that this one handles write access and isn't restricted to 24c02 devices.
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* It also handles larger devices (32 kbit and up) with two-byte addresses,
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* which won't work on pure SMBus systems.
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*/
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struct at24_data {
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struct at24_platform_data chip;
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struct memory_accessor macc;
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int use_smbus;
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/*
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* Lock protects against activities from other Linux tasks,
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* but not from changes by other I2C masters.
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*/
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struct mutex lock;
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struct bin_attribute bin;
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u8 *writebuf;
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unsigned write_max;
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unsigned num_addresses;
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/*
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* Some chips tie up multiple I2C addresses; dummy devices reserve
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* them for us, and we'll use them with SMBus calls.
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*/
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struct i2c_client *client[];
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};
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/*
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* This parameter is to help this driver avoid blocking other drivers out
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* of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
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* clock, one 256 byte read takes about 1/43 second which is excessive;
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* but the 1/170 second it takes at 400 kHz may be quite reasonable; and
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* at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
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*
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* This value is forced to be a power of two so that writes align on pages.
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*/
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static unsigned io_limit = 128;
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module_param(io_limit, uint, 0);
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MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)");
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/*
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* Specs often allow 5 msec for a page write, sometimes 20 msec;
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* it's important to recover from write timeouts.
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*/
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static unsigned write_timeout = 25;
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module_param(write_timeout, uint, 0);
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MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)");
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#define AT24_SIZE_BYTELEN 5
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#define AT24_SIZE_FLAGS 8
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#define AT24_BITMASK(x) (BIT(x) - 1)
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/* create non-zero magic value for given eeprom parameters */
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#define AT24_DEVICE_MAGIC(_len, _flags) \
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((1 << AT24_SIZE_FLAGS | (_flags)) \
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<< AT24_SIZE_BYTELEN | ilog2(_len))
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static const struct i2c_device_id at24_ctc_ids[] = {
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{ "24c64-ctc", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16 | AT24_FLAG_READONLY | AT24_FLAG_IRUGO) },
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{ /* END OF LIST */ }
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};
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MODULE_DEVICE_TABLE(i2c, at24_ctc_ids);
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/*-------------------------------------------------------------------------*/
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/*
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* This routine supports chips which consume multiple I2C addresses. It
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* computes the addressing information to be used for a given r/w request.
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* Assumes that sanity checks for offset happened at sysfs-layer.
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*/
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static struct i2c_client *at24_translate_offset(struct at24_data *at24,
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unsigned *offset)
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{
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unsigned i;
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if (at24->chip.flags & AT24_FLAG_ADDR16) {
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i = *offset >> 16;
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*offset &= 0xffff;
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} else {
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i = *offset >> 8;
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*offset &= 0xff;
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}
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return at24->client[i];
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}
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static ssize_t at24_eeprom_read(struct at24_data *at24, char *buf,
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unsigned offset, size_t count)
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{
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struct i2c_msg msg[2];
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struct i2c_client *client;
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unsigned long timeout, read_time;
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int status;
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memset(msg, 0, sizeof(msg));
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/*
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* REVISIT some multi-address chips don't rollover page reads to
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* the next slave address, so we may need to truncate the count.
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* Those chips might need another quirk flag.
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*
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* If the real hardware used four adjacent 24c02 chips and that
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* were misconfigured as one 24c08, that would be a similar effect:
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* one "eeprom" file not four, but larger reads would fail when
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* they crossed certain pages.
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*/
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/*
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* Slave address and byte offset derive from the offset. Always
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* set the byte address; on a multi-master board, another master
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* may have changed the chip's "current" address pointer.
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*/
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client = at24_translate_offset(at24, &offset);
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if (count > io_limit)
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count = io_limit;
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count = 1;
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/*
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* Reads fail if the previous write didn't complete yet. We may
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* loop a few times until this one succeeds, waiting at least
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* long enough for one entire page write to work.
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*/
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timeout = jiffies + msecs_to_jiffies(write_timeout);
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do {
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read_time = jiffies;
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status = i2c_smbus_write_byte_data(client, (offset >> 8) & 0x0ff, offset & 0x0ff );
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status = i2c_smbus_read_byte(client);
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if (status >= 0) {
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buf[0] = status;
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status = count;
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}
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dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
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count, offset, status, jiffies);
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if (status == count)
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return count;
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/* REVISIT: at HZ=100, this is sloooow */
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msleep(1);
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} while (time_before(read_time, timeout));
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return -ETIMEDOUT;
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}
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static ssize_t at24_read(struct at24_data *at24,
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char *buf, loff_t off, size_t count)
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{
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ssize_t retval = 0;
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if (unlikely(!count))
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return count;
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memset(buf, 0, count);
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/*
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* Read data from chip, protecting against concurrent updates
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* from this host, but not from other I2C masters.
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*/
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mutex_lock(&at24->lock);
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while (count) {
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ssize_t status;
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status = at24_eeprom_read(at24, buf, off, count);
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if (status <= 0) {
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if (retval == 0)
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retval = status;
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break;
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}
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buf += status;
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off += status;
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count -= status;
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retval += status;
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}
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//printk(KERN_ALERT "at24_read buf = %s, retval = %zu\n", buf, retval);
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mutex_unlock(&at24->lock);
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return retval;
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}
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static ssize_t at24_bin_read(struct file *filp, struct kobject *kobj,
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struct bin_attribute *attr,
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char *buf, loff_t off, size_t count)
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{
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struct at24_data *at24;
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at24 = dev_get_drvdata(container_of(kobj, struct device, kobj));
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return at24_read(at24, buf, off, count);
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}
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/*
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* Note that if the hardware write-protect pin is pulled high, the whole
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* chip is normally write protected. But there are plenty of product
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* variants here, including OTP fuses and partial chip protect.
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*
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* We only use page mode writes; the alternative is sloooow. This routine
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* writes at most one page.
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*/
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static ssize_t at24_eeprom_write(struct at24_data *at24, const char *buf,
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unsigned offset, size_t count)
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{
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struct i2c_client *client;
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ssize_t status;
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unsigned long timeout, write_time;
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unsigned next_page;
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/* Get corresponding I2C address and adjust offset */
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client = at24_translate_offset(at24, &offset);
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/* write_max is at most a page */
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if (count > at24->write_max)
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count = at24->write_max;
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/* Never roll over backwards, to the start of this page */
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next_page = roundup(offset + 1, at24->chip.page_size);
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if (offset + count > next_page)
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count = next_page - offset;
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/*
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* Writes fail if the previous one didn't complete yet. We may
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* loop a few times until this one succeeds, waiting at least
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* long enough for one entire page write to work.
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*/
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timeout = jiffies + msecs_to_jiffies(write_timeout);
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do {
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write_time = jiffies;
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status = i2c_smbus_write_word_data(client,
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(offset >> 8) & 0x0ff, (offset & 0xFF) | buf[0]);
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if (status == 0)
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status = count;
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dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
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count, offset, status, jiffies);
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if (status == count)
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return count;
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/* REVISIT: at HZ=100, this is sloooow */
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msleep(1);
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} while (time_before(write_time, timeout));
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return -ETIMEDOUT;
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}
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static ssize_t at24_write(struct at24_data *at24, const char *buf, loff_t off,
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size_t count)
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{
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ssize_t retval = 0;
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if (unlikely(!count))
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return count;
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/*
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* Write data to chip, protecting against concurrent updates
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* from this host, but not from other I2C masters.
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*/
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mutex_lock(&at24->lock);
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while (count) {
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ssize_t status;
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status = at24_eeprom_write(at24, buf, off, 1); /* only one-byte to write; TODO page wirte */
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if (status <= 0) {
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if (retval == 0)
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retval = status;
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break;
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}
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buf += status;
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off += status;
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count -= status;
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retval += status;
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}
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mutex_unlock(&at24->lock);
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return retval;
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}
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static ssize_t at24_bin_write(struct file *filp, struct kobject *kobj,
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struct bin_attribute *attr,
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char *buf, loff_t off, size_t count)
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{
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struct at24_data *at24;
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if (unlikely(off >= attr->size))
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return -EFBIG;
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at24 = dev_get_drvdata(container_of(kobj, struct device, kobj));
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return at24_write(at24, buf, off, count);
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}
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/*-------------------------------------------------------------------------*/
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/*
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* This lets other kernel code access the eeprom data. For example, it
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* might hold a board's Ethernet address, or board-specific calibration
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* data generated on the manufacturing floor.
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*/
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static ssize_t at24_macc_read(struct memory_accessor *macc, char *buf,
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off_t offset, size_t count)
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{
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struct at24_data *at24 = container_of(macc, struct at24_data, macc);
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return at24_read(at24, buf, offset, count);
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}
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static ssize_t at24_macc_write(struct memory_accessor *macc, const char *buf,
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off_t offset, size_t count)
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{
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struct at24_data *at24 = container_of(macc, struct at24_data, macc);
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return at24_write(at24, buf, offset, count);
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}
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/*-------------------------------------------------------------------------*/
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#ifdef CONFIG_OF
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static void at24_get_ofdata(struct i2c_client *client,
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struct at24_platform_data *chip)
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{
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const __be32 *val;
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struct device_node *node = client->dev.of_node;
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if (node) {
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if (of_get_property(node, "read-only", NULL))
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chip->flags |= AT24_FLAG_READONLY;
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val = of_get_property(node, "pagesize", NULL);
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if (val)
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chip->page_size = be32_to_cpup(val);
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}
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}
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#else
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static void at24_get_ofdata(struct i2c_client *client,
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struct at24_platform_data *chip)
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{ }
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#endif /* CONFIG_OF */
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static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id)
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{
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struct at24_platform_data chip;
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bool writable;
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int use_smbus = 0;
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struct at24_data *at24;
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int err;
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unsigned i, num_addresses;
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kernel_ulong_t magic;
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if (client->dev.platform_data) {
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chip = *(struct at24_platform_data *)client->dev.platform_data;
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} else {
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if (!id->driver_data)
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return -ENODEV;
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magic = id->driver_data;
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chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN));
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magic >>= AT24_SIZE_BYTELEN;
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chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS);
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/*
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* This is slow, but we can't know all eeproms, so we better
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* play safe. Specifying custom eeprom-types via platform_data
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* is recommended anyhow.
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*/
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chip.page_size = 1;
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/* update chipdata if OF is present */
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at24_get_ofdata(client, &chip);
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printk(KERN_ALERT "at24_probe chip.byte_len = 0x%x\n", chip.byte_len);
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printk(KERN_ALERT "at24_probe chip.flags = 0x%x\n", chip.flags);
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printk(KERN_ALERT "at24_probe chip.magic = 0x%lx\n", id->driver_data);
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chip.setup = NULL;
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chip.context = NULL;
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}
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if (!is_power_of_2(chip.byte_len))
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dev_warn(&client->dev,
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"byte_len looks suspicious (no power of 2)!\n");
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if (!chip.page_size) {
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dev_err(&client->dev, "page_size must not be 0!\n");
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return -EINVAL;
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}
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if (!is_power_of_2(chip.page_size))
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dev_warn(&client->dev,
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"page_size looks suspicious (no power of 2)!\n");
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/* Use I2C operations unless we're stuck with SMBus extensions. */
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if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
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if (i2c_check_functionality(client->adapter,
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I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
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use_smbus = I2C_SMBUS_I2C_BLOCK_DATA;
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} else if (i2c_check_functionality(client->adapter,
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I2C_FUNC_SMBUS_READ_WORD_DATA)) {
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use_smbus = I2C_SMBUS_WORD_DATA;
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} else if (i2c_check_functionality(client->adapter,
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I2C_FUNC_SMBUS_READ_BYTE_DATA)) {
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use_smbus = I2C_SMBUS_BYTE_DATA;
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} else {
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return -EPFNOSUPPORT;
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}
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use_smbus = I2C_SMBUS_BYTE_DATA;
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printk(KERN_ALERT "at24_probe use_smbus --> %d\n",
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use_smbus);
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}
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if (chip.flags & AT24_FLAG_TAKE8ADDR)
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num_addresses = 8;
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else
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num_addresses = DIV_ROUND_UP(chip.byte_len,
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(chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256);
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at24 = devm_kzalloc(&client->dev, sizeof(struct at24_data) +
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num_addresses * sizeof(struct i2c_client *), GFP_KERNEL);
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if (!at24)
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return -ENOMEM;
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mutex_init(&at24->lock);
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at24->use_smbus = use_smbus;
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at24->chip = chip;
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at24->num_addresses = num_addresses;
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/*
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* Export the EEPROM bytes through sysfs, since that's convenient.
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* By default, only root should see the data (maybe passwords etc)
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*/
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sysfs_bin_attr_init(&at24->bin);
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at24->bin.attr.name = "eeprom";
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at24->bin.attr.mode = chip.flags & AT24_FLAG_IRUGO ? S_IRUGO : S_IRUSR;
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at24->bin.read = at24_bin_read;
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at24->bin.size = chip.byte_len;
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at24->macc.read = at24_macc_read;
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writable = !(chip.flags & AT24_FLAG_READONLY);
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if (writable) {
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if (!use_smbus || i2c_check_functionality(client->adapter,
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I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) {
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unsigned write_max = chip.page_size;
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at24->macc.write = at24_macc_write;
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at24->bin.write = at24_bin_write;
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|
at24->bin.attr.mode |= S_IWUSR;
|
|
|
|
if (write_max > io_limit)
|
|
write_max = io_limit;
|
|
if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX)
|
|
write_max = I2C_SMBUS_BLOCK_MAX;
|
|
at24->write_max = write_max;
|
|
|
|
/* buffer (data + address at the beginning) */
|
|
at24->writebuf = devm_kzalloc(&client->dev,
|
|
write_max + 2, GFP_KERNEL);
|
|
if (!at24->writebuf)
|
|
return -ENOMEM;
|
|
} else {
|
|
dev_warn(&client->dev,
|
|
"cannot write due to controller restrictions.");
|
|
}
|
|
}
|
|
|
|
at24->client[0] = client;
|
|
|
|
/* use dummy devices for multiple-address chips */
|
|
for (i = 1; i < num_addresses; i++) {
|
|
at24->client[i] = i2c_new_dummy(client->adapter,
|
|
client->addr + i);
|
|
if (!at24->client[i]) {
|
|
dev_err(&client->dev, "address 0x%02x unavailable\n",
|
|
client->addr + i);
|
|
err = -EADDRINUSE;
|
|
goto err_clients;
|
|
}
|
|
}
|
|
|
|
err = sysfs_create_bin_file(&client->dev.kobj, &at24->bin);
|
|
if (err)
|
|
goto err_clients;
|
|
|
|
i2c_set_clientdata(client, at24);
|
|
|
|
dev_info(&client->dev, "%zu byte %s EEPROM, %s, %u bytes/write\n",
|
|
at24->bin.size, client->name,
|
|
writable ? "writable" : "read-only", at24->write_max);
|
|
if (use_smbus == I2C_SMBUS_WORD_DATA ||
|
|
use_smbus == I2C_SMBUS_BYTE_DATA) {
|
|
dev_notice(&client->dev, "Falling back to %s reads, "
|
|
"performance will suffer\n", use_smbus ==
|
|
I2C_SMBUS_WORD_DATA ? "word" : "byte");
|
|
}
|
|
|
|
/* export data to kernel code */
|
|
if (chip.setup)
|
|
chip.setup(&at24->macc, chip.context);
|
|
|
|
return 0;
|
|
|
|
err_clients:
|
|
for (i = 1; i < num_addresses; i++)
|
|
if (at24->client[i])
|
|
i2c_unregister_device(at24->client[i]);
|
|
|
|
return err;
|
|
}
|
|
|
|
static int at24_remove(struct i2c_client *client)
|
|
{
|
|
struct at24_data *at24;
|
|
int i;
|
|
|
|
at24 = i2c_get_clientdata(client);
|
|
sysfs_remove_bin_file(&client->dev.kobj, &at24->bin);
|
|
|
|
for (i = 1; i < at24->num_addresses; i++)
|
|
i2c_unregister_device(at24->client[i]);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
static struct i2c_board_info i2c_devs = {
|
|
I2C_BOARD_INFO("24c64-ctc", 0x57),
|
|
};
|
|
|
|
static struct i2c_adapter *adapter = NULL;
|
|
static struct i2c_client *client = NULL;
|
|
|
|
static int ctc_at24c64_init(void)
|
|
{
|
|
printk(KERN_ALERT "ctc_at24c64_init\n");
|
|
|
|
adapter = i2c_get_adapter(0);
|
|
if(adapter == NULL){
|
|
printk(KERN_ALERT "i2c_get_adapter == NULL\n");
|
|
return -1;
|
|
}
|
|
|
|
client = i2c_new_device(adapter, &i2c_devs);
|
|
if(client == NULL){
|
|
printk(KERN_ALERT "i2c_new_device == NULL\n");
|
|
i2c_put_adapter(adapter);
|
|
adapter = NULL;
|
|
return -1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void ctc_at24c64_exit(void)
|
|
{
|
|
printk(KERN_ALERT "ctc_at24c64_exit\n");
|
|
if(client){
|
|
i2c_unregister_device(client);
|
|
}
|
|
if(adapter){
|
|
i2c_put_adapter(adapter);
|
|
}
|
|
}
|
|
|
|
static struct i2c_driver at24_ctc_driver = {
|
|
.driver = {
|
|
.name = "at24-ctc",
|
|
.owner = THIS_MODULE,
|
|
},
|
|
.probe = at24_probe,
|
|
.remove = at24_remove,
|
|
.id_table = at24_ctc_ids,
|
|
};
|
|
|
|
static int __init at24_ctc_init(void)
|
|
{
|
|
if (!io_limit) {
|
|
pr_err("at24_ctc: io_limit must not be 0!\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
io_limit = rounddown_pow_of_two(io_limit);
|
|
|
|
ctc_at24c64_init();
|
|
|
|
return i2c_add_driver(&at24_ctc_driver);
|
|
}
|
|
module_init(at24_ctc_init);
|
|
|
|
static void __exit at24_ctc_exit(void)
|
|
{
|
|
ctc_at24c64_exit();
|
|
i2c_del_driver(&at24_ctc_driver);
|
|
}
|
|
module_exit(at24_ctc_exit);
|
|
|
|
MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
|
|
MODULE_AUTHOR("David Brownell and Wolfram Sang");
|
|
MODULE_LICENSE("GPL");
|
|
/* XXX */
|