4458efbd71
* Switch Vendor: DellEMC * Switch SKU: z9332F * ASIC Vendor: Broadcom * Swich ASIC: tomahawk3 * Port Configuration: 32x400G * SONiC Image: sonic-broadcom.bin * Changes Include ipmitool implementation for platform_sensors script is inclued in pmon startup
308 lines
8.2 KiB
Python
308 lines
8.2 KiB
Python
# sfputil.py
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#
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# Platform-specific SFP transceiver interface for SONiC
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#
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try:
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import struct
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import sys
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import getopt
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import time
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import select
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from sonic_sfp.sfputilbase import SfpUtilBase
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from os import *
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from mmap import *
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except ImportError as e:
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raise ImportError("%s - required module not found" % str(e))
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#from xcvrd
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SFP_STATUS_REMOVED = '0'
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SFP_STATUS_INSERTED = '1'
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class SfpUtil(SfpUtilBase):
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"""Platform-specific SfpUtil class"""
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PORT_START = 1
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PORT_END = 34
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PORTS_IN_BLOCK = 34
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BASE_RES_PATH = "/sys/bus/pci/devices/0000:09:00.0/resource0"
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_port_to_i2c_mapping = {
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1: 10,
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2: 11,
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3: 12,
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4: 13,
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5: 14,
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6: 15,
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7: 16,
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8: 17,
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9: 18,
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10: 19,
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11: 20,
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12: 21,
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13: 22,
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14: 23,
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15: 24,
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16: 25,
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17: 26,
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18: 27,
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19: 28,
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20: 29,
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21: 30,
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22: 31,
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23: 32,
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24: 33,
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25: 34,
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26: 35,
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27: 36,
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28: 37,
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29: 38,
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30: 39,
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31: 40,
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32: 41,
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33: 1,
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34: 2,
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}
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_port_to_eeprom_mapping = {}
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_global_port_pres_dict = {}
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@property
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def port_start(self):
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return self.PORT_START
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@property
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def port_end(self):
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return self.PORT_END
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@property
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def qsfp_ports(self):
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return range(self.PORT_START, self.PORTS_IN_BLOCK + 1)
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@property
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def port_to_eeprom_mapping(self):
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return self._port_to_eeprom_mapping
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def pci_mem_read(self, mm, offset):
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mm.seek(offset)
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read_data_stream = mm.read(4)
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reg_val = struct.unpack('I', read_data_stream)
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mem_val = str(reg_val)[1:-2]
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# print "reg_val read:%x"%reg_val
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return mem_val
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def pci_mem_write(self, mm, offset, data):
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mm.seek(offset)
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# print "data to write:%x"%data
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mm.write(struct.pack('I', data))
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def pci_set_value(self, resource, val, offset):
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fd = open(resource, O_RDWR)
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mm = mmap(fd, 0)
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val = self.pci_mem_write(mm, offset, val)
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mm.close()
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close(fd)
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return val
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def pci_get_value(self, resource, offset):
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fd = open(resource, O_RDWR)
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mm = mmap(fd, 0)
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val = self.pci_mem_read(mm, offset)
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mm.close()
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close(fd)
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return val
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def init_global_port_presence(self):
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for port_num in range(self.port_start, (self.port_end + 1)):
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presence = self.get_presence(port_num)
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if(presence):
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self._global_port_pres_dict[port_num] = '1'
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else:
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self._global_port_pres_dict[port_num] = '0'
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def mod_pres(self):
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port_pres_mask =0
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for port_num in range(self.port_start, (self.port_end + 1)):
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presence = self.get_presence(port_num)
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if(presence):
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self._global_port_pres_dict[port_num] = '1'
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port_val = (1 << (port_num -1))
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port_pres_mask = (port_pres_mask | port_val)
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else:
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self._global_port_pres_dict[port_num] = '0'
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port_val = ~(1 << (port_num -1))
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port_pres_mask = (port_pres_mask & port_val)
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return port_pres_mask
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def __init__(self):
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eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom"
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for x in range(self.port_start, self.port_end + 1):
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self.port_to_eeprom_mapping[x] = eeprom_path.format(
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self._port_to_i2c_mapping[x])
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self.init_global_port_presence()
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SfpUtilBase.__init__(self)
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def get_presence(self, port_num):
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# Check for invalid port_num
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if port_num < self.port_start or port_num > self.port_end:
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return False
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# Port offset starts with 0x4004
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port_offset = 16388 + ((port_num-1) * 16)
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status = self.pci_get_value(self.BASE_RES_PATH, port_offset)
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reg_value = int(status)
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# Absence of status throws error
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if (reg_value == ""):
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return False
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# Mask off 4th bit for presence
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mask = (1 << 4)
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# Mask off 1st bit for presence 33,34
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if (port_num > 32):
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mask = (1 << 0)
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# ModPrsL is active low
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if reg_value & mask == 0:
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return True
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return False
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def get_low_power_mode(self, port_num):
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# Check for invalid port_num
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if port_num < self.port_start or port_num > self.port_end:
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return False
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# Port offset starts with 0x4000
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port_offset = 16384 + ((port_num-1) * 16)
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status = self.pci_get_value(self.BASE_RES_PATH, port_offset)
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reg_value = int(status)
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# Absence of status throws error
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if (reg_value == ""):
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return False
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# Mask off 4th bit for presence
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mask = (1 << 6)
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# LPMode is active high
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if reg_value & mask == 0:
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return False
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return True
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def set_low_power_mode(self, port_num, lpmode):
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# Check for invalid port_num
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if port_num < self.port_start or port_num > self.port_end:
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return False
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# Port offset starts with 0x4000
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port_offset = 16384 + ((port_num-1) * 16)
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status = self.pci_get_value(self.BASE_RES_PATH, port_offset)
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reg_value = int(status)
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# Absence of status throws error
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if (reg_value == ""):
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return False
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# Mask off 4th bit for presence
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mask = (1 << 6)
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# LPMode is active high; set or clear the bit accordingly
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if lpmode is True:
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reg_value = reg_value | mask
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else:
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reg_value = reg_value & ~mask
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# Convert our register value back to a hex string and write back
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status = self.pci_set_value(self.BASE_RES_PATH, reg_value, port_offset)
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return True
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def reset(self, port_num):
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# Check for invalid port_num
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if port_num < self.port_start or port_num > self.port_end:
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return False
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# Port offset starts with 0x4000
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port_offset = 16384 + ((port_num-1) * 16)
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status = self.pci_get_value(self.BASE_RES_PATH, port_offset)
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reg_value = int(status)
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# Absence of status throws error
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if (reg_value == ""):
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return False
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# Mask off 4th bit for presence
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mask = (1 << 6)
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# ResetL is active low
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reg_value = reg_value & ~mask
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# Convert our register value back to a hex string and write back
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status = self.pci_set_value(self.BASE_RES_PATH, reg_value, port_offset)
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# Sleep 1 second to allow it to settle
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time.sleep(1)
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reg_value = reg_value | mask
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# Convert our register value back to a hex string and write back
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status = self.pci_set_value(self.BASE_RES_PATH, reg_value, port_offset)
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return True
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def get_register(self, reg_file):
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retval = 'ERR'
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if (not path.isfile(reg_file)):
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print reg_file, 'not found !'
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return retval
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try:
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with fdopen(open(reg_file, O_RDONLY)) as fd:
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retval = fd.read()
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except Exception as error:
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logging.error("Unable to open ", reg_file, "file !")
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retval = retval.rstrip('\r\n')
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retval = retval.lstrip(" ")
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return retval
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def get_transceiver_change_event(self):
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port_dict = {}
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while True:
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for port_num in range(self.port_start, (self.port_end + 1)):
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presence = self.get_presence(port_num)
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if(presence and self._global_port_pres_dict[port_num] == '0'):
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self._global_port_pres_dict[port_num] = '1'
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port_dict[port_num] = '1'
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elif(not presence and
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self._global_port_pres_dict[port_num] == '1'):
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self._global_port_pres_dict[port_num] = '0'
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port_dict[port_num] = '0'
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if(len(port_dict) > 0):
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return True, port_dict
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time.sleep(0.5)
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