abccdaeb6c
* Adapt kernel 5.10 for broadcom on RA-B6510-48V4C Signed-off-by: pettershao-ragilenetworks <pettershao@ragilenetworks.com> * update Signed-off-by: pettershao-ragilenetworks <pettershao@ragilenetworks.com> * update Signed-off-by: pettershao-ragilenetworks <pettershao@ragilenetworks.com> * update Signed-off-by: pettershao-ragilenetworks <pettershao@ragilenetworks.com> * update Signed-off-by: pettershao-ragilenetworks <pettershao@ragilenetworks.com> * modify one-image.mk file Signed-off-by: pettershao-ragilenetworks <pettershao@ragilenetworks.com> * modify debian/rule.mk Signed-off-by: pettershao-ragilenetworks <pettershao@ragilenetworks.com> * Add platform.json file Signed-off-by: pettershao-ragilenetworks <pettershao@ragilenetworks.com> --------- Signed-off-by: pettershao-ragilenetworks <pettershao@ragilenetworks.com>
134 lines
3.5 KiB
C
134 lines
3.5 KiB
C
#ifndef _FPGA_I2C_H
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#define _FPGA_I2C_H
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#include <linux/i2c.h>
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#include <linux/device.h>
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#include <linux/kallsyms.h>
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#include <linux/string.h>
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#define mem_clear(data, size) memset((data), 0, (size))
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#if 0
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#define FPGA_I2C_EXT_9548_ADDR (0x00)
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#define FPGA_I2C_EXT_9548_CHAN (0x04)
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#define FPGA_I2C_DEV_SLAVE_ADDR (0x08)
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#define FPGA_I2C_DEV_REG_ADDR (0x0C)
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#define FPGA_I2C_DEV_RDWR_LEN (0x10)
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#define FPGA_I2C_CTRL_REG (0x14)
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#define FPGA_I2C_STATUS_REG (0x18)
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#define FPGA_I2C_SCALE_REG (0x1C)
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#define FPGA_I2C_FILTER_REG (0x20)
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#define FPGA_I2C_STRETCH_REG (0x24)
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#define FPGA_I2C_EXT_9548_EXITS_FLAG (0x28)
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#define FPGA_I2C_INTERNAL_9548_CHAN (0x2C)
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#define FPGA_I2C_RDWR_DATA_BUF (0x80)
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#endif
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#define FPGA_I2C_RDWR_MAX_LEN_DEFAULT (128)
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#define I2C_REG_MAX_WIDTH (16)
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#define DEV_NAME_MAX_LEN (64)
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#define FPGA_I2C_MAX_TIMES (10)
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#define FPGA_I2C_XFER_TIME_OUT (100000)
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#define FPGA_I2C_SLEEP_TIME (40)
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typedef struct fpga_i2c_reg_s {
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uint32_t i2c_scale;
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uint32_t i2c_filter;
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uint32_t i2c_stretch;
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uint32_t i2c_ext_9548_exits_flag;
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uint32_t i2c_ext_9548_addr;
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uint32_t i2c_ext_9548_chan;
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uint32_t i2c_in_9548_chan;
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uint32_t i2c_slave;
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uint32_t i2c_reg;
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uint32_t i2c_reg_len;
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uint32_t i2c_data_len;
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uint32_t i2c_ctrl;
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uint32_t i2c_status;
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uint32_t i2c_err_vec;
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uint32_t i2c_data_buf;
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uint32_t i2c_data_buf_len;
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} fpga_i2c_reg_t;
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typedef struct fpga_i2c_reset_cfg_s {
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uint32_t i2c_adap_reset_flag;
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uint32_t reset_addr;
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uint32_t reset_on;
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uint32_t reset_off;
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uint32_t reset_delay_b;
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uint32_t reset_delay;
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uint32_t reset_delay_a;
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} fpga_i2c_reset_cfg_t;
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typedef struct fpga_i2c_reg_addr_s {
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uint8_t reg_addr_len;
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uint8_t read_reg_addr[I2C_REG_MAX_WIDTH];
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} fpga_i2c_reg_addr_t;
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typedef struct fpga_i2c_dev_s {
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fpga_i2c_reg_t reg;
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fpga_i2c_reset_cfg_t reset_cfg;
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fpga_i2c_reg_addr_t i2c_addr_desc;
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const char *dev_name;
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uint32_t i2c_scale_value;
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uint32_t i2c_filter_value;
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uint32_t i2c_stretch_value;
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uint32_t i2c_timeout;
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uint32_t i2c_func_mode;
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wait_queue_head_t queue;
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struct i2c_adapter adap;
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int adap_nr;
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struct device *dev;
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bool i2c_params_check;
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} fpga_i2c_dev_t;
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typedef struct fpga_i2c_bus_device_s {
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int i2c_timeout;
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int i2c_scale;
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int i2c_filter;
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int i2c_stretch;
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int i2c_ext_9548_exits_flag;
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int i2c_ext_9548_addr;
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int i2c_ext_9548_chan;
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int i2c_in_9548_chan;
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int i2c_slave;
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int i2c_reg;
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int i2c_reg_len;
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int i2c_data_len;
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int i2c_ctrl;
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int i2c_status;
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int i2c_err_vec;
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int i2c_data_buf;
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int i2c_data_buf_len;
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char dev_name[DEV_NAME_MAX_LEN];
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int adap_nr;
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int i2c_scale_value;
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int i2c_filter_value;
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int i2c_stretch_value;
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int i2c_func_mode;
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int i2c_adap_reset_flag;
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int i2c_reset_addr;
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int i2c_reset_on;
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int i2c_reset_off;
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int i2c_rst_delay_b; /* delay time before reset(us) */
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int i2c_rst_delay; /* reset time(us) */
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int i2c_rst_delay_a; /* delay time after reset(us) */
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int device_flag;
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bool i2c_params_check;
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int i2c_data_buf_len_reg;
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int i2c_offset_reg;
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} fpga_i2c_bus_device_t;
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typedef struct fpga_pca954x_device_s {
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struct i2c_client *client;
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uint32_t i2c_bus;
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uint32_t i2c_addr;
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uint32_t fpga_9548_flag;
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uint32_t fpga_9548_reset_flag;
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uint32_t pca9548_base_nr;
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} fpga_pca954x_device_t;
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#endif /* _FPGA_I2C_H */
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