sonic-buildimage/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64
Stephen Sun fe6be5da92
[202012] Configure different map between uplink and downlink on t1 switch in dual ToR scenario (#11299)
- Why I did it
Configure different DSCP_TO_TC_MAP between uplink and downlink on T1 switch in dual ToR scenario
On T1 uplink, both DSCP 2/6 will be mapped to TC 1 for the purpose of avoiding such traffic occupying lossless buffers.
On T1 downlink, they will be mapped to TC 2/6 respectively. (unchanged)

- How I did it
For vendors who want to configure different DSCP_TO_TC_MAP between uplinks and downlinks on T1, they should
Define generate_dscp_to_tc_map macro in SKU's qos.json.j2 file
Define map AZURE for downlink and AZURE_UPLINK for uplink
Define jinja2 variable different_dscp_to_tc_map as True

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2022-07-03 15:58:06 +03:00
..
buffers_defaults_objects.j2 [Reclaim buffer][202012] Reclaim unused buffers by applying zero buffer profiles (#9063) 2021-12-09 17:34:56 +02:00
buffers_defaults_t0.j2 Fix typo and missing files in SN3800 and SN4600C's buffer templates (#9537) 2021-12-23 03:28:43 +00:00
buffers_defaults_t1.j2 [Mellanox][202012] Support Mellanox-SN4600C-C64 as T1 switch in dual-ToR scenario (#11032) 2022-06-21 10:04:49 -07:00
buffers_dynamic.json.j2 Adding new SKU Mellanox-SN4600C-C4 (#7815) 2021-06-21 09:55:43 +00:00
buffers.json.j2 Adding new SKU Mellanox-SN4600C-C4 (#7815) 2021-06-21 09:55:43 +00:00
pg_profile_lookup.ini Adding new SKU Mellanox-SN4600C-C4 (#7815) 2021-06-21 09:55:43 +00:00
port_config.ini Adding new SKU Mellanox-SN4600C-C4 (#7815) 2021-06-21 09:55:43 +00:00
qos.json.j2 [202012] Configure different map between uplink and downlink on t1 switch in dual ToR scenario (#11299) 2022-07-03 15:58:06 +03:00
sai_4600C.xml Adding new SKU Mellanox-SN4600C-C4 (#7815) 2021-06-21 09:55:43 +00:00
sai.profile [Mellanox] Update SKUs to enable SDK dumps (#7708) (#7978) 2021-06-27 10:05:14 +03:00