143 lines
4.2 KiB
C
143 lines
4.2 KiB
C
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#include "i2c-mei_io.h"
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/****** Parameter *****/
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#define HECI_READ_TIMEOUT 12500000 // 12.5sec
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#define HECI_SEND_TIMEOUT 12500000 // 12.5sec
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#define HECI_TIMEOUT_UNIT 10
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// HECI functions location
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#define HECI_BUS 0
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#define HECI_DEV 22
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#define HECI_FUN 0
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// HECI register
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#define HECI_REG_VENDORID 0x00
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#define HECI_REG_DEVICEID 0x02
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#define HECI_REG_COMMAND 0x04
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#define HECI_REG_REVID 0x08
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#define HECI_REG_MBAR 0x10
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#define HECI_REG_IRQ 0x3C
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#define HECI_REG_HIDM 0xA0
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#define HECI_REG_HFS 0x40
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#define HECI_REG_MISC_SHDW 0x44
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#define HECI_REG_GS_SHDW 0x48
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#define HECI_REG_H_GS 0x4C
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#define HECI_REG_GS_SHDW2 0x60
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#define HECI_REG_GS_SHDW3 0x64
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#define HECI_REG_GS_SHDW4 0x68
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#define HECI_REG_GS_SHDW5 0x6C
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#define HECI_REG_H_GS2 0x70
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#define HECI_REG_H_GS3 0x74
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#define HECI_REG_MEFS1 HECI_REG_HFS
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#define HECI_REG_MEFS2 HECI_REG_GS_SHDW
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#define HECI_MBAR_DEFAULT 0xFEDB0000
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// HECI Interrupt Delivery Mode to be set in HECI_REG_HIDM.
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#define HECI_HIDM_MSI 0
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#define HECI_HIDM_SCI 1
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#define HECI_HIDM_SMI 2
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#define HECI_HIDM_LAST HECI_HIDM_SMI
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// HECI command register bits
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#define HECI_CMD_BME 0x04 // Bus master enable
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#define HECI_CMD_MSE 0x02 // Memory space enable
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/****** Struct *****/
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typedef union
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{
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UINT32 DWord;
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struct
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{
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UINT32 MeAddress : 8, // Addressee on ME side
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HostAddress: 8, // Addressee on host siede, zero for BIOS
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Length : 9, // Number of bytes following the header
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Reserved : 6,
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MsgComplete: 1; // Whether this is last fragment of a message
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} Bits;
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} HECI_MSG_HEADER;
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// ME Firmware Status 1 register basics. offset:40h
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typedef union
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{
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UINT32 DWord;
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struct
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{
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UINT32 CurrentState : 4, // 0~3 Current ME firmware state
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Reserved_5 : 5, // 4~8
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InitComplete : 1, // 9 ME firmware finished initialization
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Reserved_10 : 2, // 10~11
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ErrorCode : 4, // 12~15 If set means fatal error
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OperatingMode: 4, // 16~19 Current ME operating mode
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Reserved_20 : 5, // 20~24
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MsgAckData : 3, // 25~27 MSG ACK Data specific for acknowledged BIOS message
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MsgAck : 4; // 28~31 Acknowledge for register based BIOS message
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} Bits;
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} HECI_MEFS1;
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typedef struct
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{
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UINT8 Bus; // PCI bus
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UINT8 Dev; // PCI device
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UINT8 Fun; // PCI function number
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UINTN PciCfg;
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UINT16 Vid; // Device ID
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UINT16 Did; // Vendor ID
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UINT8 Hidm; // interrupt mode
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UINT64 Mbar;
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UINT32 HMtu; // Max transfer unit configured by ME minus header
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UINT32 MeMtu; // Max transfer unit configured by ME minus header
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HECI_MEFS1 Mefs1; // ME Firmware Status at recent operation
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} HECI_DEVICE;
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/****** Function *****/
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/**
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* @param pThis Pointer to HECI device structure
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* @param pTimeout On input timeout in ms, on exit time left
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*/
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EFI_STATUS HeciInit ( HECI_DEVICE *pThis,
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UINT32 *pTimeout);
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/**
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* @param pThis Pointer to HECI device structure
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* @param pTimeout On input timeout in ms, on exit time left
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*/
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EFI_STATUS HecClearQue ( HECI_DEVICE *pThis,
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UINT32 *pTimeout);
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/**
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* @param pThis Pointer to HECI device structure
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* @param pTimeout On input timeout in ms, on exit time left
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* @param pMsgBuf Buffer for the received message
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* @param pBufLen On input buffer size, on exit message, in bytes
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*/
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EFI_STATUS HeciMsgRecv ( HECI_DEVICE *pThis,
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UINT32 *pTimeout,
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HECI_MSG_HEADER *pMsgBuf,
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UINT32 *pBufLen );
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/**
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* @param pThis Pointer to HECI device structure
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* @param pTimeout On input timeout in ms, on exit time left
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* @param pMessage The header of the message to send
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*/
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EFI_STATUS HeciMsgSend ( HECI_DEVICE *pThis,
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UINT32 *pTimeout,
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HECI_MSG_HEADER *pMessage);
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#define HeciPciReadMefs1() PciRead32(PCI_LIB_ADDRESS(HECI_BUS, HECI_DEV, HECI_FUN, HECI_REG_MEFS1)) |