410 lines
13 KiB
Python
410 lines
13 KiB
Python
# sfputil.py
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#
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# Platform-specific SFP transceiver interface for SONiC
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#
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try:
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import os
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import logging
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import time
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import select
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from sonic_sfp.sfputilbase import SfpUtilBase
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except ImportError as e:
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raise ImportError("%s - required module not found" % str(e))
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class SfpUtil(SfpUtilBase):
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"""Platform-specific SfpUtil class"""
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PORT_START = 0
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PORT_END = 31
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PORTS_IN_BLOCK = 32
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IOM_1_PORT_START = 0
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IOM_1_PORT_END = 11
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IOM_2_PORT_START = 12
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IOM_2_PORT_END = 21
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IOM_3_PORT_START = 22
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IOM_3_PORT_END = 31
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BASE_VAL_PATH = "/sys/class/i2c-adapter/i2c-{0}/{0}-003e/"
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_port_to_eeprom_mapping = {}
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_port_to_i2c_mapping = {
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0: [9, 18],
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1: [9, 19],
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2: [9, 20],
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3: [9, 21],
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4: [9, 22],
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5: [9, 23],
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6: [9, 24],
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7: [9, 25],
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8: [8, 26],
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9: [8, 27],
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10: [8, 28],
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11: [8, 29],
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12: [8, 31], # reordered
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13: [8, 30],
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14: [8, 33], # reordered
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15: [8, 32],
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16: [7, 34],
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17: [7, 35],
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18: [7, 36],
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19: [7, 37],
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20: [7, 38],
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21: [7, 39],
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22: [7, 40],
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23: [7, 41],
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24: [6, 42],
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25: [6, 43],
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26: [6, 44],
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27: [6, 45],
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28: [6, 46],
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29: [6, 47],
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30: [6, 48],
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31: [6, 49]
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}
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@property
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def port_start(self):
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return self.PORT_START
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@property
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def port_end(self):
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return self.PORT_END
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@property
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def qsfp_ports(self):
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return range(0, self.PORTS_IN_BLOCK + 1)
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@property
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def iom1_port_start(self):
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return self.IOM_1_PORT_START
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@property
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def iom1_port_end(self):
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return self.IOM_1_PORT_END
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@property
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def iom2_port_start(self):
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return self.IOM_2_PORT_START
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@property
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def iom2_port_end(self):
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return self.IOM_2_PORT_END
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@property
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def iom3_port_start(self):
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return self.IOM_3_PORT_START
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@property
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def iom3_port_end(self):
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return self.IOM_3_PORT_END
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@property
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def port_to_eeprom_mapping(self):
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return self._port_to_eeprom_mapping
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@property
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def port_to_i2c_mapping(self):
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return self._port_to_i2c_mapping
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def __init__(self):
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eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/i2c-{1}/{1}-0050/eeprom"
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for x in range(0, self.port_end+1):
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self.port_to_eeprom_mapping[x] = eeprom_path.format(
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self.port_to_i2c_mapping[x][0],
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self.port_to_i2c_mapping[x][1])
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SfpUtilBase.__init__(self)
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def get_presence(self, port_num):
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global i2c_line
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# Check for invalid port_num
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if port_num < self.port_start or port_num > self.port_end:
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return False
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# port_num and i2c match
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if port_num >= self.iom1_port_start and port_num <= self.iom1_port_end:
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i2c_line = 14
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elif (port_num >= self.iom2_port_start and
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port_num <= self.iom2_port_end):
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i2c_line = 15
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elif (port_num >= self.iom3_port_start and
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port_num <= self.iom3_port_end):
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i2c_line = 16
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try:
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qsfp_path = self.BASE_VAL_PATH.format(i2c_line)+"qsfp_modprs"
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reg_file = open(qsfp_path, "r")
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except IOError as e:
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print "Error: unable to open file: %s" % str(e)
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return False
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content = reg_file.readline().rstrip()
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# Absence of IOM throws read error
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if (content == 'read error'):
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return False
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# content is a string containing the hex representation of the register
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reg_value = int(content, 16)
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# Rationalize port settings
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if port_num >= self.iom2_port_start and port_num <= self.iom2_port_end:
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port_num = port_num % 12
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elif (port_num >= self.iom3_port_start and
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port_num <= self.iom3_port_end):
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port_num = port_num % 22
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# Mask off the bit corresponding to our port
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mask = (1 << port_num)
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# ModPrsL is active low
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if reg_value & mask == 0:
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return True
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return False
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def get_low_power_mode(self, port_num):
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# Check for invalid port_num
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if port_num < self.port_start or port_num > self.port_end:
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return False
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# port_num and i2c match
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if port_num >= self.iom1_port_start and port_num <= self.iom1_port_end:
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i2c_line = 14
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elif (port_num >= self.iom2_port_start and
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port_num <= self.iom2_port_end):
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i2c_line = 15
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elif (port_num >= self.iom3_port_start and
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port_num <= self.iom3_port_end):
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i2c_line = 16
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try:
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qsfp_path = self.BASE_VAL_PATH.format(i2c_line)+"qsfp_lpmode"
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reg_file = open(qsfp_path, "r")
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except IOError as e:
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print "Error: unable to open file: %s" % str(e)
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return False
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content = reg_file.readline().rstrip()
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# Absence of IOM throws read error
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if (content == 'read error'):
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return False
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# content is a string containing the hex representation of the register
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reg_value = int(content, 16)
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# Rationalize port settings
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if port_num >= self.iom2_port_start and port_num <= self.iom2_port_end:
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port_num = port_num % 12
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elif (port_num >= self.iom3_port_start and
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port_num <= self.iom3_port_end):
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port_num = port_num % 22
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# Mask off the bit corresponding to our port
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mask = (1 << port_num)
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# LPMode is active high
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if reg_value & mask == 0:
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return False
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return True
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def set_low_power_mode(self, port_num, lpmode):
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# Check for invalid port_num
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if port_num < self.port_start or port_num > self.port_end:
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return False
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# port_num and i2c match
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if port_num >= self.iom1_port_start and port_num <= self.iom1_port_end:
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i2c_line = 14
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elif (port_num >= self.iom2_port_start and
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port_num <= self.iom2_port_end):
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i2c_line = 15
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elif (port_num >= self.iom3_port_start and
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port_num <= self.iom3_port_end):
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i2c_line = 16
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try:
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qsfp_path = self.BASE_VAL_PATH.format(i2c_line)+"qsfp_lpmode"
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reg_file = open(qsfp_path, "r+")
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except IOError as e:
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print "Error: unable to open file: %s" % str(e)
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return False
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content = reg_file.readline().rstrip()
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# Absence of IOM throws read error
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if (content == 'read error'):
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return False
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# content is a string containing the hex representation of the register
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reg_value = int(content, 16)
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# Rationalize port settings
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if port_num >= self.iom2_port_start and port_num <= self.iom2_port_end:
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port_num = port_num % 12
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elif (port_num >= self.iom3_port_start and
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port_num <= self.iom3_port_end):
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port_num = port_num % 22
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# Mask off the bit corresponding to our port
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mask = (1 << port_num)
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# LPMode is active high; set or clear the bit accordingly
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if lpmode is True:
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reg_value = reg_value | mask
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else:
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reg_value = reg_value & ~mask
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# Convert our register value back to a hex string and write back
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content = hex(reg_value)
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reg_file.seek(0)
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reg_file.write(content)
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reg_file.close()
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return True
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def reset(self, port_num):
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# Check for invalid port_num
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if port_num < self.port_start or port_num > self.port_end:
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return False
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# port_num and i2c match
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if port_num >= self.iom1_port_start and port_num <= self.iom1_port_end:
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i2c_line = 14
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elif (port_num >= self.iom2_port_start and
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port_num <= self.iom2_port_end):
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i2c_line = 15
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elif (port_num >= self.iom3_port_start and
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port_num <= self.iom3_port_end):
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i2c_line = 16
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try:
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qsfp_path = self.BASE_VAL_PATH.format(i2c_line)+"qsfp_lpmode"
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reg_file = open(qsfp_path, "r+")
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except IOError as e:
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print "Error: unable to open file: %s" % str(e)
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return False
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content = reg_file.readline().rstrip()
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# File content is a string containing the hex representation of th
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reg_value = int(content, 16)
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# Rationalize port settings
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if port_num >= self.iom2_port_start and port_num <= self.iom2_port_end:
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port_num = port_num % 12
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elif (port_num >= self.iom3_port_start and
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port_num <= self.iom3_port_end):
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port_num = port_num % 22
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# Mask off the bit corresponding to our port
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mask = (1 << port_num)
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# ResetL is active low
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reg_value = reg_value & ~mask
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# Convert our register value back to a hex string and write back
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reg_file.seek(0)
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reg_file.write(hex(reg_value))
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reg_file.close()
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# Sleep 1 second to allow it to settle
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time.sleep(1)
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# Flip the bit back high and write back to the register to take
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# port out of reset
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try:
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qsfp_path = self.BASE_VAL_PATH.format(i2c_line)+"qsfp_lpmode"
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reg_file = open(qsfp_path, "w+")
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except IOError as e:
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print "Error: unable to open file: %s" % str(e)
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return False
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reg_value = reg_value | mask
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reg_file.seek(0)
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reg_file.write(hex(reg_value))
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reg_file.close()
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return True
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def get_register(self, reg_file):
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retval = 'ERR'
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if (not os.path.isfile(reg_file)):
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print reg_file, 'not found !'
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return retval
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try:
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with open(reg_file, 'r') as fd:
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retval = fd.read()
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except Exception as error:
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logging.error("Unable to open ", reg_file, "file !")
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retval = retval.rstrip('\r\n')
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retval = retval.lstrip(" ")
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return retval
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def get_transceiver_change_event(self, timeout=0):
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epoll = select.epoll()
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port_dict = {}
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try:
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# We get notified when there is an SCI interrupt from GPIO SUS6
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fd = open("/sys/devices/platform/dell_ich.0/sci_int_gpio_sus6", "r")
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epoll.register(fd.fileno(), select.EPOLLIN)
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events = epoll.poll(timeout=timeout if timeout != 0 else -1)
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if events:
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# Read the QSFP ABS interrupt & status registers
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cpld2_abs_int = self.get_register("/sys/class/i2c-adapter/i2c-14/14-003e/qsfp_abs_int")
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cpld2_abs_sta = self.get_register("/sys/class/i2c-adapter/i2c-14/14-003e/qsfp_abs_sta")
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cpld3_abs_int = self.get_register("/sys/class/i2c-adapter/i2c-15/15-003e/qsfp_abs_int")
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cpld3_abs_sta = self.get_register("/sys/class/i2c-adapter/i2c-15/15-003e/qsfp_abs_sta")
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cpld4_abs_int = self.get_register("/sys/class/i2c-adapter/i2c-16/16-003e/qsfp_abs_int")
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cpld4_abs_sta = self.get_register("/sys/class/i2c-adapter/i2c-16/16-003e/qsfp_abs_sta")
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if (cpld2_abs_int == 'ERR' or cpld2_abs_sta == 'ERR' or \
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cpld3_abs_int == 'ERR' or cpld3_abs_sta == 'ERR' or \
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cpld4_abs_int == 'ERR' or cpld4_abs_sta == 'ERR' ):
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return False, {}
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cpld2_abs_int = int(cpld2_abs_int, 16)
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cpld2_abs_sta = int(cpld2_abs_sta, 16)
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cpld3_abs_int = int(cpld3_abs_int, 16)
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cpld3_abs_sta = int(cpld3_abs_sta, 16)
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cpld4_abs_int = int(cpld4_abs_int, 16)
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cpld4_abs_sta = int(cpld4_abs_sta, 16)
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# Make it contiguous (discard reserved bits)
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interrupt_reg = (cpld2_abs_int & 0xfff) | ((cpld3_abs_int & 0x3ff) << 12) | ((cpld4_abs_int & 0x3ff) << 22)
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status_reg = (cpld2_abs_sta & 0xfff) | ((cpld3_abs_sta & 0x3ff) << 12) | ((cpld4_abs_sta & 0x3ff) << 22)
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port=self.port_start
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while port <= self.port_end:
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if interrupt_reg & (1<<port)):
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if status_reg & (1<<port)):
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# status reg 1 => optics is removed
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port_dict[port] = '0'
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else:
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# status reg 0 => optics is inserted
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port_dict[port] = '1'
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port += 1
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return True, port_dict
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finally:
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fd.close()
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epoll.close()
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return False, {}
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