sonic-buildimage/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/th-a7060-cx32s-8x100G+48x50G.config.bcm
abdosi b6efb49817
Update bcm soc property bcm_num_cos from 8 to 10 (#5314)
as needed by SAI 3.7 and above. Without this change
Warmboot fails from 3.5 to 3.7 as Braodcoam Datastructure
gets corrupted after warm-boot.

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
2020-09-04 07:40:17 -07:00

548 lines
14 KiB
Plaintext

# Arista 7060CX-32S
phy_an_allow_pll_change=1
arl_clean_timeout_usec=15000000
asf_mem_profile=2
bcm_num_cos=10
bcm_stat_flags=1
bcm_stat_jumbo=9236
cdma_timeout_usec=15000000
dma_desc_timeout_usec=15000000
higig2_hdr_mode=1
ipv6_lpm_128b_enable=1
l3_alpm_enable=2
lpm_scaling_enable=0
l2xmsg_mode=1
max_vp_lags=0
miim_intr_enable=0
module_64ports=1
os=unix
oversubscribe_mode=1
ptp_bs_fref.0=25000000
ptp_ts_pll_fref.0=25000000
robust_hash_disable_egress_vlan.0=1
robust_hash_disable_mpls.0=1
robust_hash_disable_vlan.0=1
tdma_timeout_usec.0=15000000
tslam_timeout_usec.0=15000000
pbmp_xport_xe=0x1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe
phy_an_allow_pll_change_hg.0=0
dport_map_direct=1
phy_an_c73=1
phy_an_fec_1.0=1
phy_an_fec_2.0=1
phy_an_fec_3.0=1
phy_an_fec_4.0=1
phy_an_fec_5.0=1
phy_an_fec_6.0=1
phy_an_fec_7.0=1
phy_an_fec_8.0=1
phy_an_fec_9.0=1
phy_an_fec_10.0=1
phy_an_fec_11.0=1
phy_an_fec_12.0=1
phy_an_fec_13.0=1
phy_an_fec_14.0=1
phy_an_fec_34.0=1
phy_an_fec_35.0=1
phy_an_fec_36.0=1
phy_an_fec_37.0=1
phy_an_fec_38.0=1
phy_an_fec_39.0=1
phy_an_fec_40.0=1
phy_an_fec_41.0=1
phy_an_fec_42.0=1
phy_an_fec_43.0=1
phy_an_fec_44.0=1
phy_an_fec_45.0=1
phy_an_fec_46.0=1
phy_an_fec_47.0=1
phy_an_fec_68.0=1
phy_an_fec_69.0=1
phy_an_fec_70.0=1
phy_an_fec_71.0=1
phy_an_fec_72.0=1
phy_an_fec_73.0=1
phy_an_fec_74.0=1
phy_an_fec_75.0=1
phy_an_fec_76.0=1
phy_an_fec_77.0=1
phy_an_fec_78.0=1
phy_an_fec_79.0=1
phy_an_fec_80.0=1
phy_an_fec_81.0=1
phy_an_fec_102.0=1
phy_an_fec_103.0=1
phy_an_fec_104.0=1
phy_an_fec_105.0=1
phy_an_fec_106.0=1
phy_an_fec_107.0=1
phy_an_fec_108.0=1
phy_an_fec_109.0=1
phy_an_fec_110.0=1
phy_an_fec_111.0=1
phy_an_fec_112.0=1
phy_an_fec_113.0=1
phy_an_fec_114.0=1
phy_an_fec_115.0=1
# Q1
portmap_1.0=1:100
portmap_2.0=5:100
portmap_3.0=9:50:2
portmap_4.0=11:50:2
portmap_5.0=13:50:2
portmap_6.0=15:50:2
portmap_7.0=17:50:2
portmap_8.0=19:50:2
portmap_9.0=21:50:2
portmap_10.0=23:50:2
portmap_11.0=25:50:2
portmap_12.0=27:50:2
portmap_13.0=29:50:2
portmap_14.0=31:50:2
phy_xaui_rx_polarity_flip_1.0=0x1
phy_xaui_rx_polarity_flip_2.0=0x5
phy_xaui_rx_polarity_flip_3.0=0x1
phy_xaui_rx_polarity_flip_4.0=0x0
phy_xaui_rx_polarity_flip_5.0=0x3
phy_xaui_rx_polarity_flip_6.0=0x1
phy_xaui_rx_polarity_flip_7.0=0x0
phy_xaui_rx_polarity_flip_8.0=0x3
phy_xaui_rx_polarity_flip_9.0=0x3
phy_xaui_rx_polarity_flip_10.0=0x3
phy_xaui_rx_polarity_flip_11.0=0x0
phy_xaui_rx_polarity_flip_12.0=0x3
phy_xaui_rx_polarity_flip_13.0=0x3
phy_xaui_rx_polarity_flip_14.0=0x3
phy_xaui_tx_polarity_flip_1.0=0x0
phy_xaui_tx_polarity_flip_2.0=0xe
phy_xaui_tx_polarity_flip_3.0=0x2
phy_xaui_tx_polarity_flip_4.0=0x0
phy_xaui_tx_polarity_flip_5.0=0x2
phy_xaui_tx_polarity_flip_6.0=0x3
phy_xaui_tx_polarity_flip_7.0=0x0
phy_xaui_tx_polarity_flip_8.0=0x3
phy_xaui_tx_polarity_flip_9.0=0x3
phy_xaui_tx_polarity_flip_10.0=0x3
phy_xaui_tx_polarity_flip_11.0=0x0
phy_xaui_tx_polarity_flip_12.0=0x3
phy_xaui_tx_polarity_flip_13.0=0x3
phy_xaui_tx_polarity_flip_14.0=0x3
port_phy_addr_1.0=0xff
port_phy_addr_2.0=0xff
port_phy_addr_3.0=0xff
port_phy_addr_4.0=0xff
port_phy_addr_5.0=0xff
port_phy_addr_6.0=0xff
port_phy_addr_7.0=0xff
port_phy_addr_8.0=0xff
port_phy_addr_9.0=0xff
port_phy_addr_10.0=0xff
port_phy_addr_11.0=0xff
port_phy_addr_12.0=0xff
port_phy_addr_13.0=0xff
port_phy_addr_14.0=0xff
xgxs_rx_lane_map_1.0=0x3210
xgxs_rx_lane_map_2.0=0x3210
xgxs_rx_lane_map_3.0=0x3210
xgxs_rx_lane_map_4.0=0x3210
xgxs_rx_lane_map_5.0=0x3210
xgxs_rx_lane_map_6.0=0x3210
xgxs_rx_lane_map_7.0=0x0123
xgxs_rx_lane_map_8.0=0x0123
xgxs_rx_lane_map_9.0=0x2301
xgxs_rx_lane_map_10.0=0x2301
xgxs_rx_lane_map_11.0=0x0123
xgxs_rx_lane_map_12.0=0x0123
xgxs_rx_lane_map_13.0=0x2301
xgxs_rx_lane_map_14.0=0x2301
xgxs_tx_lane_map_1.0=0x0321
xgxs_tx_lane_map_2.0=0x2301
xgxs_tx_lane_map_3.0=0x0321
xgxs_tx_lane_map_4.0=0x0321
xgxs_tx_lane_map_5.0=0x2301
xgxs_tx_lane_map_6.0=0x2301
xgxs_tx_lane_map_7.0=0x0123
xgxs_tx_lane_map_8.0=0x0123
xgxs_tx_lane_map_9.0=0x0123
xgxs_tx_lane_map_10.0=0x0123
xgxs_tx_lane_map_11.0=0x0123
xgxs_tx_lane_map_12.0=0x0123
xgxs_tx_lane_map_13.0=0x0123
xgxs_tx_lane_map_14.0=0x0123
# Q2
portmap_34.0=33:50:2
portmap_35.0=35:50:2
portmap_36.0=37:50:2
portmap_37.0=39:50:2
portmap_38.0=41:50:2
portmap_39.0=43:50:2
portmap_40.0=45:50:2
portmap_41.0=47:50:2
portmap_42.0=49:50:2
portmap_43.0=51:50:2
portmap_44.0=53:50:2
portmap_45.0=55:50:2
portmap_46.0=57:100
portmap_47.0=61:100
phy_xaui_rx_polarity_flip_34.0=0x0
phy_xaui_rx_polarity_flip_35.0=0x0
phy_xaui_rx_polarity_flip_36.0=0x3
phy_xaui_rx_polarity_flip_37.0=0x1
phy_xaui_rx_polarity_flip_38.0=0x0
phy_xaui_rx_polarity_flip_39.0=0x1
phy_xaui_rx_polarity_flip_40.0=0x3
phy_xaui_rx_polarity_flip_41.0=0x1
phy_xaui_rx_polarity_flip_42.0=0x0
phy_xaui_rx_polarity_flip_43.0=0x1
phy_xaui_rx_polarity_flip_44.0=0x2
phy_xaui_rx_polarity_flip_45.0=0x1
phy_xaui_rx_polarity_flip_46.0=0x1
phy_xaui_rx_polarity_flip_47.0=0x2
phy_xaui_tx_polarity_flip_34.0=0x0
phy_xaui_tx_polarity_flip_35.0=0x0
phy_xaui_tx_polarity_flip_36.0=0x2
phy_xaui_tx_polarity_flip_37.0=0x3
phy_xaui_tx_polarity_flip_38.0=0x0
phy_xaui_tx_polarity_flip_39.0=0x0
phy_xaui_tx_polarity_flip_40.0=0x2
phy_xaui_tx_polarity_flip_41.0=0x3
phy_xaui_tx_polarity_flip_42.0=0x3
phy_xaui_tx_polarity_flip_43.0=0x3
phy_xaui_tx_polarity_flip_44.0=0x2
phy_xaui_tx_polarity_flip_45.0=0x3
phy_xaui_tx_polarity_flip_46.0=0x6
phy_xaui_tx_polarity_flip_47.0=0xb
port_phy_addr_34.0=0xff
port_phy_addr_35.0=0xff
port_phy_addr_36.0=0xff
port_phy_addr_37.0=0xff
port_phy_addr_38.0=0xff
port_phy_addr_39.0=0xff
port_phy_addr_40.0=0xff
port_phy_addr_41.0=0xff
port_phy_addr_42.0=0xff
port_phy_addr_43.0=0xff
port_phy_addr_44.0=0xff
port_phy_addr_45.0=0xff
port_phy_addr_46.0=0xff
port_phy_addr_47.0=0xff
xgxs_rx_lane_map_34.0=0x0123
xgxs_rx_lane_map_35.0=0x0123
xgxs_rx_lane_map_36.0=0x0321
xgxs_rx_lane_map_37.0=0x0321
xgxs_rx_lane_map_38.0=0x0321
xgxs_rx_lane_map_39.0=0x0321
xgxs_rx_lane_map_40.0=0x0321
xgxs_rx_lane_map_41.0=0x0321
xgxs_rx_lane_map_42.0=0x1230
xgxs_rx_lane_map_43.0=0x1230
xgxs_rx_lane_map_44.0=0x2301
xgxs_rx_lane_map_45.0=0x2301
xgxs_rx_lane_map_46.0=0x1230
xgxs_rx_lane_map_47.0=0x2103
xgxs_tx_lane_map_34.0=0x2301
xgxs_tx_lane_map_35.0=0x2301
xgxs_tx_lane_map_36.0=0x0321
xgxs_tx_lane_map_37.0=0x0321
xgxs_tx_lane_map_38.0=0x2301
xgxs_tx_lane_map_39.0=0x2301
xgxs_tx_lane_map_40.0=0x0321
xgxs_tx_lane_map_41.0=0x0321
xgxs_tx_lane_map_42.0=0x0123
xgxs_tx_lane_map_43.0=0x0123
xgxs_tx_lane_map_44.0=0x1230
xgxs_tx_lane_map_45.0=0x1230
xgxs_tx_lane_map_46.0=0x2301
xgxs_tx_lane_map_47.0=0x1032
# Q3
portmap_68.0=65:100
portmap_69.0=69:100
portmap_70.0=73:50:2
portmap_71.0=75:50:2
portmap_72.0=77:50:2
portmap_73.0=79:50:2
portmap_74.0=81:50:2
portmap_75.0=83:50:2
portmap_76.0=85:50:2
portmap_77.0=87:50:2
portmap_78.0=89:50:2
portmap_79.0=91:50:2
portmap_80.0=93:50:2
portmap_81.0=95:50:2
phy_xaui_rx_polarity_flip_68.0=0xd
phy_xaui_rx_polarity_flip_69.0=0x6
phy_xaui_rx_polarity_flip_70.0=0x1
phy_xaui_rx_polarity_flip_71.0=0x0
phy_xaui_rx_polarity_flip_72.0=0x0
phy_xaui_rx_polarity_flip_73.0=0x2
phy_xaui_rx_polarity_flip_74.0=0x3
phy_xaui_rx_polarity_flip_75.0=0x1
phy_xaui_rx_polarity_flip_76.0=0x0
phy_xaui_rx_polarity_flip_77.0=0x3
phy_xaui_rx_polarity_flip_78.0=0x3
phy_xaui_rx_polarity_flip_79.0=0x1
phy_xaui_rx_polarity_flip_80.0=0x0
phy_xaui_rx_polarity_flip_81.0=0x2
phy_xaui_tx_polarity_flip_68.0=0x9
phy_xaui_tx_polarity_flip_69.0=0xb
phy_xaui_tx_polarity_flip_70.0=0x1
phy_xaui_tx_polarity_flip_71.0=0x3
phy_xaui_tx_polarity_flip_72.0=0x1
phy_xaui_tx_polarity_flip_73.0=0x2
phy_xaui_tx_polarity_flip_74.0=0x2
phy_xaui_tx_polarity_flip_75.0=0x1
phy_xaui_tx_polarity_flip_76.0=0x0
phy_xaui_tx_polarity_flip_77.0=0x3
phy_xaui_tx_polarity_flip_78.0=0x1
phy_xaui_tx_polarity_flip_79.0=0x2
phy_xaui_tx_polarity_flip_80.0=0x1
phy_xaui_tx_polarity_flip_81.0=0x2
port_phy_addr_68.0=0xff
port_phy_addr_69.0=0xff
port_phy_addr_70.0=0xff
port_phy_addr_71.0=0xff
port_phy_addr_72.0=0xff
port_phy_addr_73.0=0xff
port_phy_addr_74.0=0xff
port_phy_addr_75.0=0xff
port_phy_addr_76.0=0xff
port_phy_addr_77.0=0xff
port_phy_addr_78.0=0xff
port_phy_addr_79.0=0xff
port_phy_addr_80.0=0xff
port_phy_addr_81.0=0xff
xgxs_rx_lane_map_68.0=0x1230
xgxs_rx_lane_map_69.0=0x2301
xgxs_rx_lane_map_70.0=0x1230
xgxs_rx_lane_map_71.0=0x1230
xgxs_rx_lane_map_72.0=0x2103
xgxs_rx_lane_map_73.0=0x2103
xgxs_rx_lane_map_74.0=0x1230
xgxs_rx_lane_map_75.0=0x1230
xgxs_rx_lane_map_76.0=0x2301
xgxs_rx_lane_map_77.0=0x2301
xgxs_rx_lane_map_78.0=0x1230
xgxs_rx_lane_map_79.0=0x1230
xgxs_rx_lane_map_80.0=0x2103
xgxs_rx_lane_map_81.0=0x2103
xgxs_tx_lane_map_68.0=0x0123
xgxs_tx_lane_map_69.0=0x1230
xgxs_tx_lane_map_70.0=0x2301
xgxs_tx_lane_map_71.0=0x2301
xgxs_tx_lane_map_72.0=0x1032
xgxs_tx_lane_map_73.0=0x1032
xgxs_tx_lane_map_74.0=0x0123
xgxs_tx_lane_map_75.0=0x0123
xgxs_tx_lane_map_76.0=0x1230
xgxs_tx_lane_map_77.0=0x1230
xgxs_tx_lane_map_78.0=0x2301
xgxs_tx_lane_map_79.0=0x2301
xgxs_tx_lane_map_80.0=0x1032
xgxs_tx_lane_map_81.0=0x1032
# Q4
portmap_102.0=97:50:2
portmap_103.0=99:50:2
portmap_104.0=101:50:2
portmap_105.0=103:50:2
portmap_106.0=105:50:2
portmap_107.0=107:50:2
portmap_108.0=109:50:2
portmap_109.0=111:50:2
portmap_110.0=113:50:2
portmap_111.0=115:50:2
portmap_112.0=117:50:2
portmap_113.0=119:50:2
portmap_114.0=121:100
portmap_115.0=125:100
phy_xaui_rx_polarity_flip_102.0=0x3
phy_xaui_rx_polarity_flip_103.0=0x2
phy_xaui_rx_polarity_flip_104.0=0x0
phy_xaui_rx_polarity_flip_105.0=0x3
phy_xaui_rx_polarity_flip_106.0=0x3
phy_xaui_rx_polarity_flip_107.0=0x0
phy_xaui_rx_polarity_flip_108.0=0x0
phy_xaui_rx_polarity_flip_109.0=0x3
phy_xaui_rx_polarity_flip_110.0=0x3
phy_xaui_rx_polarity_flip_111.0=0x2
phy_xaui_rx_polarity_flip_112.0=0x1
phy_xaui_rx_polarity_flip_113.0=0x1
phy_xaui_rx_polarity_flip_114.0=0x1
phy_xaui_rx_polarity_flip_115.0=0x9
phy_xaui_tx_polarity_flip_102.0=0x2
phy_xaui_tx_polarity_flip_103.0=0x1
phy_xaui_tx_polarity_flip_104.0=0x3
phy_xaui_tx_polarity_flip_105.0=0x2
phy_xaui_tx_polarity_flip_106.0=0x2
phy_xaui_tx_polarity_flip_107.0=0x1
phy_xaui_tx_polarity_flip_108.0=0x3
phy_xaui_tx_polarity_flip_109.0=0x2
phy_xaui_tx_polarity_flip_110.0=0x2
phy_xaui_tx_polarity_flip_111.0=0x1
phy_xaui_tx_polarity_flip_112.0=0x3
phy_xaui_tx_polarity_flip_113.0=0x3
phy_xaui_tx_polarity_flip_114.0=0x6
phy_xaui_tx_polarity_flip_115.0=0xc
port_phy_addr_102.0=0xff
port_phy_addr_103.0=0xff
port_phy_addr_104.0=0xff
port_phy_addr_105.0=0xff
port_phy_addr_106.0=0xff
port_phy_addr_107.0=0xff
port_phy_addr_108.0=0xff
port_phy_addr_109.0=0xff
port_phy_addr_110.0=0xff
port_phy_addr_111.0=0xff
port_phy_addr_112.0=0xff
port_phy_addr_113.0=0xff
port_phy_addr_114.0=0xff
port_phy_addr_115.0=0xff
xgxs_rx_lane_map_102.0=0x3210
xgxs_rx_lane_map_103.0=0x3210
xgxs_rx_lane_map_104.0=0x3210
xgxs_rx_lane_map_105.0=0x3210
xgxs_rx_lane_map_106.0=0x3210
xgxs_rx_lane_map_107.0=0x3210
xgxs_rx_lane_map_108.0=0x3210
xgxs_rx_lane_map_109.0=0x3210
xgxs_rx_lane_map_110.0=0x3210
xgxs_rx_lane_map_111.0=0x3210
xgxs_rx_lane_map_112.0=0x3210
xgxs_rx_lane_map_114.0=0x3210
xgxs_rx_lane_map_115.0=0x3210
xgxs_tx_lane_map_102.0=0x0321
xgxs_tx_lane_map_103.0=0x0321
xgxs_tx_lane_map_104.0=0x2301
xgxs_tx_lane_map_105.0=0x2301
xgxs_tx_lane_map_106.0=0x0321
xgxs_tx_lane_map_107.0=0x0321
xgxs_tx_lane_map_108.0=0x2301
xgxs_tx_lane_map_109.0=0x2301
xgxs_tx_lane_map_110.0=0x0321
xgxs_tx_lane_map_111.0=0x0321
xgxs_tx_lane_map_112.0=0x2301
xgxs_tx_lane_map_113.0=0x2301
xgxs_tx_lane_map_114.0=0x0321
xgxs_tx_lane_map_115.0=0x2301
# tuning parameters
serdes_driver_current_1=0xa
serdes_preemphasis_1=0x284008
serdes_driver_current_2=0xa
serdes_preemphasis_2=0x284008
serdes_driver_current_3=0xf
serdes_preemphasis_3=0x46408
serdes_driver_current_4=0xf
serdes_preemphasis_4=0x46408
serdes_driver_current_5=0xf
serdes_preemphasis_5=0x46408
serdes_driver_current_6=0xf
serdes_preemphasis_6=0x46408
serdes_driver_current_7=0xf
serdes_preemphasis_7=0x46408
serdes_driver_current_8=0xf
serdes_preemphasis_8=0x46408
serdes_driver_current_9=0xf
serdes_preemphasis_9=0x46408
serdes_driver_current_10=0xf
serdes_preemphasis_10=0x46408
serdes_driver_current_11=0xf
serdes_preemphasis_11=0x46408
serdes_driver_current_12=0xf
serdes_preemphasis_12=0x46408
serdes_driver_current_13=0xf
serdes_preemphasis_13=0x46408
serdes_driver_current_14=0xf
serdes_preemphasis_14=0x46408
serdes_driver_current_34=0xf
serdes_preemphasis_34=0x46408
serdes_driver_current_35=0xf
serdes_preemphasis_35=0x46408
serdes_driver_current_36=0xf
serdes_preemphasis_36=0x46408
serdes_driver_current_37=0xf
serdes_preemphasis_37=0x46408
serdes_driver_current_38=0xf
serdes_preemphasis_38=0x46408
serdes_driver_current_39=0xf
serdes_preemphasis_39=0x46408
serdes_driver_current_40=0xf
serdes_preemphasis_40=0x46408
serdes_driver_current_41=0xf
serdes_preemphasis_41=0x46408
serdes_driver_current_42=0xf
serdes_preemphasis_42=0x46408
serdes_driver_current_43=0xf
serdes_preemphasis_43=0x46408
serdes_driver_current_44=0xf
serdes_preemphasis_44=0x46408
serdes_driver_current_45=0xf
serdes_preemphasis_45=0x46408
serdes_driver_current_46=0xf
serdes_preemphasis_46=0x373108
serdes_driver_current_47=0xf
serdes_preemphasis_47=0x373108
serdes_driver_current_68=0xf
serdes_preemphasis_68=0x373108
serdes_driver_current_69=0xf
serdes_preemphasis_69=0x373108
serdes_driver_current_70=0xf
serdes_preemphasis_70=0x46408
serdes_driver_current_71=0xf
serdes_preemphasis_71=0x46408
serdes_driver_current_72=0xf
serdes_preemphasis_72=0x46408
serdes_driver_current_73=0xf
serdes_preemphasis_73=0x46408
serdes_driver_current_74=0xf
serdes_preemphasis_74=0x46408
serdes_driver_current_75=0xf
serdes_preemphasis_75=0x46408
serdes_driver_current_76=0xf
serdes_preemphasis_76=0x46408
serdes_driver_current_77=0xf
serdes_preemphasis_77=0x46408
serdes_driver_current_78=0xf
serdes_preemphasis_78=0x46408
serdes_driver_current_79=0xf
serdes_preemphasis_79=0x46408
serdes_driver_current_80=0xf
serdes_preemphasis_80=0x46408
serdes_driver_current_81=0xf
serdes_preemphasis_81=0x46408
serdes_driver_current_102=0xf
serdes_preemphasis_102=0x46408
serdes_driver_current_103=0xf
serdes_preemphasis_103=0x46408
serdes_driver_current_104=0xf
serdes_preemphasis_104=0x46408
serdes_driver_current_105=0xf
serdes_preemphasis_105=0x46408
serdes_driver_current_106=0xf
serdes_preemphasis_106=0x46408
serdes_driver_current_107=0xf
serdes_preemphasis_107=0x46408
serdes_driver_current_108=0xf
serdes_preemphasis_108=0x46408
serdes_driver_current_109=0xf
serdes_preemphasis_109=0x46408
serdes_driver_current_110=0xf
serdes_preemphasis_110=0x46408
serdes_driver_current_111=0xf
serdes_preemphasis_111=0x46408
serdes_driver_current_112=0xf
serdes_preemphasis_112=0x46408
serdes_driver_current_113=0xf
serdes_preemphasis_113=0x46408
serdes_driver_current_114=0xa
serdes_preemphasis_114=0x284008
serdes_driver_current_115=0xa
serdes_preemphasis_115=0x284008
mmu_init_config="MSFT-TH-Tier0"