sonic-buildimage/device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100-C32/th-z9100-32x100G.config.bcm
Harish Venkatraman 65f6253519 [Dell] z9100 port qos & buffer changes of 0330 to master (#2266)
This commit has the forward porting of changes from 20180330
to master. Unit tested by checking the broadcom registers
for the values. The values in hardware reflect the correct values
except for TC to PFC priority group map values. Master branch values
for TC to PFC priority group map for both z9100 and s6100 in incorrect,
I have a build of Oct 12 master and the values are correct in
that build.

Signed-off-by: Harish Venkatraman <Harish_Venkatraman@Dell.com>
2019-01-08 18:14:42 -08:00

233 lines
5.8 KiB
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#TH Z9100 32x100
l3_alpm_enable=2
pfc_deadlock_seq_control=1
bcm_stat_interval=2000000
bcm_num_cos=8
switch_bypass_mode=0
mmu_lossless=0
lpm_scaling_enable=0
lpm_scaling_enable=0
lpm_ipv6_128b_reserved=0
ipv6_lpm_128b_enable=1
l2xmsg_mode=1
oversubscribe_mode=1
os=unix
pbmp_oversubscribe=0x3fd000000ff4000003fc000001fe
pbmp_xport_xe=0x3fd000000ff4000003fc000001fe
serdes_if_type_xe=14
serdes_if_type_ce=14
#Parity
parity_correction=1
parity_enable=1
#Port configuration
portmap_38=49:100
portmap_39=53:100
portmap_40=57:100
portmap_41=61:100
portmap_68=65:100
portmap_69=69:100
portmap_70=73:100
portmap_71=77:100
portmap_35=37:100
portmap_34=33:100
portmap_37=45:100
portmap_36=41:100
portmap_72=81:100
portmap_73=85:100
portmap_74=89:100
portmap_75=93:100
portmap_102=97:100
portmap_103=101:100
portmap_104=105:100
portmap_105=109:100
portmap_6=21:100
portmap_5=17:100
portmap_8=29:100
portmap_7=25:100
portmap_107=117:100
portmap_106=113:100
portmap_109=125:100
portmap_108=121:100
portmap_2=5:100
portmap_1=1:100
portmap_4=13:100
portmap_3=9:100
portmap_66=129:10
portmap_100=131:10
portmap_33=132:10
portmap_67=133:10
portmap_101=134:10
portmap_135=135:10
xgxs_tx_lane_map_ce0=0x0132
xgxs_tx_lane_map_ce1=0x2301
xgxs_tx_lane_map_ce2=0x0123
xgxs_tx_lane_map_ce3=0x3201
xgxs_tx_lane_map_ce4=0x3210
xgxs_tx_lane_map_ce5=0x2301
xgxs_tx_lane_map_ce6=0x0123
xgxs_tx_lane_map_ce7=0x1320
xgxs_tx_lane_map_ce8=0x1032
xgxs_tx_lane_map_ce9=0x2031
xgxs_tx_lane_map_ce10=0x1023
xgxs_tx_lane_map_ce11=0x0132
xgxs_tx_lane_map_ce12=0x0213
xgxs_tx_lane_map_ce13=0x1032
xgxs_tx_lane_map_ce14=0x0132
xgxs_tx_lane_map_ce15=0x0123
xgxs_tx_lane_map_ce16=0x0123
xgxs_tx_lane_map_ce17=0x0123
xgxs_tx_lane_map_ce18=0x1032
xgxs_tx_lane_map_ce19=0x0123
xgxs_tx_lane_map_ce20=0x2301
xgxs_tx_lane_map_ce21=0x3102
xgxs_tx_lane_map_ce22=0x1023
xgxs_tx_lane_map_ce23=0x2130
xgxs_tx_lane_map_ce24=0x2310
xgxs_tx_lane_map_ce25=0x2013
xgxs_tx_lane_map_ce26=0x0132
xgxs_tx_lane_map_ce27=0x0123
xgxs_tx_lane_map_ce28=0x0213
xgxs_tx_lane_map_ce29=0x0123
xgxs_tx_lane_map_ce30=0x2301
xgxs_tx_lane_map_ce31=0x0123
xgxs_rx_lane_map_ce0=0x1023
xgxs_rx_lane_map_ce1=0x1302
xgxs_rx_lane_map_ce2=0x1203
xgxs_rx_lane_map_ce3=0x1302
xgxs_rx_lane_map_ce4=0x3201
xgxs_rx_lane_map_ce5=0x1302
xgxs_rx_lane_map_ce6=0x1203
xgxs_rx_lane_map_ce7=0x2301
xgxs_rx_lane_map_ce8=0x0312
xgxs_rx_lane_map_ce9=0x1302
xgxs_rx_lane_map_ce10=0x2103
xgxs_rx_lane_map_ce11=0x3210
xgxs_rx_lane_map_ce12=0x2301
xgxs_rx_lane_map_ce13=0x0213
xgxs_rx_lane_map_ce14=0x3210
xgxs_rx_lane_map_ce15=0x3210
xgxs_rx_lane_map_ce16=0x3201
xgxs_rx_lane_map_ce17=0x0213
xgxs_rx_lane_map_ce18=0x3210
xgxs_rx_lane_map_ce19=0x3210
xgxs_rx_lane_map_ce20=0x3102
xgxs_rx_lane_map_ce21=0x2103
xgxs_rx_lane_map_ce22=0x2301
xgxs_rx_lane_map_ce23=0x2310
xgxs_rx_lane_map_ce24=0x3201
xgxs_rx_lane_map_ce25=0x0123
xgxs_rx_lane_map_ce26=0x1023
xgxs_rx_lane_map_ce27=0x0213
xgxs_rx_lane_map_ce28=0x1203
xgxs_rx_lane_map_ce29=0x0213
xgxs_rx_lane_map_ce30=0x3201
xgxs_rx_lane_map_ce31=0x0213
phy_xaui_tx_polarity_flip_ce0=0xe
phy_xaui_tx_polarity_flip_ce1=0x2
phy_xaui_tx_polarity_flip_ce2=0xa
phy_xaui_tx_polarity_flip_ce3=0xb
phy_xaui_tx_polarity_flip_ce4=0x2
phy_xaui_tx_polarity_flip_ce5=0x0
phy_xaui_tx_polarity_flip_ce6=0x0
phy_xaui_tx_polarity_flip_ce7=0xa
phy_xaui_tx_polarity_flip_ce8=0x0
phy_xaui_tx_polarity_flip_ce9=0xb
phy_xaui_tx_polarity_flip_ce10=0xe
phy_xaui_tx_polarity_flip_ce11=0x6
phy_xaui_tx_polarity_flip_ce12=0x6
phy_xaui_tx_polarity_flip_ce13=0xf
phy_xaui_tx_polarity_flip_ce14=0x5
phy_xaui_tx_polarity_flip_ce15=0x8
phy_xaui_tx_polarity_flip_ce16=0xf
phy_xaui_tx_polarity_flip_ce17=0xf
phy_xaui_tx_polarity_flip_ce18=0xf
phy_xaui_tx_polarity_flip_ce19=0xf
phy_xaui_tx_polarity_flip_ce20=0xf
phy_xaui_tx_polarity_flip_ce21=0xf
phy_xaui_tx_polarity_flip_ce22=0xb
phy_xaui_tx_polarity_flip_ce23=0xa
phy_xaui_tx_polarity_flip_ce24=0xf
phy_xaui_tx_polarity_flip_ce25=0x0
phy_xaui_tx_polarity_flip_ce26=0xb
phy_xaui_tx_polarity_flip_ce27=0x7
phy_xaui_tx_polarity_flip_ce28=0x8
phy_xaui_tx_polarity_flip_ce29=0x3
phy_xaui_tx_polarity_flip_ce30=0xc
phy_xaui_tx_polarity_flip_ce31=0x3
phy_xaui_rx_polarity_flip_ce0=0xc
phy_xaui_rx_polarity_flip_ce1=0xd
phy_xaui_rx_polarity_flip_ce2=0x2
phy_xaui_rx_polarity_flip_ce3=0xf
phy_xaui_rx_polarity_flip_ce4=0xc
phy_xaui_rx_polarity_flip_ce5=0x2
phy_xaui_rx_polarity_flip_ce6=0x2
phy_xaui_rx_polarity_flip_ce7=0xd
phy_xaui_rx_polarity_flip_ce8=0xd
phy_xaui_rx_polarity_flip_ce9=0xa
phy_xaui_rx_polarity_flip_ce10=0x7
phy_xaui_rx_polarity_flip_ce11=0xf
phy_xaui_rx_polarity_flip_ce12=0xf
phy_xaui_rx_polarity_flip_ce13=0xd
phy_xaui_rx_polarity_flip_ce14=0x4
phy_xaui_rx_polarity_flip_ce15=0xb
phy_xaui_rx_polarity_flip_ce16=0x2
phy_xaui_rx_polarity_flip_ce17=0xd
phy_xaui_rx_polarity_flip_ce18=0xf
phy_xaui_rx_polarity_flip_ce19=0x0
phy_xaui_rx_polarity_flip_ce20=0x0
phy_xaui_rx_polarity_flip_ce21=0x5
phy_xaui_rx_polarity_flip_ce22=0x0
phy_xaui_rx_polarity_flip_ce23=0x2
phy_xaui_rx_polarity_flip_ce24=0xc
phy_xaui_rx_polarity_flip_ce25=0x8
phy_xaui_rx_polarity_flip_ce26=0x4
phy_xaui_rx_polarity_flip_ce27=0x7
phy_xaui_rx_polarity_flip_ce28=0x7
phy_xaui_rx_polarity_flip_ce29=0x9
phy_xaui_rx_polarity_flip_ce30=0xc
phy_xaui_rx_polarity_flip_ce31=0x8
dport_map_port_38=1
dport_map_port_39=2
dport_map_port_40=3
dport_map_port_41=4
dport_map_port_68=5
dport_map_port_69=6
dport_map_port_70=7
dport_map_port_71=8
dport_map_port_35=9
dport_map_port_34=10
dport_map_port_37=11
dport_map_port_36=12
dport_map_port_72=13
dport_map_port_73=14
dport_map_port_74=15
dport_map_port_75=16
dport_map_port_102=17
dport_map_port_103=18
dport_map_port_104=19
dport_map_port_105=20
dport_map_port_6=21
dport_map_port_5=22
dport_map_port_8=23
dport_map_port_7=24
dport_map_port_107=25
dport_map_port_106=26
dport_map_port_109=27
dport_map_port_108=28
dport_map_port_2=29
dport_map_port_1=30
dport_map_port_4=31
dport_map_port_3=32
mmu_init_config="MSFT-TH-Tier1"