97e6b4d15c
- Why I did it Support shared headroom pool Signed-off-by: Stephen Sun stephens@nvidia.com - How I did it Port configurations for SKUs based on 2700/3800 platform from 201911 For SN3800 platform: C64: 32 100G down links and 32 100G up links. D112C8: 112 50G down links and 8 100G up links. D24C52: 24 50G down links, 20 100G down links, and 32 100G up links. D28C50: 28 50G down links, 18 100G down links, and 32 100G up links. For SN2700 platform: D48C8: 48 50G down links and 8 100G up links C32: 16 100G downlinks and 16 100G uplinks Add configuration for Mellanox-SN4600C-D112C8 112 50G down links and 8 100G up links. - How to verify it Run regression test. |
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x86_64-mlnx_lssn2700-r0 | ||
x86_64-mlnx_msn2010-r0 | ||
x86_64-mlnx_msn2100-r0 | ||
x86_64-mlnx_msn2410-r0 | ||
x86_64-mlnx_msn2700_simx-r0 | ||
x86_64-mlnx_msn2700-r0 | ||
x86_64-mlnx_msn2740-r0 | ||
x86_64-mlnx_msn3420-r0 | ||
x86_64-mlnx_msn3700_simx-r0 | ||
x86_64-mlnx_msn3700-r0 | ||
x86_64-mlnx_msn3700c-r0 | ||
x86_64-mlnx_msn3800-r0 | ||
x86_64-mlnx_msn4410-r0 | ||
x86_64-mlnx_msn4600c-r0 | ||
x86_64-mlnx_msn4700_simx-r0 | ||
x86_64-mlnx_msn4700-r0 | ||
x86_64-mlnx_x86-r5.0.1400 |