sonic-buildimage/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_t0.j2
Stephen Sun e3ff08833e
[Mellanox] Support DSCP remapping in dual ToR topo on T0 switch (#12605)
- Why I did it
Support DSCP remapping in dual ToR topo on T0 switch for SKU Mellanox-SN4600c-C64, Mellanox-SN4600c-D48C40, Mellanox-SN2700, Mellanox-SN2700-D48C8.

- How I did it
Regarding buffer settings, originally, there are two lossless PGs and queues 3, 4. In dual ToR scenario, the lossless traffic from the leaf switch to the uplink of the ToR switch can be bounced back.
To avoid PFC deadlock, we need to map the bounce-back lossless traffic to different PGs and queues. Therefore, 2 additional lossless PGs and queues are allocated on uplink ports on ToR switches.

On uplink ports, map DSCP 2/6 to TC 2/6 respectively
On downlink ports, both DSCP 2/6 are still mapped to TC 1
Buffer adjusted according to the ports information:
Mellanox-SN4600c-C64:
56 downlinks 50G + 8 uplinks 100G
Mellanox-SN4600c-D48C40, Mellanox-SN2700, Mellanox-SN2700-D48C8:
24 downlinks 50G + 8 uplinks 100G

- How to verify it
Unit test.

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2023-02-07 16:21:59 +02:00

55 lines
2.6 KiB
Django/Jinja

{#
Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES.
Apache-2.0
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
#}
{% set default_cable = '5m' %}
{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%}
{% set ingress_lossless_pool_size = '9047040' %}
{% set ingress_lossless_pool_xoff = '851968' %}
{% set egress_lossless_pool_size = '13945824' %}
{% set egress_lossy_pool_size = '9047040' %}
{%- else -%}
{% set ingress_lossless_pool_size = '9595904' %}
{% set ingress_lossless_pool_xoff = '614400' %}
{% set egress_lossless_pool_size = '13945824' %}
{% set egress_lossy_pool_size = '9595904' %}
{%- endif -%}
{% import 'buffers_defaults_objects.j2' as defs with context %}
{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
{%- endmacro %}
{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
{%- endmacro %}
{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
{%- endmacro %}
{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
{%- endmacro %}
{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
{%- endmacro %}
{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
{%- endmacro %}