sonic-buildimage/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX32S-Q32
Neetha John dc21c9605e
[Profile separation] MMU infrastructure update for TD2 (#12626)
Signed-off-by: Neetha John <nejo@microsoft.com>

Why I did it
There is a need to have separate profiles on compute and storage and this infra update will help achieve that

How I did it
Moved buffer pool/profile and qos definitions on TD2 to a common folder and all TD2 hwsku's will reference that folder
2022-11-17 12:58:11 -08:00
..
BALANCED [Profile separation] MMU infrastructure update for TD2 (#12626) 2022-11-17 12:58:11 -08:00
buffer_ports_t0.j2 [Profile separation] MMU infrastructure update for TD2 (#12626) 2022-11-17 12:58:11 -08:00
buffer_ports_t1.j2 [Profile separation] MMU infrastructure update for TD2 (#12626) 2022-11-17 12:58:11 -08:00
buffers_defaults_t0.j2 [Profile separation] MMU infrastructure update for TD2 (#12626) 2022-11-17 12:58:11 -08:00
buffers_defaults_t1.j2 [Profile separation] MMU infrastructure update for TD2 (#12626) 2022-11-17 12:58:11 -08:00
buffers.json.j2 Rename AristaQX-32S skus (#7751) 2021-05-28 22:46:49 -07:00
hwsku-init Rename AristaQX-32S skus (#7751) 2021-05-28 22:46:49 -07:00
pg_profile_lookup.ini [Profile separation] MMU infrastructure update for TD2 (#12626) 2022-11-17 12:58:11 -08:00
port_config.ini Rename AristaQX-32S skus (#7751) 2021-05-28 22:46:49 -07:00
qos.json.j2 [Profile separation] MMU infrastructure update for TD2 (#12626) 2022-11-17 12:58:11 -08:00
RDMA-CENTRIC [Profile separation] MMU infrastructure update for TD2 (#12626) 2022-11-17 12:58:11 -08:00
sai.profile Rename AristaQX-32S skus (#7751) 2021-05-28 22:46:49 -07:00
TCP-CENTRIC [Profile separation] MMU infrastructure update for TD2 (#12626) 2022-11-17 12:58:11 -08:00
td2-a7050-qx32s-32x40G.config.bcm Disable ALPM distributed hitbit thread that is used for debug purpose only but interfered with Other functional operations (#9199) 2021-11-09 07:21:57 -08:00