Nazarii Hnydyn 845bb80a3c [ppi]: Enable global port late create for all Mellanox HWSKUs. (#16945) ... HLD: sonic-net/SONiC#1084 To improve FAST reboot dataplane downtime Signed-off-by: Nazarii Hnydyn <nazariig@nvidia.com>		2023-11-01 21:50:14 -07:00
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buffers_defaults_objects.j2	[Reclaim buffer] Reclaim unused buffers by applying zero buffer profiles (#8768)	2021-11-29 08:04:01 -08:00
buffers_defaults_t0.j2	[Reclaim buffer] Reclaim unused buffers by applying zero buffer profiles (#8768)	2021-11-29 08:04:01 -08:00
buffers_defaults_t1.j2	[Reclaim buffer] Reclaim unused buffers by applying zero buffer profiles (#8768)	2021-11-29 08:04:01 -08:00
buffers_dynamic.json.j2	[Dynamic buffer calc] Support dynamic buffer calculation (#6194)	2020-12-13 11:35:39 -08:00
buffers.json.j2	added files to create SKU Mellanox-SN3800-D24C52 (#4808)	2020-06-21 12:19:11 -07:00
pg_profile_lookup.ini	Support single ingress pool for MSFT SKUs and optimize headroom calculation (#4686)	2020-08-13 13:12:09 +03:00
port_config.ini	[Mellanox] Add NVIDIA Copyright header to "mellanox" files (#8799)	2021-10-17 19:03:02 +03:00
qos.json.j2	added files to create SKU Mellanox-SN3800-D24C52 (#4808)	2020-06-21 12:19:11 -07:00
sai_3800_24x50g_52x100g.xml	[ppi]: Enable global port late create for all Mellanox HWSKUs. (#16945)	2023-11-01 21:50:14 -07:00
sai.profile	[Mellanox][Switching Mode] Enable Store-And-Forward switching mode on specific platforms (#16781)	2023-10-09 19:00:02 +03:00