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sonic-buildimage/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31
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mssonicbld ca123ca2a5
[Arista] Update hwsku.json for Arista-7050QX-32S-S4Q31 (#15251) (#15671) 
* [Arista] Update hwsku.json for Arista-7050QX-32S-S4Q31

* Change to 3x10G(3)+1x1G(1) on Arista-7050QX-32S-S4Q31

Co-authored-by: byu343 <byu@arista.com>
2023-06-30 13:24:54 -07:00
..
BALANCED [Profile separation] MMU infrastructure update for TD2 (#12626) 2022-11-28 18:49:47 +00:00
buffer_ports_t0.j2 [Profile separation] MMU infrastructure update for TD2 (#12626) 2022-11-28 18:49:47 +00:00
buffer_ports_t1.j2 [Profile separation] MMU infrastructure update for TD2 (#12626) 2022-11-28 18:49:47 +00:00
buffers_defaults_t0.j2 [Profile separation] MMU infrastructure update for TD2 (#12626) 2022-11-28 18:49:47 +00:00
buffers_defaults_t1.j2 [Profile separation] MMU infrastructure update for TD2 (#12626) 2022-11-28 18:49:47 +00:00
buffers.json.j2
hwsku-init
hwsku.json [Arista] Update hwsku.json for Arista-7050QX-32S-S4Q31 (#15251) (#15671) 2023-06-30 13:24:54 -07:00
pg_profile_lookup.ini [Profile separation] MMU infrastructure update for TD2 (#12626) 2022-11-28 18:49:47 +00:00
port_config.ini
qos.json.j2 [Profile separation] MMU infrastructure update for TD2 (#12626) 2022-11-28 18:49:47 +00:00
RDMA-CENTRIC [Profile separation] MMU infrastructure update for TD2 (#12626) 2022-11-28 18:49:47 +00:00
sai.profile In SAI 3.5 by default we are supporting 256 Group with 64 Memeber each. (#5400) 2020-09-22 11:21:12 -07:00
TCP-CENTRIC [Profile separation] MMU infrastructure update for TD2 (#12626) 2022-11-28 18:49:47 +00:00
td2-a7050-q31s4-31x40G-4x10G.config.bcm [broadcom]: td2/td3 change cpu cos num to 10 (#9301) 2021-11-17 20:56:46 -08:00