sonic-buildimage/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1
mssonicbld fd6523b423
Fix port index for multi-asic (#13042) (#13086)
Port indexes of front panel ports are not contiguous in multi-asic because we didn't distiguish between
front panel and internal ports, e.g., recycle ports. Fix this by assigning index to front panel port first
and then internal ports.

Co-authored-by: Song Yuan <64041228+ysmanman@users.noreply.github.com>
2022-12-16 14:56:12 -08:00
..
buffers_defaults_t2.j2 Updated Chassis MMU settings for 40G/100G/400G line cards (#11108) 2022-07-05 16:10:50 +00:00
buffers.json.j2 Updated Chassis MMU settings for 40G/100G/400G line cards (#11108) 2022-07-05 16:10:50 +00:00
context_config.json [Arista] Add support for Wolverine linecards (#8887) 2022-05-20 14:11:06 -07:00
j2p-a7800r3a-36d-36x400G.config.bcm Updated config files to disable DLR_INIT capability (#12401) 2022-10-25 20:42:28 +00:00
pg_profile_lookup.ini Updated Chassis MMU settings for 40G/100G/400G line cards (#11108) 2022-07-05 16:10:50 +00:00
port_config.ini Fix port index for multi-asic (#13042) (#13086) 2022-12-16 14:56:12 -08:00
qos.json.j2 Updated Chassis MMU settings for 40G/100G/400G line cards (#11108) 2022-07-05 16:10:50 +00:00
sai.profile [Arista] Add support for Wolverine linecards (#8887) 2022-05-20 14:11:06 -07:00