e286869b24
- Why I did it 1. Update Mellanox HW-MGMT package to newer version V.7.0030.1011 2. Replace the SONiC PMON Thermal control algorithm with the one inside the HW-MGMT package on all Nvidia platforms 3. Support Spectrum-4 systems - How I did it 1. Update the HW-MGMT package version number and submodule pointer 2. Remove the thermal control algorithm implementation from Mellanox platform API 3. Revise the patch to HW-MGMT package which will disable HW-MGMT from running on SIMX 4. Update the downstream kernel patch list Signed-off-by: Kebo Liu <kebol@nvidia.com>
58 lines
2.3 KiB
Diff
58 lines
2.3 KiB
Diff
From 22447625fff0e742b3dc9c2f78bbaac29b1f1031 Mon Sep 17 00:00:00 2001
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From: Vadim Pasternak <vadimp@nvidia.com>
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Date: Sun, 27 Nov 2022 10:43:23 +0200
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Subject: [PATCH backport 5.10 06/10] i2c: mlxcpld: Add support for extended
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transaction length for i2c-mlxcpld
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Add support for extended length of read and write transactions.
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New FPGA logic allows to increase size of the read and write
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transactions length. This feature is verified through capability
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register 'CPBLTY_REG'. Two bits 5 and 6 of the register are used for
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length capability detection. Value '10' indicates support of extended
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transaction length - 128 bytes for read transactions and 132 for write
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transactions.
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Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
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---
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drivers/i2c/busses/i2c-mlxcpld.c | 10 ++++++++++
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1 file changed, 10 insertions(+)
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diff --git a/drivers/i2c/busses/i2c-mlxcpld.c b/drivers/i2c/busses/i2c-mlxcpld.c
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index cd5401ce4..0e1807be7 100644
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--- a/drivers/i2c/busses/i2c-mlxcpld.c
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+++ b/drivers/i2c/busses/i2c-mlxcpld.c
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@@ -22,6 +22,7 @@
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#define MLXCPLD_I2C_BUS_NUM 1
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#define MLXCPLD_I2C_DATA_REG_SZ 36
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#define MLXCPLD_I2C_DATA_SZ_BIT BIT(5)
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+#define MLXCPLD_I2C_DATA_EXT2_SZ_BIT BIT(6)
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#define MLXCPLD_I2C_DATA_SZ_MASK GENMASK(6, 5)
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#define MLXCPLD_I2C_SMBUS_BLK_BIT BIT(7)
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#define MLXCPLD_I2C_MAX_ADDR_LEN 4
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@@ -466,6 +467,13 @@ static const struct i2c_adapter_quirks mlxcpld_i2c_quirks_ext = {
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.max_comb_1st_msg_len = 4,
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};
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+static const struct i2c_adapter_quirks mlxcpld_i2c_quirks_ext2 = {
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+ .flags = I2C_AQ_COMB_WRITE_THEN_READ,
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+ .max_read_len = (MLXCPLD_I2C_DATA_REG_SZ - 4) * 4,
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+ .max_write_len = (MLXCPLD_I2C_DATA_REG_SZ - 4) * 4 + MLXCPLD_I2C_MAX_ADDR_LEN,
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+ .max_comb_1st_msg_len = 4,
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+};
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+
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static struct i2c_adapter mlxcpld_i2c_adapter = {
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.owner = THIS_MODULE,
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.name = "i2c-mlxcpld",
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@@ -550,6 +558,8 @@ static int mlxcpld_i2c_probe(struct platform_device *pdev)
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/* Check support for extended transaction length */
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if ((val & MLXCPLD_I2C_DATA_SZ_MASK) == MLXCPLD_I2C_DATA_SZ_BIT)
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mlxcpld_i2c_adapter.quirks = &mlxcpld_i2c_quirks_ext;
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+ else if ((val & MLXCPLD_I2C_DATA_SZ_MASK) == MLXCPLD_I2C_DATA_EXT2_SZ_BIT)
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+ mlxcpld_i2c_adapter.quirks = &mlxcpld_i2c_quirks_ext2;
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/* Check support for smbus block transaction */
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if (val & MLXCPLD_I2C_SMBUS_BLK_BIT)
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priv->smbus_block = true;
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--
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2.20.1
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