7f4ab8fbd8
Submodule updates include the following commits: * src/sonic-utilities 9dc58ea...f9eb739 (18): > Remove unnecessary calls to str.encode() now that the package is Python 3; Fix deprecation warning (#1260) > [generate_dump] Ignoring file/directory not found Errors (#1201) > Fixed porstat rate and util issues (#1140) > fix error: interface counters is mismatch after warm-reboot (#1099) > Remove unnecessary calls to str.decode() now that the package is Python 3 (#1255) > [acl-loader] Make list sorting compliant with Python 3 (#1257) > Replace hard-coded fast-reboot with variable. And some typo corrections (#1254) > [configlet][portconfig] Remove calls to dict.has_key() which is not available in Python 3 (#1247) > Remove unnecessary conversions to list() and calls to dict.keys() (#1243) > Clean up LGTM alerts (#1239) > Add 'requests' as install dependency in setup.py (#1240) > Convert to Python 3 (#1128) > Fix mock SonicV2Connector in python3: use decode_responses mode so caller code will be the same as python2 (#1238) > [tests] Do not trim from PATH if we did not append to it; Clean up/fix shebangs in scripts (#1233) > Updates to bgp config and show commands with BGP_INTERNAL_NEIGHBOR table (#1224) > [cli]: NAT show commands newline issue after migrated to Python3 (#1204) > [doc]: Update Command-Reference.md (#1231) > Added 'import sys' in feature.py file (#1232) * src/sonic-py-swsssdk 9d9f0c6...1664be9 (2): > Fix: no need to decode() after redis client scan, so it will work for both python2 and python3 (#96) > FieldValueMap `contains`(`in`) will also work when migrated to libswsscommon(C++ with SWIG wrapper) (#94) - Also fix Python 3-related issues: - Use integer (floor) division in config_samples.py (sonic-config-engine) - Replace print statement with print function in eeprom.py plugin for x86_64-kvm_x86_64-r0 platform - Update all platform plugins to be compatible with both Python 2 and Python 3 - Remove shebangs from plugins files which are not intended to be executable - Replace tabs with spaces in Python plugin files and fix alignment, because Python 3 is more strict - Remove trailing whitespace from plugins files
637 lines
21 KiB
Python
637 lines
21 KiB
Python
# sfputil.py
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#
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# Platform-specific SFP transceiver interface for SONiC
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#
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# +-i2c----+--------+
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# | 6 | 7 |
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# | +-------------+ |
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# | |IOM1 | IOM3 | |
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# | |IOM2 | IOM4 | |
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# | +-------------+ |
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# | 8 | 9 |
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# +--------+--------+
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try:
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import time
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import os
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import logging
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import select
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from sonic_sfp.sfputilbase import SfpUtilBase
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except ImportError as e:
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raise ImportError("%s - required module not found" % str(e))
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class SfpUtil(SfpUtilBase):
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"""Platform-specific SfpUtil class"""
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PORT_START = 0
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PORT_END = 63
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PORTS_IN_BLOCK = 64
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_port_to_eeprom_mapping = {}
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_port_to_i2c_mapping = {
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0: [6, 18, 34, 50, 66],
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1: [6, 19, 35, 51, 67],
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2: [6, 20, 36, 52, 68],
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3: [6, 21, 37, 53, 69],
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4: [6, 22, 38, 54, 70],
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5: [6, 23, 39, 55, 71],
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6: [6, 24, 40, 56, 72],
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7: [6, 25, 41, 57, 73],
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8: [6, 26, 42, 58, 74],
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9: [6, 27, 43, 59, 75],
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10: [6, 28, 44, 60, 76],
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11: [6, 29, 45, 61, 77],
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12: [6, 30, 46, 62, 78],
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13: [6, 31, 47, 63, 79],
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14: [6, 32, 48, 64, 80],
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15: [6, 33, 49, 65, 81],
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16: [8, 18, 34, 50, 66],
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17: [8, 19, 35, 51, 67],
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18: [8, 20, 36, 52, 68],
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19: [8, 21, 37, 53, 69],
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20: [8, 22, 38, 54, 70],
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21: [8, 23, 39, 55, 71],
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22: [8, 24, 40, 56, 72],
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23: [8, 25, 41, 57, 73],
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24: [8, 26, 42, 58, 74],
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25: [8, 27, 43, 59, 75],
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26: [8, 28, 44, 60, 76],
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27: [8, 29, 45, 61, 77],
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28: [8, 30, 46, 62, 78],
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29: [8, 31, 47, 63, 79],
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30: [8, 32, 48, 64, 80],
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31: [8, 33, 49, 65, 81],
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32: [7, 18, 34, 50, 66],
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33: [7, 19, 35, 51, 67],
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34: [7, 20, 36, 52, 68],
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35: [7, 21, 37, 53, 69],
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36: [7, 22, 38, 54, 70],
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37: [7, 23, 39, 55, 71],
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38: [7, 24, 40, 56, 72],
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39: [7, 25, 41, 57, 73],
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40: [7, 26, 42, 58, 74],
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41: [7, 27, 43, 59, 75],
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42: [7, 28, 44, 60, 76],
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43: [7, 29, 45, 61, 77],
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44: [7, 30, 46, 62, 78],
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45: [7, 31, 47, 63, 79],
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46: [7, 32, 48, 64, 80],
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47: [7, 33, 49, 65, 81],
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48: [9, 18, 34, 50, 66],
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49: [9, 19, 35, 51, 67],
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50: [9, 20, 36, 52, 68],
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51: [9, 21, 37, 53, 69],
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52: [9, 22, 38, 54, 70],
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53: [9, 23, 39, 55, 71],
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54: [9, 24, 40, 56, 72],
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55: [9, 25, 41, 57, 73],
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56: [9, 26, 42, 58, 74],
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57: [9, 27, 43, 59, 75],
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58: [9, 28, 44, 60, 76],
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59: [9, 29, 45, 61, 77],
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60: [9, 30, 46, 62, 78],
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61: [9, 31, 47, 63, 79],
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62: [9, 32, 48, 64, 80],
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63: [9, 33, 49, 65, 81]
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}
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IOM_1_PORT_START = 0
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IOM_1_PORT_END = 15
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IOM_2_PORT_START = 16
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IOM_2_PORT_END = 31
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IOM_3_PORT_START = 32
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IOM_3_PORT_END = 47
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IOM_4_PORT_START = 48
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IOM_4_PORT_END = 63
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BASE_VAL_PATH = "/sys/class/i2c-adapter/i2c-{0}/{0}-003e/"
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OIR_FD_PATH = "/sys/devices/platform/dell_ich.0/sci_int_gpio_sus6"
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oir_fd = -1
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epoll = -1
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@property
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def port_start(self):
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return self.PORT_START
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@property
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def port_end(self):
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return self.PORT_END
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@property
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def qsfp_ports(self):
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return list(range(0, self.PORTS_IN_BLOCK + 1))
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@property
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def iom1_port_start(self):
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return self.IOM_1_PORT_START
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@property
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def iom1_port_end(self):
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return self.IOM_1_PORT_END
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@property
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def iom2_port_start(self):
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return self.IOM_2_PORT_START
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@property
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def iom2_port_end(self):
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return self.IOM_2_PORT_END
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@property
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def iom3_port_start(self):
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return self.IOM_3_PORT_START
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@property
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def iom3_port_end(self):
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return self.IOM_3_PORT_END
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@property
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def iom4_port_start(self):
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return self.IOM_4_PORT_START
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@property
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def iom4_port_end(self):
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return self.IOM_4_PORT_END
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@property
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def port_to_eeprom_mapping(self):
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return self._port_to_eeprom_mapping
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@property
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def port_to_i2c_mapping(self):
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return self._port_to_i2c_mapping
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def __init__(self):
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eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/i2c-{1}/{1}-0050/eeprom"
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global port_to_eeprom_path
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for port_num in range(0, self.port_end + 1):
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if port_num >= self.iom1_port_start and port_num <=\
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self.iom1_port_end:
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assigned = 0
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# i2c-6
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for x in range(1, 5):
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port_to_eeprom_path = eeprom_path.format(
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self.port_to_i2c_mapping[port_num][0],
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self.port_to_i2c_mapping[port_num][x])
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if (os.path.isfile(port_to_eeprom_path)):
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self.port_to_eeprom_mapping[port_num] =\
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port_to_eeprom_path
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assigned = 1
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elif (not assigned):
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self.port_to_eeprom_mapping[port_num] =\
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"No IOM"
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elif(port_num >= self.iom2_port_start and
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port_num <= self.iom2_port_end):
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assigned = 0
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# i2c-8
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for x in range(1, 5):
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port_to_eeprom_path = eeprom_path.format(
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self.port_to_i2c_mapping[port_num][0],
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self.port_to_i2c_mapping[port_num][x])
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if (os.path.isfile(port_to_eeprom_path)):
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self.port_to_eeprom_mapping[port_num] =\
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port_to_eeprom_path
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assigned = 1
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elif (not assigned):
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self.port_to_eeprom_mapping[port_num] =\
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"No IOM"
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elif(port_num >= self.iom3_port_start and port_num <=
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self.iom3_port_end):
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assigned = 0
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# i2c-7
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for x in range(1, 5):
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port_to_eeprom_path = eeprom_path.format(
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self.port_to_i2c_mapping[port_num][0],
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self.port_to_i2c_mapping[port_num][x])
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if (os.path.isfile(port_to_eeprom_path)):
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self.port_to_eeprom_mapping[port_num] =\
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port_to_eeprom_path
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assigned = 1
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elif (not assigned):
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self.port_to_eeprom_mapping[port_num] =\
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"No IOM"
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elif(port_num >= self.iom4_port_start and port_num <=
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self.iom4_port_end):
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assigned = 0
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# i2c-9
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for x in range(1, 5):
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port_to_eeprom_path = eeprom_path.format(
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self.port_to_i2c_mapping[port_num][0],
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self.port_to_i2c_mapping[port_num][x])
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if (os.path.isfile(port_to_eeprom_path)):
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self.port_to_eeprom_mapping[port_num] =\
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port_to_eeprom_path
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assigned = 1
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elif (not assigned):
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self.port_to_eeprom_mapping[port_num] =\
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"No IOM"
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SfpUtilBase.__init__(self)
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def __del__(self):
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if self.oir_fd != -1:
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self.epoll.unregister(self.oir_fd.fileno())
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self.epoll.close()
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self.oir_fd.close()
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def get_presence(self, port_num):
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global i2c_line
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# Check for invalid port_num
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if port_num < self.port_start or port_num > self.port_end:
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return False
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# port_num and i2c match
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if(port_num >= self.iom1_port_start and port_num <=
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self.iom1_port_end):
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i2c_line = 14
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elif(port_num >= self.iom2_port_start and port_num <=
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self.iom2_port_end):
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i2c_line = 16
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elif(port_num >= self.iom3_port_start and port_num <=
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self.iom3_port_end):
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i2c_line = 15
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elif(port_num >= self.iom4_port_start and port_num <=
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self.iom4_port_end):
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i2c_line = 17
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try:
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qsfp_path = self.BASE_VAL_PATH.format(i2c_line)+"qsfp_modprs"
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reg_file = open(qsfp_path, "r")
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except IOError as e:
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print("Error: unable to open file: %s" % str(e))
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return False
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content = reg_file.readline().rstrip()
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# Absence of IOM throws read error
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if (content == 'read error'):
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return False
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# content is a string containing the hex representation of the register
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reg_value = int(content, 16)
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# Rationalize port settings
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if port_num > 15:
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port_num = port_num % 16
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# Mask off the bit corresponding to our port
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mask = (1 << port_num)
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# ModPrsL is active low
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if reg_value & mask == 0:
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return True
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return False
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def get_low_power_mode(self, port_num):
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# Check for invalid port_num
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if port_num < self.port_start or port_num > self.port_end:
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return False
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# port_num and i2c match
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if(port_num >= self.iom1_port_start and port_num <=
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self.iom1_port_end):
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i2c_line = 14
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elif(port_num >= self.iom2_port_start and port_num <=
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self.iom2_port_end):
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i2c_line = 16
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elif(port_num >= self.iom3_port_start and port_num <=
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self.iom3_port_end):
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i2c_line = 15
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elif(port_num >= self.iom4_port_start and port_num <=
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self.iom4_port_end):
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i2c_line = 17
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try:
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qsfp_path = self.BASE_VAL_PATH.format(i2c_line)+"qsfp_lpmode"
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reg_file = open(qsfp_path, "r")
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except IOError as e:
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print("Error: unable to open file: %s" % str(e))
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return False
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content = reg_file.readline().rstrip()
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# Absence of IOM throws read error
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if (content == 'read error'):
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return False
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# content is a string containing the hex representation of the register
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reg_value = int(content, 16)
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# Rationalize port settings
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if port_num > 15:
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port_num = port_num % 16
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# Mask off the bit corresponding to our port
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mask = (1 << port_num)
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# LPMode is active high
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if reg_value & mask == 0:
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return False
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return True
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def set_low_power_mode(self, port_num, lpmode):
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# Check for invalid port_num
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if port_num < self.port_start or port_num > self.port_end:
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return False
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# port_num and i2c match
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if(port_num >= self.iom1_port_start and port_num <=
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self.iom1_port_end):
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i2c_line = 14
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elif(port_num >= self.iom2_port_start and port_num <=
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self.iom2_port_end):
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i2c_line = 16
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elif(port_num >= self.iom3_port_start and port_num <=
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self.iom3_port_end):
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i2c_line = 15
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elif(port_num >= self.iom4_port_start and port_num <=
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self.iom4_port_end):
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i2c_line = 17
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try:
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qsfp_path = self.BASE_VAL_PATH.format(i2c_line)+"qsfp_lpmode"
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reg_file = open(qsfp_path, "r+")
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except IOError as e:
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print("Error: unable to open file: %s" % str(e))
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return False
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content = reg_file.readline().rstrip()
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# Absence of IOM throws read error
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if (content == 'read error'):
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return False
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# content is a string containing the hex representation of the register
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reg_value = int(content, 16)
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# Rationalize port settings
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if port_num > 15:
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port_num = port_num % 16
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# Mask off the bit corresponding to our port
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mask = (1 << port_num)
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# LPMode is active high; set or clear the bit accordingly
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if lpmode is True:
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reg_value = reg_value | mask
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else:
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reg_value = reg_value & ~mask
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# Convert our register value back to a hex string and write back
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content = hex(reg_value)
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reg_file.seek(0)
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reg_file.write(content)
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reg_file.close()
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return True
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def reset(self, port_num):
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global i2c_line
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# Check for invalid port_num
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if port_num < self.port_start or port_num > self.port_end:
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return False
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# port_num and i2c match
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if(port_num >= self.iom1_port_start and port_num <=
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self.iom1_port_end):
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i2c_line = 14
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elif(port_num >= self.iom2_port_start and port_num <=
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self.iom2_port_end):
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i2c_line = 16
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elif(port_num >= self.iom3_port_start and port_num <=
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self.iom3_port_end):
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i2c_line = 15
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elif(port_num >= self.iom4_port_start and port_num <=
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self.iom4_port_end):
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i2c_line = 17
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try:
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qsfp_path = self.BASE_VAL_PATH.format(i2c_line)+"qsfp_lpmode"
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reg_file = open(qsfp_path, "r+")
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except IOError as e:
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print("Error: unable to open file: %s" % str(e))
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return False
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content = reg_file.readline().rstrip()
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# Absence of IOM throws read error
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if (content == 'read error'):
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print("it's empty")
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return False
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# File content is a string containing the hex representation
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# of the register
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reg_value = int(content, 16)
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# Rationalize port settings
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if port_num > 15:
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port_num = port_num % 16
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# Mask off the bit corresponding to our port
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mask = (1 << port_num)
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# ResetL is active low
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reg_value = reg_value & ~mask
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# Convert our register value back to a hex string and write back
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reg_file.seek(0)
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reg_file.write(hex(reg_value))
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reg_file.close()
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# Sleep 1 second to allow it to settle
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time.sleep(1)
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# Flip the bit back high and write back to the register to take port
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# out of reset
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try:
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qsfp_path = self.BASE_VAL_PATH.format(i2c_line)+"qsfp_lpmode"
|
|
reg_file = open(qsfp_path, "w")
|
|
|
|
except IOError as e:
|
|
print("Error: unable to open file: %s" % str(e))
|
|
return False
|
|
|
|
reg_value = reg_value | mask
|
|
reg_file.seek(0)
|
|
reg_file.write(hex(reg_value))
|
|
reg_file.close()
|
|
|
|
return True
|
|
|
|
def get_register(self, reg_file):
|
|
retval = 'ERR'
|
|
|
|
if (not os.path.isfile(reg_file)):
|
|
print(reg_file + ' not found !')
|
|
return retval
|
|
|
|
try:
|
|
with open(reg_file, 'r') as fd:
|
|
retval = fd.read()
|
|
except Exception as error:
|
|
logging.error("Unable to open ", reg_file, "file !")
|
|
|
|
retval = retval.rstrip('\r\n')
|
|
retval = retval.lstrip(" ")
|
|
return retval
|
|
|
|
def check_interrupts(self, port_dict):
|
|
retval = 0
|
|
is_port_dict_updated = False
|
|
|
|
# Read the QSFP ABS interrupt & status registers
|
|
cpld2_abs_int = self.get_register(
|
|
"/sys/class/i2c-adapter/i2c-14/14-003e/qsfp_abs_int")
|
|
cpld2_abs_sta = self.get_register(
|
|
"/sys/class/i2c-adapter/i2c-14/14-003e/qsfp_abs_sta")
|
|
cpld3_abs_int = self.get_register(
|
|
"/sys/class/i2c-adapter/i2c-15/15-003e/qsfp_abs_int")
|
|
cpld3_abs_sta = self.get_register(
|
|
"/sys/class/i2c-adapter/i2c-15/15-003e/qsfp_abs_sta")
|
|
cpld4_abs_int = self.get_register(
|
|
"/sys/class/i2c-adapter/i2c-16/16-003e/qsfp_abs_int")
|
|
cpld4_abs_sta = self.get_register(
|
|
"/sys/class/i2c-adapter/i2c-16/16-003e/qsfp_abs_sta")
|
|
cpld5_abs_int = self.get_register(
|
|
"/sys/class/i2c-adapter/i2c-17/17-003e/qsfp_abs_int")
|
|
cpld5_abs_sta = self.get_register(
|
|
"/sys/class/i2c-adapter/i2c-17/17-003e/qsfp_abs_sta")
|
|
|
|
if (cpld2_abs_int == 'ERR' or cpld2_abs_sta == 'ERR' or
|
|
cpld3_abs_int == 'ERR' or cpld3_abs_sta == 'ERR' or
|
|
cpld4_abs_int == 'ERR' or cpld4_abs_sta == 'ERR' or
|
|
cpld5_abs_int == 'ERR' or cpld5_abs_sta == 'ERR'):
|
|
return -1
|
|
|
|
# If IOM is not present, interrupt will return 'read error'
|
|
# Handle the scenario gracefully
|
|
if (cpld2_abs_int == 'read error'):
|
|
cpld2_abs_int = "0x0"
|
|
cpld2_abs_sta = "0x0"
|
|
if (cpld3_abs_int == 'read error'):
|
|
cpld3_abs_int = "0x0"
|
|
cpld3_abs_sta = "0x0"
|
|
if (cpld4_abs_int == 'read error'):
|
|
cpld4_abs_int = "0x0"
|
|
cpld4_abs_sta = "0x0"
|
|
if (cpld5_abs_int == 'read error'):
|
|
cpld5_abs_int = "0x0"
|
|
cpld5_abs_sta = "0x0"
|
|
|
|
cpld2_abs_int = int(cpld2_abs_int, 16)
|
|
cpld2_abs_sta = int(cpld2_abs_sta, 16)
|
|
cpld3_abs_int = int(cpld3_abs_int, 16)
|
|
cpld3_abs_sta = int(cpld3_abs_sta, 16)
|
|
cpld4_abs_int = int(cpld4_abs_int, 16)
|
|
cpld4_abs_sta = int(cpld4_abs_sta, 16)
|
|
cpld5_abs_int = int(cpld5_abs_int, 16)
|
|
cpld5_abs_sta = int(cpld5_abs_sta, 16)
|
|
|
|
# Make it contiguous
|
|
interrupt_reg = (cpld2_abs_int & 0xffff) | \
|
|
((cpld4_abs_int & 0xffff) << 16) | \
|
|
((cpld3_abs_int & 0xffff) << 32) | \
|
|
((cpld5_abs_int & 0xffff) << 48)
|
|
status_reg = (cpld2_abs_sta & 0xffff) | \
|
|
((cpld4_abs_sta & 0xffff) << 16) | \
|
|
((cpld3_abs_sta & 0xffff) << 32) | \
|
|
((cpld5_abs_sta & 0xffff) << 48)
|
|
|
|
port = self.port_start
|
|
while port <= self.port_end:
|
|
if interrupt_reg & (1 << port):
|
|
# update only if atleast one port has generated
|
|
# interrupt
|
|
is_port_dict_updated = True
|
|
if status_reg & (1 << port):
|
|
# status reg 1 => optics is removed
|
|
port_dict[port] = '0'
|
|
else:
|
|
# status reg 0 => optics is inserted
|
|
port_dict[port] = '1'
|
|
port += 1
|
|
return retval, is_port_dict_updated
|
|
|
|
def get_transceiver_change_event(self, timeout=0):
|
|
port_dict = {}
|
|
try:
|
|
# We get notified when there is an SCI interrupt from GPIO SUS6
|
|
# Open the sysfs file and register the epoll object
|
|
self.oir_fd = open(self.OIR_FD_PATH, "r")
|
|
if self.oir_fd != -1:
|
|
# Do a dummy read before epoll register
|
|
self.oir_fd.read()
|
|
self.epoll = select.epoll()
|
|
self.epoll.register(self.oir_fd.fileno(),
|
|
select.EPOLLIN & select.EPOLLET)
|
|
else:
|
|
print("get_transceiver_change_event : unable to create fd")
|
|
return False, {}
|
|
|
|
# Check for missed interrupts by invoking self.check_interrupts
|
|
# which will update the port_dict.
|
|
while True:
|
|
interrupt_count_start = self.get_register(self.OIR_FD_PATH)
|
|
|
|
retval, is_port_dict_updated = \
|
|
self.check_interrupts(port_dict)
|
|
if ((retval == 0) and (is_port_dict_updated is True)):
|
|
return True, port_dict
|
|
|
|
interrupt_count_end = self.get_register(self.OIR_FD_PATH)
|
|
|
|
if (interrupt_count_start == 'ERR' or
|
|
interrupt_count_end == 'ERR'):
|
|
print("get_transceiver_change_event : \
|
|
unable to retrive interrupt count")
|
|
break
|
|
|
|
# check_interrupts() itself may take upto 100s of msecs.
|
|
# We detect a missed interrupt based on the count
|
|
if interrupt_count_start == interrupt_count_end:
|
|
break
|
|
|
|
# Block until an xcvr is inserted or removed with timeout = -1
|
|
events = self.epoll.poll(
|
|
timeout=timeout if timeout != 0 else -1)
|
|
if events:
|
|
# check interrupts and return the port_dict
|
|
retval, is_port_dict_updated = \
|
|
self.check_interrupts(port_dict)
|
|
if (retval != 0):
|
|
return False, {}
|
|
|
|
return True, port_dict
|
|
except:
|
|
return False, {}
|
|
finally:
|
|
if self.oir_fd != -1:
|
|
self.epoll.unregister(self.oir_fd.fileno())
|
|
self.epoll.close()
|
|
self.oir_fd.close()
|
|
self.oir_fd = -1
|
|
self.epoll = -1
|
|
|
|
return False, {}
|