609cbdd0f3
* [Juniper] Platform bug fixes / improvements
This patch set introduces the following changes for
the two platforms.
- QFX5210
- Fixes a driver bug related to reboot notifier
- Disable pcied
- Introduces a wrapper script for fast / warm reboots
for unloading the driver containing reboot handler
- Support for PSM4 optics in media_settings
- QFX5200
- BCM configuration file updates
- Bug fixes for EM policy
- Fixes a driver bug related to reboot notifier
- Introduces a wrapper script for fast / warm reboots
for unloading the driver containing reboot handler
- Disable pcied
- Support for PSM4 optics
Signed-off-by: Ciju Rajan K <crajank@juniper.net>
587 lines
14 KiB
Plaintext
587 lines
14 KiB
Plaintext
phy_xaui_tx_polarity_flip_99=0x01
|
|
portmap_120=115:25:50:i
|
|
portmap_112=107:25:50:i
|
|
portmap_104=99:25:50:i
|
|
portmap_8=8:25:i
|
|
xgxs_rx_lane_map_20=0x3120
|
|
xgxs_rx_lane_map_12=0x2301
|
|
l2mod_dma_intr_enable=1
|
|
xgxs_tx_lane_map_40=0x0123
|
|
xgxs_tx_lane_map_32=0x0213
|
|
xgxs_tx_lane_map_24=0x2310
|
|
xgxs_tx_lane_map_16=0x1023
|
|
port_phy_addr_99=0xff
|
|
rate_ext_mdio_divisor=0x80
|
|
portmap_121=116:25:i
|
|
portmap_113=108:25:i
|
|
portmap_105=100:25:i
|
|
portmap_9=9:100
|
|
xgxs_rx_lane_map_21=0x3120
|
|
xgxs_rx_lane_map_13=0x0213
|
|
tslam_timeout_usec=10000000
|
|
xgxs_tx_lane_map_41=0x0123
|
|
xgxs_tx_lane_map_25=0x0213
|
|
xgxs_tx_lane_map_17=0x0213
|
|
portmap_130=125:100
|
|
portmap_122=117:100
|
|
portmap_114=109:100
|
|
xgxs_rx_lane_map_30=0x2301
|
|
portmap_106=101:100
|
|
xgxs_rx_lane_map_22=0x3120
|
|
xgxs_rx_lane_map_14=0x0213
|
|
xgxs_tx_lane_map_50=0x0213
|
|
xgxs_tx_lane_map_42=0x2310
|
|
xgxs_tx_lane_map_34=0x0123
|
|
phy_xaui_rx_polarity_flip_20=0x01
|
|
xgxs_tx_lane_map_26=0x0213
|
|
xgxs_tx_lane_map_18=0x0213
|
|
portmap_10=10:25:i
|
|
xgxs_tx_lane_map_1=0x3120
|
|
portmap_131=126:25:i
|
|
portmap_123=118:25:i
|
|
portmap_115=110:25:i
|
|
xgxs_rx_lane_map_31=0x2301
|
|
portmap_107=102:25:i
|
|
xgxs_rx_lane_map_23=0x3120
|
|
xgxs_rx_lane_map_15=0x0213
|
|
xgxs_tx_lane_map_51=0x0213
|
|
xgxs_tx_lane_map_43=0x2310
|
|
xgxs_tx_lane_map_35=0x0123
|
|
phy_xaui_rx_polarity_flip_21=0x03
|
|
xgxs_tx_lane_map_27=0x0213
|
|
phy_xaui_rx_polarity_flip_13=0x0c
|
|
xgxs_tx_lane_map_19=0x0213
|
|
portmap_11=11:25:50:i
|
|
xgxs_tx_lane_map_2=0x3120
|
|
xgxs_tx_lane_map_110=0x1203
|
|
xgxs_tx_lane_map_102=0x1203
|
|
parity_correction=1
|
|
portmap_132=127:25:50:i
|
|
portmap_124=119:25:50:i
|
|
portmap_116=111:25:50:i
|
|
xgxs_rx_lane_map_40=0x2310
|
|
xgxs_rx_lane_map_32=0x2301
|
|
portmap_108=103:25:50:i
|
|
xgxs_rx_lane_map_24=0x3120
|
|
xgxs_rx_lane_map_16=0x0213
|
|
xgxs_tx_lane_map_60=0x0213
|
|
xgxs_tx_lane_map_52=0x0213
|
|
xgxs_tx_lane_map_44=0x2310
|
|
xgxs_tx_lane_map_36=0x0123
|
|
phy_xaui_rx_polarity_flip_22=0x01
|
|
xgxs_tx_lane_map_28=0x0213
|
|
portmap_20=20:25:i
|
|
portmap_12=12:25:i
|
|
xgxs_tx_lane_map_3=0x3120
|
|
xgxs_tx_lane_map_111=0x1203
|
|
xgxs_tx_lane_map_103=0x1203
|
|
portmap_133=128:25:i
|
|
portmap_125=120:25:i
|
|
portmap_117=112:25:i
|
|
xgxs_rx_lane_map_41=0x2310
|
|
portmap_109=104:25:i
|
|
xgxs_rx_lane_map_25=0x3210
|
|
xgxs_rx_lane_map_17=0x3120
|
|
xgxs_tx_lane_map_61=0x0213
|
|
xgxs_tx_lane_map_53=0x0213
|
|
xgxs_tx_lane_map_45=0x2310
|
|
xgxs_tx_lane_map_37=0x0123
|
|
xgxs_tx_lane_map_29=0x0213
|
|
phy_xaui_rx_polarity_flip_15=0x03
|
|
portmap_21=21:100
|
|
portmap_13=13:100
|
|
xgxs_rx_lane_map_110=0x2301
|
|
xgxs_rx_lane_map_102=0x2301
|
|
xgxs_tx_lane_map_4=0x3120
|
|
xgxs_tx_lane_map_120=0x1203
|
|
xgxs_tx_lane_map_112=0x1203
|
|
xgxs_tx_lane_map_104=0x1203
|
|
bcm_stat_interval=500000
|
|
l2xmsg_hostbuf_size=16384
|
|
portmap_126=121:100
|
|
xgxs_rx_lane_map_50=0x0231
|
|
portmap_118=113:100
|
|
xgxs_rx_lane_map_42=0x3201
|
|
xgxs_rx_lane_map_34=0x3102
|
|
xgxs_rx_lane_map_26=0x3210
|
|
xgxs_rx_lane_map_18=0x3120
|
|
xgxs_tx_lane_map_70=0x3120
|
|
xgxs_tx_lane_map_62=0x2310
|
|
xgxs_tx_lane_map_54=0x2310
|
|
phy_xaui_rx_polarity_flip_40=0x01
|
|
xgxs_tx_lane_map_46=0x2013
|
|
xgxs_tx_lane_map_38=0x0123
|
|
portmap_30=30:25:i
|
|
phy_xaui_rx_polarity_flip_16=0x01
|
|
portmap_22=22:25:i
|
|
portmap_14=14:25:i
|
|
xgxs_rx_lane_map_111=0x2301
|
|
xgxs_rx_lane_map_103=0x2301
|
|
xgxs_tx_lane_map_5=0x1023
|
|
xgxs_tx_lane_map_121=0x1203
|
|
xgxs_tx_lane_map_113=0x1203
|
|
xgxs_tx_lane_map_105=0x1203
|
|
port_phy_addr_10=0xff
|
|
mem_check_nocache_override=1
|
|
bcm_stat_flags=1
|
|
portmap_127=122:25:i
|
|
xgxs_rx_lane_map_51=0x0231
|
|
portmap_119=114:25:i
|
|
xgxs_rx_lane_map_43=0x3201
|
|
xgxs_rx_lane_map_35=0x3102
|
|
xgxs_rx_lane_map_27=0x3210
|
|
xgxs_rx_lane_map_19=0x3120
|
|
xgxs_tx_lane_map_71=0x3120
|
|
xgxs_tx_lane_map_63=0x2310
|
|
phy_xaui_tx_polarity_flip_11=0x02
|
|
xgxs_tx_lane_map_55=0x2310
|
|
xgxs_tx_lane_map_47=0x2013
|
|
xgxs_tx_lane_map_39=0x0123
|
|
phy_xaui_rx_polarity_flip_25=0x0c
|
|
portmap_31=31:25:50:i
|
|
phy_xaui_rx_polarity_flip_17=0x08
|
|
portmap_23=23:25:50:i
|
|
portmap_15=15:25:50:i
|
|
xgxs_rx_lane_map_120=0x3120
|
|
xgxs_rx_lane_map_112=0x2301
|
|
xgxs_rx_lane_map_104=0x2301
|
|
xgxs_tx_lane_map_6=0x1023
|
|
xgxs_tx_lane_map_130=0x3201
|
|
xgxs_tx_lane_map_122=0x1023
|
|
xgxs_tx_lane_map_114=0x0132
|
|
xgxs_tx_lane_map_106=0x0132
|
|
port_phy_addr_11=0xff
|
|
xgxs_rx_lane_map_60=0x0231
|
|
portmap_128=123:25:50:i
|
|
xgxs_rx_lane_map_52=0x0231
|
|
xgxs_rx_lane_map_44=0x3201
|
|
xgxs_rx_lane_map_36=0x3102
|
|
xgxs_rx_lane_map_28=0x3210
|
|
xgxs_tx_lane_map_80=0x3102
|
|
xgxs_tx_lane_map_72=0x2310
|
|
xgxs_tx_lane_map_64=0x2310
|
|
phy_xaui_tx_polarity_flip_12=0x01
|
|
xgxs_tx_lane_map_56=0x2310
|
|
phy_xaui_rx_polarity_flip_42=0x04
|
|
xgxs_tx_lane_map_48=0x2013
|
|
phy_xaui_rx_polarity_flip_34=0x08
|
|
portmap_40=39:25:50:i
|
|
xgxs_rx_lane_map_1=0x3201
|
|
portmap_32=32:25:i
|
|
portmap_24=24:25:i
|
|
portmap_16=16:25:i
|
|
xgxs_rx_lane_map_121=0x3120
|
|
xgxs_rx_lane_map_113=0x2301
|
|
xgxs_rx_lane_map_105=0x2301
|
|
xgxs_tx_lane_map_7=0x1023
|
|
xgxs_tx_lane_map_131=0x3201
|
|
xgxs_tx_lane_map_123=0x1023
|
|
xgxs_tx_lane_map_115=0x0132
|
|
xgxs_tx_lane_map_107=0x0132
|
|
port_phy_addr_20=0xff
|
|
port_phy_addr_12=0xff
|
|
xgxs_rx_lane_map_61=0x0231
|
|
portmap_129=124:25:i
|
|
xgxs_rx_lane_map_53=0x0231
|
|
xgxs_rx_lane_map_45=0x3201
|
|
xgxs_rx_lane_map_37=0x3102
|
|
xgxs_rx_lane_map_29=0x2301
|
|
xgxs_tx_lane_map_81=0x3102
|
|
xgxs_tx_lane_map_73=0x2310
|
|
phy_xaui_tx_polarity_flip_21=0x04
|
|
xgxs_tx_lane_map_65=0x2310
|
|
xgxs_tx_lane_map_57=0x2310
|
|
xgxs_tx_lane_map_49=0x2013
|
|
portmap_41=40:25:i
|
|
phy_xaui_rx_polarity_flip_27=0x03
|
|
xgxs_rx_lane_map_2=0x3201
|
|
phy_xaui_rx_polarity_flip_19=0x02
|
|
portmap_25=25:100
|
|
portmap_17=17:100
|
|
xgxs_rx_lane_map_130=0x3210
|
|
xgxs_rx_lane_map_122=0x1023
|
|
xgxs_rx_lane_map_114=0x2301
|
|
xgxs_rx_lane_map_106=0x2301
|
|
xgxs_tx_lane_map_8=0x1023
|
|
xgxs_tx_lane_map_132=0x3201
|
|
xgxs_tx_lane_map_124=0x1023
|
|
xgxs_tx_lane_map_116=0x0132
|
|
xgxs_tx_lane_map_108=0x0132
|
|
phy_xaui_rx_polarity_flip_114=0x07
|
|
xgxs_rx_lane_map_70=0x0213
|
|
xgxs_rx_lane_map_62=0x2310
|
|
xgxs_rx_lane_map_54=0x2301
|
|
xgxs_rx_lane_map_46=0x3012
|
|
xgxs_rx_lane_map_38=0x2310
|
|
xgxs_tx_lane_map_90=0x0123
|
|
xgxs_tx_lane_map_82=0x3102
|
|
xgxs_tx_lane_map_74=0x2310
|
|
xgxs_tx_lane_map_58=0x0213
|
|
phy_xaui_rx_polarity_flip_44=0x01
|
|
portmap_50=49:100
|
|
phy_xaui_rx_polarity_flip_36=0x02
|
|
portmap_42=41:100
|
|
phy_xaui_rx_polarity_flip_28=0x01
|
|
xgxs_rx_lane_map_3=0x3201
|
|
portmap_34=33:100
|
|
portmap_26=26:25:i
|
|
portmap_18=18:25:i
|
|
xgxs_rx_lane_map_131=0x3210
|
|
xgxs_rx_lane_map_123=0x1023
|
|
xgxs_rx_lane_map_115=0x2301
|
|
xgxs_rx_lane_map_107=0x2301
|
|
xgxs_tx_lane_map_9=0x3120
|
|
xgxs_tx_lane_map_133=0x3201
|
|
xgxs_tx_lane_map_125=0x1023
|
|
bcm_linkscan_interval=4000000
|
|
xgxs_tx_lane_map_117=0x0132
|
|
xgxs_tx_lane_map_109=0x0132
|
|
phy_xaui_rx_polarity_flip_115=0x01
|
|
port_phy_addr_30=0xff
|
|
port_phy_addr_22=0xff
|
|
port_phy_addr_14=0xff
|
|
xgxs_rx_lane_map_71=0x0213
|
|
xgxs_rx_lane_map_63=0x2310
|
|
xgxs_rx_lane_map_55=0x2301
|
|
xgxs_rx_lane_map_47=0x3012
|
|
xgxs_rx_lane_map_39=0x2310
|
|
xgxs_tx_lane_map_91=0x0123
|
|
xgxs_tx_lane_map_83=0x3102
|
|
phy_xaui_tx_polarity_flip_31=0x02
|
|
xgxs_tx_lane_map_75=0x2310
|
|
phy_xaui_tx_polarity_flip_23=0x01
|
|
xgxs_tx_lane_map_59=0x0213
|
|
portmap_51=50:25:i
|
|
phy_xaui_rx_polarity_flip_37=0x01
|
|
portmap_43=42:25:i
|
|
xgxs_rx_lane_map_4=0x3201
|
|
portmap_35=34:25:i
|
|
portmap_27=27:25:50:i
|
|
portmap_19=19:25:50:i
|
|
xgxs_rx_lane_map_132=0x3210
|
|
xgxs_rx_lane_map_124=0x1023
|
|
xgxs_rx_lane_map_116=0x2301
|
|
cdma_timeout_usec=4000000
|
|
xgxs_rx_lane_map_108=0x2301
|
|
xgxs_tx_lane_map_126=0x3120
|
|
xgxs_tx_lane_map_118=0x1203
|
|
phy_xaui_rx_polarity_flip_116=0x01
|
|
port_phy_addr_31=0xff
|
|
port_phy_addr_23=0xff
|
|
port_phy_addr_15=0xff
|
|
xgxs_rx_lane_map_80=0x3210
|
|
xgxs_rx_lane_map_72=0x2310
|
|
xgxs_rx_lane_map_64=0x2310
|
|
xgxs_rx_lane_map_56=0x2301
|
|
xgxs_rx_lane_map_48=0x3012
|
|
xgxs_tx_lane_map_92=0x0213
|
|
phy_xaui_tx_polarity_flip_40=0x01
|
|
xgxs_tx_lane_map_84=0x0213
|
|
phy_xaui_tx_polarity_flip_32=0x01
|
|
xgxs_tx_lane_map_76=0x0213
|
|
xgxs_tx_lane_map_68=0x3120
|
|
portmap_60=59:25:50:i
|
|
phy_xaui_rx_polarity_flip_46=0x08
|
|
portmap_52=51:25:50:i
|
|
phy_xaui_rx_polarity_flip_38=0x04
|
|
portmap_44=43:25:50:i
|
|
xgxs_rx_lane_map_5=0x1023
|
|
portmap_36=35:25:50:i
|
|
portmap_28=28:25:i
|
|
mdio_output_delay=12
|
|
xgxs_rx_lane_map_133=0x3210
|
|
xgxs_rx_lane_map_125=0x1023
|
|
xgxs_rx_lane_map_117=0x2301
|
|
xgxs_rx_lane_map_109=0x2301
|
|
xgxs_tx_lane_map_127=0x3120
|
|
xgxs_tx_lane_map_119=0x1203
|
|
port_phy_addr_40=0xff
|
|
port_phy_addr_32=0xff
|
|
port_phy_addr_24=0xff
|
|
port_phy_addr_16=0xff
|
|
xgxs_rx_lane_map_81=0x3210
|
|
xgxs_rx_lane_map_73=0x2310
|
|
tdma_timeout_usec=10000000
|
|
xgxs_rx_lane_map_65=0x2310
|
|
xgxs_rx_lane_map_57=0x2301
|
|
xgxs_rx_lane_map_49=0x3012
|
|
xgxs_tx_lane_map_93=0x0213
|
|
xgxs_tx_lane_map_85=0x0213
|
|
xgxs_tx_lane_map_77=0x0213
|
|
phy_xaui_tx_polarity_flip_25=0x0d
|
|
xgxs_tx_lane_map_69=0x3120
|
|
portmap_61=60:25:i
|
|
portmap_53=52:25:i
|
|
portmap_45=44:25:i
|
|
xgxs_rx_lane_map_6=0x1023
|
|
portmap_37=36:25:i
|
|
portmap_29=29:100
|
|
xgxs_rx_lane_map_126=0x2301
|
|
xgxs_rx_lane_map_118=0x3120
|
|
xgxs_tx_lane_map_128=0x3120
|
|
port_phy_addr_41=0xff
|
|
ipv6_lpm_128b_enable=1
|
|
xgxs_rx_lane_map_90=0x3210
|
|
xgxs_rx_lane_map_82=0x3210
|
|
xgxs_rx_lane_map_74=0x2310
|
|
xgxs_rx_lane_map_58=0x0231
|
|
fpem_mem_entries=0
|
|
xgxs_tx_lane_map_94=0x0213
|
|
phy_xaui_tx_polarity_flip_42=0x04
|
|
xgxs_tx_lane_map_86=0x0213
|
|
phy_xaui_tx_polarity_flip_34=0x08
|
|
xgxs_tx_lane_map_78=0x0213
|
|
portmap_70=67:25:50:i
|
|
portmap_62=61:100
|
|
phy_xaui_rx_polarity_flip_48=0x02
|
|
pbmp_xport_xe=0xfffffffffffffffffffffffffffffffffe
|
|
portmap_54=53:100
|
|
portmap_46=45:100
|
|
xgxs_rx_lane_map_7=0x1023
|
|
portmap_38=37:100
|
|
xgxs_rx_lane_map_127=0x2301
|
|
xgxs_rx_lane_map_119=0x3120
|
|
xgxs_tx_lane_map_129=0x3120
|
|
l2_mem_entries=8192
|
|
os=unix
|
|
port_phy_addr_26=0xff
|
|
port_phy_addr_18=0xff
|
|
xgxs_rx_lane_map_91=0x3210
|
|
xgxs_rx_lane_map_83=0x3210
|
|
xgxs_rx_lane_map_75=0x2310
|
|
xgxs_rx_lane_map_59=0x0231
|
|
xgxs_tx_lane_map_95=0x0213
|
|
port_phy_addr_111=0xff
|
|
xgxs_tx_lane_map_87=0x0213
|
|
port_phy_addr_103=0xff
|
|
xgxs_tx_lane_map_79=0x0213
|
|
phy_xaui_tx_polarity_flip_27=0x03
|
|
portmap_71=68:25:i
|
|
portmap_63=62:25:i
|
|
phy_xaui_rx_polarity_flip_49=0x01
|
|
portmap_55=54:25:i
|
|
portmap_47=46:25:i
|
|
xgxs_rx_lane_map_8=0x1023
|
|
portmap_39=38:25:i
|
|
xgxs_rx_lane_map_128=0x2301
|
|
port_phy_addr_51=0xff
|
|
port_phy_addr_43=0xff
|
|
port_phy_addr_35=0xff
|
|
port_phy_addr_27=0xff
|
|
port_phy_addr_19=0xff
|
|
xgxs_rx_lane_map_92=0x2310
|
|
xgxs_rx_lane_map_84=0x3210
|
|
xgxs_rx_lane_map_76=0x0231
|
|
xgxs_rx_lane_map_68=0x0213
|
|
port_phy_addr_120=0xff
|
|
xgxs_tx_lane_map_96=0x0123
|
|
phy_xaui_tx_polarity_flip_44=0x01
|
|
port_phy_addr_112=0xff
|
|
xgxs_tx_lane_map_88=0x0123
|
|
phy_xaui_tx_polarity_flip_36=0x02
|
|
port_phy_addr_104=0xff
|
|
portmap_80=77:100
|
|
phy_xaui_tx_polarity_flip_28=0x01
|
|
portmap_72=69:100
|
|
portmap_64=63:25:50:i
|
|
portmap_56=55:25:50:i
|
|
portmap_48=47:25:50:i
|
|
xgxs_rx_lane_map_9=0x2301
|
|
phy_xaui_rx_polarity_flip_5=4
|
|
xgxs_rx_lane_map_129=0x2301
|
|
port_phy_addr_60=0xff
|
|
port_phy_addr_52=0xff
|
|
port_phy_addr_44=0xff
|
|
port_phy_addr_36=0xff
|
|
port_phy_addr_28=0xff
|
|
xgxs_rx_lane_map_93=0x2310
|
|
xgxs_rx_lane_map_85=0x3210
|
|
table_dma_enable=1
|
|
xgxs_rx_lane_map_77=0x0231
|
|
xgxs_rx_lane_map_69=0x0213
|
|
port_phy_addr_121=0xff
|
|
xgxs_tx_lane_map_97=0x0123
|
|
port_phy_addr_113=0xff
|
|
xgxs_tx_lane_map_89=0x0123
|
|
phy_xaui_tx_polarity_flip_37=0x01
|
|
port_phy_addr_105=0xff
|
|
portmap_81=78:25:i
|
|
phy_xaui_tx_polarity_flip_29=0x08
|
|
portmap_73=70:25:i
|
|
portmap_65=64:25:i
|
|
portmap_57=56:25:i
|
|
portmap_49=48:25:i
|
|
port_phy_addr_61=0xff
|
|
port_phy_addr_53=0xff
|
|
port_phy_addr_45=0xff
|
|
port_phy_addr_37=0xff
|
|
xgxs_rx_lane_map_94=0x2310
|
|
port_phy_addr_2=0xff
|
|
xgxs_rx_lane_map_86=0x3210
|
|
xgxs_rx_lane_map_78=0x0231
|
|
phy_xaui_rx_polarity_flip_92=0x0c
|
|
xgxs_tx_lane_map_98=0x0123
|
|
phy_xaui_tx_polarity_flip_46=0x01
|
|
portmap_90=87:25:50:i
|
|
phy_xaui_tx_polarity_flip_38=0x05
|
|
portmap_82=79:25:50:i
|
|
portmap_74=71:25:50:i
|
|
portmap_66=129:1
|
|
portmap_58=57:100
|
|
phy_xaui_rx_polarity_flip_7=1
|
|
port_phy_addr_70=0xff
|
|
xgxs_rx_lane_map_95=0x2310
|
|
port_phy_addr_3=0xff
|
|
xgxs_rx_lane_map_87=0x3210
|
|
xgxs_rx_lane_map_79=0x0231
|
|
port_phy_addr_131=0xff
|
|
port_phy_addr_123=0xff
|
|
xgxs_tx_lane_map_99=0x0123
|
|
phy_an_c37=3
|
|
port_phy_addr_115=0xff
|
|
portmap_91=88:25:i
|
|
port_phy_addr_107=0xff
|
|
portmap_83=80:25:i
|
|
portmap_75=72:25:i
|
|
portmap_59=58:25:i
|
|
serdes_firmware_mode=0x1
|
|
schan_intr_enable=0x00
|
|
port_phy_addr_71=0xff
|
|
port_phy_addr_63=0xff
|
|
port_phy_addr_55=0xff
|
|
port_phy_addr_47=0xff
|
|
port_phy_addr_39=0xff
|
|
l2delete_chunks=128
|
|
xgxs_rx_lane_map_96=0x2130
|
|
port_phy_addr_4=0xff
|
|
xgxs_rx_lane_map_88=0x3210
|
|
tslam_intr_enable=0
|
|
port_phy_addr_132=0xff
|
|
phy_xaui_rx_polarity_flip_94=0x03
|
|
port_phy_addr_124=0xff
|
|
port_phy_addr_116=0xff
|
|
portmap_92=89:100
|
|
port_phy_addr_108=0xff
|
|
portmap_84=81:100
|
|
portmap_76=73:100
|
|
portmap_68=65:100
|
|
port_phy_addr_64=0xff
|
|
mem_cache_enable=1
|
|
port_phy_addr_56=0xff
|
|
port_phy_addr_48=0xff
|
|
parity_enable=1
|
|
xgxs_rx_lane_map_97=0x2130
|
|
xgxs_rx_lane_map_89=0x3210
|
|
port_phy_addr_133=0xff
|
|
phy_xaui_rx_polarity_flip_95=0x01
|
|
port_phy_addr_125=0xff
|
|
port_phy_addr_117=0xff
|
|
portmap_93=90:25:i
|
|
port_phy_addr_109=0xff
|
|
portmap_85=82:25:i
|
|
portmap_77=74:25:i
|
|
portmap_69=66:25:i
|
|
port_phy_addr_81=0xff
|
|
port_phy_addr_73=0xff
|
|
port_phy_addr_65=0xff
|
|
port_phy_addr_57=0xff
|
|
port_phy_addr_49=0xff
|
|
xgxs_rx_lane_map_98=0x2130
|
|
port_phy_addr_6=0xff
|
|
phy_xaui_tx_polarity_flip_90=0x03
|
|
phy_xaui_rx_polarity_flip_96=0x0c
|
|
portmap_94=91:25:50:i
|
|
portmap_86=83:25:50:i
|
|
portmap_78=75:25:50:i
|
|
port_phy_addr_90=0xff
|
|
port_phy_addr_82=0xff
|
|
port_phy_addr_74=0xff
|
|
load_firmware=0x102
|
|
l2xmsg_mode=1
|
|
xgxs_rx_lane_map_99=0x2130
|
|
port_phy_addr_7=0xff
|
|
phy_xaui_tx_polarity_flip_91=0x01
|
|
phy_an_c73=0
|
|
port_phy_addr_127=0xff
|
|
port_phy_addr_119=0xff
|
|
portmap_95=92:25:i
|
|
portmap_87=84:25:i
|
|
portmap_79=76:25:i
|
|
port_phy_addr_91=0xff
|
|
port_phy_addr_83=0xff
|
|
port_phy_addr_75=0xff
|
|
port_phy_addr_59=0xff
|
|
mmu_lossless=0x01
|
|
port_phy_addr_8=0xff
|
|
phy_xaui_tx_polarity_flip_92=0x04
|
|
phy_xaui_tx_polarity_flip_84=0x04
|
|
phy_xaui_rx_polarity_flip_98=0x03
|
|
port_phy_addr_128=0xff
|
|
portmap_96=93:100
|
|
portmap_1=1:100
|
|
portmap_88=85:100
|
|
phy_xaui_tx_polarity_flip_9=0x08
|
|
phy_xaui_rx_polarity_flip_99=0x01
|
|
port_phy_addr_129=0xff
|
|
portmap_97=94:25:i
|
|
portmap_2=2:25:i
|
|
portmap_89=86:25:i
|
|
xgxs_tx_lane_map_10=0x3120
|
|
phy_an_c37_100=1
|
|
port_phy_addr_93=0xff
|
|
port_phy_addr_85=0xff
|
|
port_phy_addr_77=0xff
|
|
port_phy_addr_69=0xff
|
|
phy_xaui_tx_polarity_flip_94=0x01
|
|
phy_xaui_tx_polarity_flip_86=0x01
|
|
max_vp_lags=0
|
|
l3_max_ecmp_mode=1
|
|
l3_alpm_enable=2
|
|
portmap_98=95:25:50:i
|
|
portmap_3=3:25:50:i
|
|
miim_intr_enable=0x0
|
|
xgxs_tx_lane_map_11=0x3120
|
|
port_phy_addr_94=0xff
|
|
port_phy_addr_86=0xff
|
|
port_phy_addr_78=0xff
|
|
module_64ports=0
|
|
tdma_intr_enable=0
|
|
portmap_100=131:1
|
|
portmap_99=96:25:i
|
|
pbmp_oversubscribe=0xC4444451111111144444444422222222
|
|
portmap_4=4:25:i
|
|
l3_mem_entries=8192
|
|
xgxs_tx_lane_map_20=0x0213
|
|
xgxs_tx_lane_map_12=0x3120
|
|
port_phy_addr_95=0xff
|
|
port_phy_addr_87=0xff
|
|
port_phy_addr_79=0xff
|
|
ptp_ts_pll_fref=0
|
|
phy_xaui_tx_polarity_flip_96=0x08
|
|
phy_xaui_tx_polarity_flip_88=0x0c
|
|
portmap_5=5:100
|
|
xgxs_tx_lane_map_21=0x2310
|
|
xgxs_tx_lane_map_13=0x1023
|
|
tslam_dma_enable=1
|
|
dport_map_direct=0x01
|
|
portmap_110=105:100
|
|
portmap_102=97:100
|
|
portmap_6=6:25:i
|
|
xgxs_rx_lane_map_10=0x2301
|
|
xgxs_tx_lane_map_30=0x0213
|
|
xgxs_tx_lane_map_22=0x2310
|
|
xgxs_tx_lane_map_14=0x1023
|
|
phy_an_c73_100=0
|
|
port_phy_addr_97=0xff
|
|
port_phy_addr_89=0xff
|
|
phy_xaui_tx_polarity_flip_98=0x02
|
|
portmap_111=106:25:i
|
|
portmap_103=98:25:i
|
|
portmap_7=7:25:50:i
|
|
xgxs_rx_lane_map_11=0x2301
|
|
xgxs_tx_lane_map_31=0x0213
|
|
xgxs_tx_lane_map_23=0x2310
|
|
xgxs_tx_lane_map_15=0x1023
|
|
port_phy_addr_98=0xff
|
|
|