a2885b31ed
Why I did it Provide CPLD and FPGA driver framework that complies with s3ip sysfs specification How I did it 1、 The framework module provides register and unregister interface and implementation. 2、 The framework will help you create the sysfs node How to verify it A demo driver base on this framework will display the sysfs node wich conform to the s3ip sysfs specification
367 lines
11 KiB
C
367 lines
11 KiB
C
/*
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* fpga_sysfs.c
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*
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* This module create fpga kobjects and attributes in /sys/s3ip/fpga
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*
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* History
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* [Version] [Date] [Description]
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* * v1.0 2021-08-31 S3IP sysfs
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*/
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#include <linux/slab.h>
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#include "switch.h"
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#include "fpga_sysfs.h"
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static int g_fpga_loglevel = 0;
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#define FPGA_INFO(fmt, args...) do { \
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if (g_fpga_loglevel & INFO) { \
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printk(KERN_INFO "[FPGA_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
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} \
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} while (0)
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#define FPGA_ERR(fmt, args...) do { \
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if (g_fpga_loglevel & ERR) { \
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printk(KERN_ERR "[FPGA_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
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} \
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} while (0)
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#define FPGA_DBG(fmt, args...) do { \
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if (g_fpga_loglevel & DBG) { \
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printk(KERN_DEBUG "[FPGA_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
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} \
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} while (0)
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struct fpga_obj_s {
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struct switch_obj *obj;
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};
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struct fpga_s {
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unsigned int fpga_number;
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struct fpga_obj_s *fpga;
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};
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static struct fpga_s g_fpga;
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static struct switch_obj *g_fpga_obj = NULL;
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static struct s3ip_sysfs_fpga_drivers_s *g_fpga_drv = NULL;
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static ssize_t fpga_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
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{
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return (ssize_t)snprintf(buf, PAGE_SIZE, "%u\n", g_fpga.fpga_number);
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}
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static ssize_t fpga_alias_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
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{
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unsigned int fpga_index;
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int ret;
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check_p(g_fpga_drv);
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check_p(g_fpga_drv->get_main_board_fpga_alias);
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fpga_index = obj->index;
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FPGA_DBG("fpga index: %u\n", fpga_index);
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ret = g_fpga_drv->get_main_board_fpga_alias(fpga_index, buf, PAGE_SIZE);
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if (ret < 0) {
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FPGA_ERR("get fpga%u alias failed, ret: %d\n", fpga_index, ret);
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return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SYSFS_DEV_ERROR);
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}
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return ret;
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}
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static ssize_t fpga_type_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
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{
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unsigned int fpga_index;
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int ret;
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check_p(g_fpga_drv);
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check_p(g_fpga_drv->get_main_board_fpga_type);
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fpga_index = obj->index;
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FPGA_DBG("fpga index: %u\n", fpga_index);
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ret = g_fpga_drv->get_main_board_fpga_type(fpga_index, buf, PAGE_SIZE);
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if (ret < 0) {
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FPGA_ERR("get fpga%u type failed, ret: %d\n", fpga_index, ret);
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return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SYSFS_DEV_ERROR);
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}
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return ret;
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}
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static ssize_t fpga_fw_version_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
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{
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unsigned int fpga_index;
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int ret;
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check_p(g_fpga_drv);
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check_p(g_fpga_drv->get_main_board_fpga_firmware_version);
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fpga_index = obj->index;
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FPGA_DBG("fpga index: %u\n", fpga_index);
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ret = g_fpga_drv->get_main_board_fpga_firmware_version(fpga_index, buf, PAGE_SIZE);
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if (ret < 0) {
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FPGA_ERR("get fpga%u firmware version failed, ret: %d\n", fpga_index, ret);
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return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SYSFS_DEV_ERROR);
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}
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return ret;
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}
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static ssize_t fpga_board_version_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
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{
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unsigned int fpga_index;
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int ret;
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check_p(g_fpga_drv);
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check_p(g_fpga_drv->get_main_board_fpga_board_version);
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fpga_index = obj->index;
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FPGA_DBG("fpga index: %u\n", fpga_index);
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ret = g_fpga_drv->get_main_board_fpga_board_version(fpga_index, buf, PAGE_SIZE);
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if (ret < 0) {
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FPGA_ERR("get fpga%u board version failed, ret: %d\n", fpga_index, ret);
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return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SYSFS_DEV_ERROR);
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}
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return ret;
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}
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static ssize_t fpga_test_reg_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
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{
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unsigned int fpga_index;
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int ret;
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check_p(g_fpga_drv);
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check_p(g_fpga_drv->get_main_board_fpga_test_reg);
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fpga_index = obj->index;
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FPGA_DBG("fpga index: %u\n", fpga_index);
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ret = g_fpga_drv->get_main_board_fpga_test_reg(fpga_index, buf, PAGE_SIZE);
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if (ret < 0) {
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FPGA_ERR("get fpga%u test register failed, ret: %d\n", fpga_index, ret);
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return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SYSFS_DEV_ERROR);
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}
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return ret;
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}
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static ssize_t fpga_test_reg_store(struct switch_obj *obj, struct switch_attribute *attr,
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const char* buf, size_t count)
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{
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unsigned int fpga_index, value;
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int ret;
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check_p(g_fpga_drv);
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check_p(g_fpga_drv->set_main_board_fpga_test_reg);
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fpga_index = obj->index;
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sscanf(buf, "0x%x", &value);
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ret = g_fpga_drv->set_main_board_fpga_test_reg(fpga_index, value);
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if (ret < 0) {
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FPGA_ERR("set fpga%u test reg failed, value:0x%x, ret: %d.\n", fpga_index, value, ret);
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return -EIO;
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}
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FPGA_DBG("set fpga%u test reg success, value: 0x%x.\n", fpga_index, value);
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return count;
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}
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/************************************fpga dir and attrs*******************************************/
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static struct switch_attribute fpga_number_att = __ATTR(number, S_IRUGO, fpga_number_show, NULL);
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static struct attribute *fpga_dir_attrs[] = {
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&fpga_number_att.attr,
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NULL,
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};
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static struct attribute_group fpga_root_attr_group = {
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.attrs = fpga_dir_attrs,
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};
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/*******************************fpga[1-n] dir and attrs*******************************************/
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static struct switch_attribute fpga_alias_attr = __ATTR(alias, S_IRUGO, fpga_alias_show, NULL);
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static struct switch_attribute fpga_type_attr = __ATTR(type, S_IRUGO, fpga_type_show, NULL);
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static struct switch_attribute fpga_fw_version_attr = __ATTR(firmware_version, S_IRUGO, fpga_fw_version_show, NULL);
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static struct switch_attribute fpga_board_version_attr = __ATTR(board_version, S_IRUGO, fpga_board_version_show, NULL);
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static struct switch_attribute fpga_test_reg_attr = __ATTR(reg_test, S_IRUGO | S_IWUSR, fpga_test_reg_show, fpga_test_reg_store);
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static struct attribute *fpga_attrs[] = {
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&fpga_alias_attr.attr,
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&fpga_type_attr.attr,
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&fpga_fw_version_attr.attr,
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&fpga_board_version_attr.attr,
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&fpga_test_reg_attr.attr,
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NULL,
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};
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static struct attribute_group fpga_attr_group = {
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.attrs = fpga_attrs,
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};
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static int fpga_sub_single_remove_kobj_and_attrs(unsigned int index)
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{
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struct fpga_obj_s *curr_fpga;
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curr_fpga = &g_fpga.fpga[index - 1];
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if (curr_fpga->obj) {
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sysfs_remove_group(&curr_fpga->obj->kobj, &fpga_attr_group);
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switch_kobject_delete(&curr_fpga->obj);
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FPGA_DBG("delete fpga%u dir and attrs success.\n", index);
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}
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return 0;
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}
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static int fpga_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
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{
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char name[8];
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struct fpga_obj_s *curr_fpga;
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curr_fpga = &g_fpga.fpga[index - 1];
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memset(name, 0, sizeof(name));
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snprintf(name, sizeof(name), "fpga%u", index);
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curr_fpga->obj = switch_kobject_create(name, parent);
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if (!curr_fpga->obj) {
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FPGA_ERR("create %s object error!\n", name);
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return -EBADRQC;
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}
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curr_fpga->obj->index = index;
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if (sysfs_create_group(&curr_fpga->obj->kobj, &fpga_attr_group) != 0) {
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FPGA_ERR("create %s attrs error.\n", name);
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switch_kobject_delete(&curr_fpga->obj);
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return -EBADRQC;
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}
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FPGA_DBG("create %s dir and attrs success.\n", name);
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return 0;
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}
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static int fpga_sub_create_kobj_and_attrs(struct kobject *parent, int fpga_num)
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{
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unsigned int fpga_index, i;
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g_fpga.fpga = kzalloc(sizeof(struct fpga_obj_s) * fpga_num, GFP_KERNEL);
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if (!g_fpga.fpga) {
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FPGA_ERR("kzalloc g_fpga.fpga error, fpga number = %d.\n", fpga_num);
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return -ENOMEM;
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}
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for(fpga_index = 1; fpga_index <= fpga_num; fpga_index++) {
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if(fpga_sub_single_create_kobj_and_attrs(parent, fpga_index) != 0 ) {
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goto error;
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}
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}
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return 0;
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error:
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for(i = fpga_index; i > 0; i--) {
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fpga_sub_single_remove_kobj_and_attrs(i);
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}
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kfree(g_fpga.fpga);
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g_fpga.fpga = NULL;
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return -EBADRQC;
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}
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/* create fpga[1-n] directory and attributes*/
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static int fpga_sub_create(void)
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{
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int ret;
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ret = fpga_sub_create_kobj_and_attrs(&g_fpga_obj->kobj, g_fpga.fpga_number);
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return ret;
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}
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/* delete fpga[1-n] directory and attributes*/
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static void fpga_sub_remove(void)
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{
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unsigned int fpga_index;
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if (g_fpga.fpga) {
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for (fpga_index = g_fpga.fpga_number; fpga_index > 0; fpga_index--) {
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fpga_sub_single_remove_kobj_and_attrs(fpga_index);
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}
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kfree(g_fpga.fpga);
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g_fpga.fpga = NULL;
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}
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g_fpga.fpga_number = 0;
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return;
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}
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/* create fpga directory and number attributes */
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static int fpga_root_create(void)
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{
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g_fpga_obj = switch_kobject_create("fpga", NULL);
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if (!g_fpga_obj) {
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FPGA_ERR("switch_kobject_create fpga error!\n");
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return -ENOMEM;
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}
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if (sysfs_create_group(&g_fpga_obj->kobj, &fpga_root_attr_group) != 0) {
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switch_kobject_delete(&g_fpga_obj);
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FPGA_ERR("create fpga dir attrs error!\n");
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return -EBADRQC;
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}
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return 0;
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}
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/* delete fpga directory and number attributes */
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static void fpga_root_remove(void)
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{
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if (g_fpga_obj) {
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sysfs_remove_group(&g_fpga_obj->kobj, &fpga_root_attr_group);
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switch_kobject_delete(&g_fpga_obj);
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}
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return;
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}
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int s3ip_sysfs_fpga_drivers_register(struct s3ip_sysfs_fpga_drivers_s *drv)
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{
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int ret, fpga_num;
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FPGA_INFO("s3ip_sysfs_fpga_drivers_register...\n");
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if (g_fpga_drv) {
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FPGA_ERR("g_fpga_drv is not NULL, can't register\n");
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return -EPERM;
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}
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check_p(drv);
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check_p(drv->get_main_board_fpga_number);
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g_fpga_drv = drv;
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fpga_num = g_fpga_drv->get_main_board_fpga_number();
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if (fpga_num <= 0) {
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FPGA_ERR("fpga number: %d, don't need to create fpga dirs and attrs.\n", fpga_num);
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g_fpga_drv = NULL;
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return -EINVAL;
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}
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memset(&g_fpga, 0, sizeof(struct fpga_s));
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g_fpga.fpga_number = fpga_num;
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ret = fpga_root_create();
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if (ret < 0) {
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FPGA_ERR("create fpga root dir and attrs failed, ret: %d\n", ret);
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g_fpga_drv = NULL;
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return ret;
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}
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ret = fpga_sub_create();
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if (ret < 0) {
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FPGA_ERR("create fpga sub dir and attrs failed, ret: %d\n", ret);
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fpga_root_remove();
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g_fpga_drv = NULL;
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return ret;
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}
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FPGA_INFO("s3ip_sysfs_fpga_drivers_register success\n");
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return 0;
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}
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void s3ip_sysfs_fpga_drivers_unregister(void)
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{
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if (g_fpga_drv) {
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fpga_sub_remove();
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fpga_root_remove();
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g_fpga_drv = NULL;
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FPGA_DBG("s3ip_sysfs_fpga_drivers_unregister success.\n");
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}
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return;
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}
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EXPORT_SYMBOL(s3ip_sysfs_fpga_drivers_register);
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EXPORT_SYMBOL(s3ip_sysfs_fpga_drivers_unregister);
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module_param(g_fpga_loglevel, int, 0644);
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MODULE_PARM_DESC(g_fpga_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
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