sonic-buildimage/device/celestica
Pradchaya P fd5bce57dd [device/dx010] configuration port index start from 1 (#1927)
* update sfputil, port indext start from 1

* DX010 update SKUs port config index

Port index in port_config.ini now start from 1.
* Seastone-DX010-10-50 port config update
* Seastone-DX010-50 port config update
* Seastone-DX010 port config update

* Update dx010 sfputil plugin

 * Implement lpmode set function.
 * Implement transceiver reset function.
 * Python code style format.

* Remove new line at the end of port_config.ini

 *New line cause parsing error in sfputilbase.

* Add get_transceiver_change_event method

 *This needed by new sfputilbase implement.

* Fix unintended line breaks
2018-08-16 10:38:33 -07:00
..
x86_64-cel_e1031-r0 [devices]: add celstica haliburton 2018-08-11 09:09:03 +00:00
x86_64-cel_seastone-r0 [device/dx010] configuration port index start from 1 (#1927) 2018-08-16 10:38:33 -07:00