fd122efb40
- Why I did it Add support for systems 4600/4600C/2201 that are using sonic interface names aligned to 4 instead of 8 (which is the max number of lanes per port). Improve DB access calls, now we use Python library functions. - How I did it Use addition information taken from Config DB in order to create map from SDK logical index to sonic interface name. - How to verify it Run ECMP calculator on 4600, 4600C and 2201 platforms.
184 lines
5.6 KiB
Python
Executable File
184 lines
5.6 KiB
Python
Executable File
#!/usr/bin/env python3
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from python_sdk_api.sx_api import *
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import inspect
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import re
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DEVICE_ID = 1
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SWITCH_ID = 0
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PORT_TABLE = 'PORT'
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FIRST_LANE_INDEX = 0
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ETHERNET_PREFIX = 'Ethernet'
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def get_ports_lanes_map(config_db):
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""" Get lane number of the first lane in use by port for all existing ports.
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Args:
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config_db (ConfigDBConnector): Config DB connector
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Returns:
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dict: key is lane number of the first lane in use by port, value is SONiC port index (124 for Ethernet124)
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"""
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lanes_map = {}
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config_db.connect()
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ports_table = config_db.get_table(PORT_TABLE)
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if ports_table is None:
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raise Exception("Can't read {} table".format(PORT_TABLE))
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ports_table_keys = config_db.get_keys(PORT_TABLE)
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for port in ports_table_keys:
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port_data = ports_table.get(port)
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if port_data is not None:
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lanes = port_data.get('lanes')
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first_lane = lanes.split(',')[FIRST_LANE_INDEX]
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port_idx = re.sub(r"\D", "", port)
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lanes_map[int(first_lane)] = int(port_idx)
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return lanes_map
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def get_port_max_width(handle):
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""" Get max number of lanes in port according to chip type
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Args:
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handle (sx_api_handle_t): SDK handle
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Returns:
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int: max lanes in port
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"""
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# Get chip type
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chip_type = sx_get_chip_type(handle)
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limits = rm_resources_t()
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modes = rm_modes_t()
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rc = rm_chip_limits_get(chip_type, limits)
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sx_check_rc(rc)
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max_width = limits.port_map_width_max
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# SPC2 ports have 8 lanes but SONiC is using 4
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if chip_type == SX_CHIP_TYPE_SPECTRUM2:
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max_width = 4
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return max_width
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def sx_get_ports_map(handle, config_db):
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""" Get ports map from SDK logical index to SONiC index
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Args:
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handle (sx_api_handle_t): SDK handle
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config_db (ConfigDBConnector): Config DB connector
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Returns:
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dict: key is SDK logical index, value is SONiC index (4 for Ethernet4)
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"""
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try:
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ports_map = {}
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port_attributes_list = None
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port_cnt_p = None
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# Get lanes map
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lanes_map = get_ports_lanes_map(config_db)
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# Get max number of lanes in port
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port_max_width = get_port_max_width(handle)
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# Get ports count
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port_cnt_p = new_uint32_t_p()
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rc = sx_api_port_device_get(handle, DEVICE_ID, SWITCH_ID, None, port_cnt_p)
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sx_check_rc(rc)
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# Get ports
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port_cnt = uint32_t_p_value(port_cnt_p)
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port_attributes_list = new_sx_port_attributes_t_arr(port_cnt)
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rc = sx_api_port_device_get(handle, DEVICE_ID, SWITCH_ID, port_attributes_list, port_cnt_p)
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sx_check_rc(rc)
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for i in range(0, port_cnt):
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port_attributes = sx_port_attributes_t_arr_getitem(port_attributes_list, i)
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label_port = port_attributes.port_mapping.module_port
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logical_port = port_attributes.log_port;
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lane_bmap = port_attributes.port_mapping.lane_bmap;
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if (is_phy_port(port_attributes.log_port) == False):
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continue
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# Calculate sonic index (sonic index=4 for Ethernet4)
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lane_index = get_lane_index(lane_bmap, port_max_width)
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assert lane_index != -1, "Failed to calculate port index"
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first_lane = label_port * port_max_width + lane_index;
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sonic_index = lanes_map[first_lane]
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sonic_interface = ETHERNET_PREFIX + str(sonic_index)
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ports_map[logical_port] = sonic_interface
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return ports_map
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finally:
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delete_sx_port_attributes_t_arr(port_attributes_list)
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delete_uint32_t_p(port_cnt_p)
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def sx_get_chip_type(handle):
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""" Get system ASIC type
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Args:
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handle (sx_api_handle_t): SDK handle
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Returns:
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sx_chip_types_t: Chip type
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"""
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try:
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device_info_cnt_p = new_uint32_t_p()
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uint32_t_p_assign(device_info_cnt_p, 1)
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device_info_cnt = uint32_t_p_value(device_info_cnt_p)
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device_info_list_p = new_sx_device_info_t_arr(device_info_cnt)
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rc = sx_api_port_device_list_get(handle, device_info_list_p, device_info_cnt_p)
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sx_check_rc(rc)
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device_info = sx_device_info_t_arr_getitem(device_info_list_p, SWITCH_ID)
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chip_type = device_info.dev_type
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if chip_type == SX_CHIP_TYPE_SPECTRUM_A1:
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chip_type = SX_CHIP_TYPE_SPECTRUM
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return chip_type
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finally:
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delete_sx_device_info_t_arr(device_info_list_p)
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delete_uint32_t_p(device_info_cnt_p)
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def get_lane_index(lane_bmap, max_lanes):
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""" Get index of first lane in use (2 for 00001100)
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Args:
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lane_bmap (int): bitmap indicating module lanes in use
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max_lanes (int): Max lanes in module
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Returns:
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int: index of the first bit set to 1 in lane_bmap
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"""
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for lane_idx in range(0, max_lanes):
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if (lane_bmap & 0x1 == 1):
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return lane_idx
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lane_bmap = lane_bmap >> 1
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def sx_check_rc(rc):
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if rc is not SX_STATUS_SUCCESS:
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# Get the calling function name from the last frame
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cf = inspect.currentframe().f_back
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func_name = inspect.getframeinfo(cf).function
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error_info = func_name + ' failed with rc = ' + str(rc)
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raise Exception(error_info)
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def get_port_type(log_port_id):
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return (log_port_id & SX_PORT_TYPE_ID_MASK) >> SX_PORT_TYPE_ID_OFFS
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def is_phy_port(log_port_id):
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return get_port_type(log_port_id) == SX_PORT_TYPE_NETWORK
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def is_lag(log_port_id):
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return get_port_type(log_port_id) == SX_PORT_TYPE_LAG
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