27f15d40e1
- Why I did it 1. Update Mellanox HW-MGMT package to newer version V.7.0030.1011 2. Replace the SONiC PMON Thermal control algorithm with the one inside the HW-MGMT package on all Nvidia platforms 3. Support Spectrum-4 systems - How I did it 1. Update the HW-MGMT package version number and submodule pointer 2. Remove the thermal control algorithm implementation from Mellanox platform API 3. Revise the patch to HW-MGMT package which will disable HW-MGMT from running on SIMX 4. Update the downstream kernel patch list Signed-off-by: Kebo Liu <kebol@nvidia.com>
106 lines
3.6 KiB
Diff
106 lines
3.6 KiB
Diff
From 44b270551552a48c2a0799f1660b7bfdd0c10519 Mon Sep 17 00:00:00 2001
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From: Vadim Pasternak <vadimp@nvidia.com>
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Date: Wed, 12 May 2021 22:57:37 +0300
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Subject: [PATCH backport 5.10 139/182] mlxsw: reg: Introduce Management
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Temperature Extended Capabilities Register
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Introduce new register MTECR (Management Temperature Extended
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Capabilities Register). This register exposes the capabilities of the
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device and system temperature sensing. It provides information for
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all possible temperature sensors that are on the system.
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Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
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Signed-off-by: Jiri Pirko <jiri@nvidia.com>
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---
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drivers/net/ethernet/mellanox/mlxsw/reg.h | 67 +++++++++++++++++++++++
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1 file changed, 67 insertions(+)
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diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
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index e060f054e0a9..5757c4f40277 100644
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--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
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+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
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@@ -10296,6 +10296,72 @@ mlxsw_reg_mgpir_unpack(char *payload, u8 *num_of_devices,
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*num_of_slots = mlxsw_reg_mgpir_num_of_slots_get(payload);
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}
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+/* MTECR - Management Temperature Extended Capabilities Register
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+ * -------------------------------------------------------------
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+ * MTECR register exposes the capabilities of the device and system
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+ * temperature sensing.
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+ */
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+#define MLXSW_REG_MTECR_ID 0x9109
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+#define MLXSW_REG_MTECR_LEN 0x60
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+#define MLXSW_REG_MTECR_SENSOR_MAP_LEN 0x58
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+
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+MLXSW_REG_DEFINE(mtecr, MLXSW_REG_MTECR_ID, MLXSW_REG_MTECR_LEN);
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+
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+/* reg_mtecr_last_sensor.
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+ * Last sensor index that is available in the system to read from.
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+ * Access: RO
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+ */
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+MLXSW_ITEM32(reg, mtecr, last_sensor, 0x00, 16, 12);
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+
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+/* reg_mtecr_sensor_count.
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+ * Number of sensors supported by the device.
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+ * This includes the ASIC, ambient sensors, Gearboxes etc.
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+ * QSFP module sensors are not included.
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+ * Access: RO
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+ */
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+MLXSW_ITEM32(reg, mtecr, sensor_count, 0x00, 0, 12);
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+
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+/* reg_mtecr_slot_index.
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+ * Slot index (0: Main board).
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+ * Access: Index
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+ */
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+MLXSW_ITEM32(reg, mtecr, slot_index, 0x04, 28, 4);
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+
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+/* reg_mtecr_internal_sensor_count.
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+ * Number of sensors supported by the device that are in the ASIC.
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+ * Access: RO
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+ */
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+MLXSW_ITEM32(reg, mtecr, internal_sensor_count, 0x04, 0, 7);
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+
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+/* reg_mtecr_sensor_map.
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+ * Mapping of system sensors supported by the device. Each bit represents a
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+ * sensor. This field is size variable based on the last_sensor field and in
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+ * granularity of 32 bits.
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+ * 0: Not connected or not supported
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+ * 1: Supports temperature measurements
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+ *
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+ */
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+MLXSW_ITEM_BIT_ARRAY(reg, mtecr, sensor_map, 0x08, MLXSW_REG_MTECR_SENSOR_MAP_LEN, 1);
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+
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+static inline void mlxsw_reg_mtecr_pack(char *payload, u8 slot_index)
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+{
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+ MLXSW_REG_ZERO(mtecr, payload);
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+ mlxsw_reg_mtecr_slot_index_set(payload, slot_index);
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+}
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+
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+static inline void mlxsw_reg_mtecr_unpack(char *payload, u16 *sensor_count,
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+ u16 *last_sensor,
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+ u8 *internal_sensor_count)
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+{
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+ if (sensor_count)
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+ *sensor_count = mlxsw_reg_mtecr_sensor_count_get(payload);
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+ if (last_sensor)
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+ *last_sensor = mlxsw_reg_mtecr_last_sensor_get(payload);
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+ if (internal_sensor_count)
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+ *internal_sensor_count =
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+ mlxsw_reg_mtecr_internal_sensor_count_get(payload);
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+}
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+
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/* MBCT - Management Binary Code Transfer Register
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* -----------------------------------------------
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* This register allows to transfer binary codes from the Host to
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@@ -11883,6 +11949,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
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MLXSW_REG(mtptpt),
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MLXSW_REG(mfgd),
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MLXSW_REG(mgpir),
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+ MLXSW_REG(mtecr),
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MLXSW_REG(mbct),
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MLXSW_REG(mddq),
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MLXSW_REG(mddc),
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--
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2.20.1
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