- Why I did it Configure different DSCP_TO_TC_MAP between uplink and downlink on T1 switch in dual ToR scenario On T1 uplink, both DSCP 2/6 will be mapped to TC 1 for the purpose of avoiding such traffic occupying lossless buffers. On T1 downlink, they will be mapped to TC 2/6 respectively. (unchanged) - How I did it For vendors who want to configure different DSCP_TO_TC_MAP between uplinks and downlinks on T1, they should Define generate_dscp_to_tc_map macro in SKU's qos.json.j2 file Define map AZURE for downlink and AZURE_UPLINK for uplink Define jinja2 variable different_dscp_to_tc_map as True Signed-off-by: Stephen Sun <stephens@nvidia.com> |
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x86_64-mlnx_lssn2700-r0 | ||
x86_64-mlnx_msn2010-r0 | ||
x86_64-mlnx_msn2100-r0 | ||
x86_64-mlnx_msn2410-r0 | ||
x86_64-mlnx_msn2700_simx-r0 | ||
x86_64-mlnx_msn2700-r0 | ||
x86_64-mlnx_msn2740-r0 | ||
x86_64-mlnx_msn3420-r0 | ||
x86_64-mlnx_msn3700_simx-r0 | ||
x86_64-mlnx_msn3700-r0 | ||
x86_64-mlnx_msn3700c-r0 | ||
x86_64-mlnx_msn3800-r0 | ||
x86_64-mlnx_msn4410-r0 | ||
x86_64-mlnx_msn4600-r0 | ||
x86_64-mlnx_msn4600c-r0 | ||
x86_64-mlnx_msn4700_simx-r0 | ||
x86_64-mlnx_msn4700-r0 | ||
x86_64-mlnx_msn4800-r0/ACS-MSN4800 | ||
x86_64-mlnx_x86-r5.0.1400 |