12ba083b66
* [Accton]: Add a new supported device AS5712-54X Switch Vendor: Edge-core Switch SKU: AS5712-54X ASIC Vendor: Broadcom Swich ASIC: TRIDENT2 Port Configuration: 48x10G+6x40G SONiC Image: SONiC-ONIE-Broadcom * [Accton]: Add a new supported device AS5712-54X (Update 1) Switch Vendor: Edge-core Switch SKU: AS5712-54X ASIC Vendor: Broadcom Swich ASIC: TRIDENT2 Port Configuration: 48x10G+6x40G SONiC Image: SONiC-ONIE-Broadcom * [Accton]: Add a new supported device AS5712-54X (Update 2) Switch Vendor: Edge-core Switch SKU: AS5712-54X ASIC Vendor: Broadcom Swich ASIC: TRIDENT2 Port Configuration: 48x10G+6x40G SONiC Image: SONiC-ONIE-Broadcom * [Accton]: Add a new supported device AS5712-54X (Update 3) Switch Vendor: Edge-core Switch SKU: AS5712-54X ASIC Vendor: Broadcom Swich ASIC: TRIDENT2 Port Configuration: 48x10G+6x40G SONiC Image: SONiC-ONIE-Broadcom
176 lines
4.8 KiB
Python
176 lines
4.8 KiB
Python
# sfputil.py
|
|
#
|
|
# Platform-specific SFP transceiver interface for SONiC
|
|
#
|
|
|
|
try:
|
|
import time
|
|
from sonic_sfp.sfputilbase import SfpUtilBase
|
|
except ImportError as e:
|
|
raise ImportError("%s - required module not found" % str(e))
|
|
|
|
|
|
class SfpUtil(SfpUtilBase):
|
|
"""Platform-specific SfpUtil class"""
|
|
|
|
PORT_START = 0
|
|
PORT_END = 31
|
|
PORTS_IN_BLOCK = 32
|
|
|
|
EEPROM_OFFSET = 20
|
|
|
|
_port_to_eeprom_mapping = {}
|
|
|
|
@property
|
|
def port_start(self):
|
|
return self.PORT_START
|
|
|
|
@property
|
|
def port_end(self):
|
|
return self.PORT_END
|
|
|
|
@property
|
|
def qsfp_ports(self):
|
|
return range(0, self.PORTS_IN_BLOCK + 1)
|
|
|
|
@property
|
|
def port_to_eeprom_mapping(self):
|
|
return self._port_to_eeprom_mapping
|
|
|
|
def __init__(self):
|
|
eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom"
|
|
|
|
for x in range(0, self.port_end + 1):
|
|
self._port_to_eeprom_mapping[x] = eeprom_path.format(x + self.EEPROM_OFFSET)
|
|
|
|
SfpUtilBase.__init__(self)
|
|
|
|
def get_presence(self, port_num):
|
|
# Check for invalid port_num
|
|
if port_num < self.port_start or port_num > self.port_end:
|
|
return False
|
|
|
|
try:
|
|
reg_file = open("/sys/devices/platform/accton/qsfp_modprs")
|
|
except IOError as e:
|
|
print "Error: unable to open file: %s" % str(e)
|
|
return False
|
|
|
|
content = reg_file.readline().rstrip()
|
|
|
|
# content is a string containing the hex representation of the register
|
|
reg_value = int(content, 16)
|
|
|
|
# Mask off the bit corresponding to our port
|
|
mask = (1 << port_num)
|
|
|
|
# ModPrsL is active low
|
|
if reg_value & mask == 0:
|
|
return True
|
|
|
|
return False
|
|
|
|
def get_low_power_mode(self, port_num):
|
|
# Check for invalid port_num
|
|
if port_num < self.port_start or port_num > self.port_end:
|
|
return False
|
|
|
|
try:
|
|
reg_file = open("/sys/devices/platform/accton/qsfp_lpmode")
|
|
except IOError as e:
|
|
print "Error: unable to open file: %s" % str(e)
|
|
|
|
content = reg_file.readline().rstrip()
|
|
|
|
# content is a string containing the hex representation of the register
|
|
reg_value = int(content, 16)
|
|
|
|
# Mask off the bit corresponding to our port
|
|
mask = (1 << port_num)
|
|
|
|
# LPMode is active high
|
|
if reg_value & mask == 0:
|
|
return False
|
|
|
|
return True
|
|
|
|
def set_low_power_mode(self, port_num, lpmode):
|
|
# Check for invalid port_num
|
|
if port_num < self.port_start or port_num > self.port_end:
|
|
return False
|
|
|
|
try:
|
|
reg_file = open("/sys/devices/platform/accton/qsfp_lpmode", "r+")
|
|
except IOError as e:
|
|
print "Error: unable to open file: %s" % str(e)
|
|
return False
|
|
|
|
content = reg_file.readline().rstrip()
|
|
|
|
# content is a string containing the hex representation of the register
|
|
reg_value = int(content, 16)
|
|
|
|
# Mask off the bit corresponding to our port
|
|
mask = (1 << port_num)
|
|
|
|
# LPMode is active high; set or clear the bit accordingly
|
|
if lpmode is True:
|
|
reg_value = reg_value | mask
|
|
else:
|
|
reg_value = reg_value & ~mask
|
|
|
|
# Convert our register value back to a hex string and write back
|
|
content = hex(reg_value)
|
|
|
|
reg_file.seek(0)
|
|
reg_file.write(content)
|
|
reg_file.close()
|
|
|
|
return True
|
|
|
|
def reset(self, port_num):
|
|
QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/devices/platform/accton/qsfp_reset"
|
|
|
|
# Check for invalid port_num
|
|
if port_num < self.port_start or port_num > self.port_end:
|
|
return False
|
|
|
|
try:
|
|
reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+")
|
|
except IOError as e:
|
|
print "Error: unable to open file: %s" % str(e)
|
|
return False
|
|
|
|
content = reg_file.readline().rstrip()
|
|
|
|
# File content is a string containing the hex representation of the register
|
|
reg_value = int(content, 16)
|
|
|
|
# Mask off the bit corresponding to our port
|
|
mask = (1 << port_num)
|
|
|
|
# ResetL is active low
|
|
reg_value = reg_value & ~mask
|
|
|
|
# Convert our register value back to a hex string and write back
|
|
reg_file.seek(0)
|
|
reg_file.write(hex(reg_value))
|
|
reg_file.close()
|
|
|
|
# Sleep 1 second to allow it to settle
|
|
time.sleep(1)
|
|
|
|
# Flip the bit back high and write back to the register to take port out of reset
|
|
try:
|
|
reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "w")
|
|
except IOError as e:
|
|
print "Error: unable to open file: %s" % str(e)
|
|
return False
|
|
|
|
reg_value = reg_value | mask
|
|
reg_file.seek(0)
|
|
reg_file.write(hex(reg_value))
|
|
reg_file.close()
|
|
|
|
return True
|