sonic-buildimage/device/fs/arm64-fs_s5800_48t4s-r0/S5800-48t4s-mars8p/S5800-48t4s-mars8p-chip-profile.txt
FSSec bb09ebe977
[FS][arm64] support new boars s5800-48t4s and s5800-48t8s-mars8p (#12994)
Adding platform support for FS s5800-48t4s and s5800-48t8s-mars8p.

Both s5800-48t4s and s5800-48t8s-mars8p have 48 * 10/100/1000 Base-T ports, 4 * 10GE SFP+ Ports on Centec TsingMa.
s5800-48t4s is different from s5800-48t8s-mars8p in that:

The phy chip used by s5800-48t4s is Marvell 88e1680;
The phy chip used by s5800-48t4s-mars8p is Centec ctc21108;
2022-12-17 14:48:02 -08:00

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#----------------- SDK Feature Support --------------
[MPLS_SUPPORT] = 1;
[APS_SUPPORT] = 1;
[OAM_SUPPORT] = 1;
[PTP_SUPPORT] = 0;
[SYNCE_SUPPORT] = 0;
[STACKING_SUPPORT] = 1;
[BPE_SUPPORT] = 0;
[IPFIX_SUPPORT] = 1;
[MONITOR_SUPPORT] = 1;
[OVERLAY_SUPPORT] = 1;
[EFD_SUPPORT] = 1;
[FCOE_SUPPORT] = 0;
[TRILL_SUPPORT] = 0;
[WLAN_SUPPORT] = 1;
[NPM_SUPPORT] = 1;
[DOT1AE_SUPPORT] = 1;
[DTEL_SUPPORT] = 0;
[FDBSYNC_SUPPORT] = 1;
#----------------- Chip Init Parameter --------------
#Local chip number and global chip id
[Local chip_num] = 1
[Local chip0] = 0
[Local chip1] = 1
#Cut through mode 0: Disable; 1:10/40/100G; 2:1/10/100G; 3:1/10/40G; other:Flex, refer to CUT_THROUGH_BITMAP
[CUT_THROUGH_SPEED] = 0
#Flex cut through mode, speed enable by bitmap, refer to ctc_port_speed_t, Notice: 10M/100M/1G treat as the same speed
[CUT_THROUGH_BITMAP] = 0
#Network cpu port
[CPU_NETWORK_PORT_EN] = 0
[CPU_NETWORK_PORT_ID] = 47
#Enable parity error and multi-bit ecc recover
[ECC_RECOVER_EN] = 0
[TCAM_SCAN_EN] = 0
#----------------- KNET Init Parameter --------------
[KNET_EN] = 0
#----------------- RESILIENT HASH Init Parameter --------------
[RESILIENT_HASH_EN] = 0
#----------------- FTM Init Parameter --------------
#0: default; 1: layer3; 2: ipv6
[FTM Profile] = 0
#----------------- Interrupt Init Parameter --------------
#0: pin, 1: msi
[Interrupt_mode] = 1
[IRQ] = 69
#----------------- NextHop Init Parameter --------------
#0: SDK work in pizzbox (single chip system), 1: SDK work in multi-chip system
[Nexthop Edit Mode] = 0
[External Nexthop Number] = 16384
[MPLS Tunnel Number] = 1024
#----------------- L2 Init Parameter --------------
[FDB Hw Learning] = 0
[Logic Port Num] = 1024
#0: 128 instance per port, 1: 64 instance per port, 2: 32 instance per port
[STP MODE] = 0
[MAX_FID_NUM] = 5120
#STEP:Sync fdb count per second
[FDB_SYNC_STEP] = 100
#----------------- Port Init Parameter --------------
[PORT_STATS_ACL_EN] = 0
#----------------- Stats Init Parameter --------------
[STATS_PORT_EN] = 0
[STATS_ECMP_EN] = 0
#----------------- BPE Init Parameter --------------
[BPE_BR_PORT_EXTENDER_EN] = 0
[BPE_BR_UC_MAX_ECID] = 1024
[BPE_BR_MC_MAX_ECID] = 4096
[BPE_BR_PORT_BASE] = 0
#----------------- Ipuc Init Parameter --------------
#0: tcam use prefix 16; 1: tcam use prefix 8
[IPUC_TCAM_PREFIX_8] = 1
#----------------- QoS Init Parameter --------------
#QoS policer number support 1K/2K/4K/8K, default 4K
[QOS_POLICER_NUM] = 4096
#QoS port queue number support 16/8/8 BPE/4 BPE,
#When resrc_profile.cfg exist, queue number valid,
#Default 8 queue mode
#8 queue = 8
#16 queue = 16
#4 queue BPE = 17
#8 queue BPE = 18
[QOS_PORT_QUEUE_NUM] = 8
#QoS port extend queue number support 0/4, default 0
[QOS_PORT_EXT_QUEUE_NUM] = 0
#QoS CPU reason queue number support 128/64/32, default 128
[QOS_CPU_QUEUE_NUM] = 128
[QOS_INGRESS_VLAN_POLICER_NUM] = 0
[QOS_EGRESS_VLAN_POLICER_NUM] = 0
[QOS_POLICER_MERGE_MODE] = 0
#QOS service queue mode, default 0,0:logic scr port + dstport enq 1:service id + dstport enq
[QOS_SERVICE_QUEUE_MODE] = 0
#Global enable logic dst port + dstport enq
[QOS_SERVICE_QUEUE_EGRESS_EN] = 0
#----------------- Stacking Init Parameter --------------
#0: normal mode; 1: spine-leaf mode
[FABRIC MODE] = 0
[STACKING VERSION] = 1
#----------------- SDK&SAI Debug Level Init Parameter --------------
# SDK_DEBUG_TO_SYSLOG should be enable, 1 : enable ; 0 : disable
[SDK_DEBUG_TO_SYSLOG] = 0;
# Level same as SAI_LOG_LEVEL : 0 : debug ; 1 : info ; 2 : notice ; 3 : warning ; 4 : error ; 5 : critical
[DEBUG_LOG_LEVEL_SDK] = 1 ;
[DEBUG_LOG_LEVEL_SAI] = 0;
# CTC_ERROR_RETURN(g_error_on) in SDK to syslog, 1 : enable ; 0 : disable
[DEBUG_SDK_G_ERROR_ON] = 0;
# SDK debug module id (scope from 1 ~47,detail to see sdk_debug_module_t.csv),default all modules
[DEBUG_SDK_MODULE] = 0;
# part of SDK, 1 : enable in part ; 0 : disable in part
[DEBUG_SDK_CTC] = 0;
[DEBUG_SDK_SYS] = 1;