sonic-buildimage/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D24C52
Stephen Sun f6a8678d8f
Support single ingress pool for MSFT SKUs and optimize headroom calculation (#5194)
This is to backport the #4886 to 201911

Calculate pool size in t1 as 24 * downlink port + 8 * uplink port

- Take both port and peer MTU into account when calculating headroom
- Worst case factor is decreased to 50%
- Mellanox-SN2700-C28D8 t0, assume 48 * 50G/5m + 8 * 100G/40m ports
- Mellanox-SN2700 (C32)
  - t0: 16 * 100G/5m + 16 * 100G/40m
  - t1: 16 * 100G/40m + 16 * 100G/300m

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2020-08-15 07:52:28 -07:00
..
buffers_defaults_t0.j2 Support single ingress pool for MSFT SKUs and optimize headroom calculation (#5194) 2020-08-15 07:52:28 -07:00
buffers_defaults_t1.j2 Support single ingress pool for MSFT SKUs and optimize headroom calculation (#5194) 2020-08-15 07:52:28 -07:00
buffers.json.j2 added files to create SKU Mellanox-SN3800-D24C52 (#4808) 2020-06-28 07:22:12 -07:00
pg_profile_lookup.ini Support single ingress pool for MSFT SKUs and optimize headroom calculation (#5194) 2020-08-15 07:52:28 -07:00
port_config.ini [Mellanox] Change port index in port_config.ini to 1-based (#4781) 2020-06-28 07:24:10 -07:00
qos.json.j2 added files to create SKU Mellanox-SN3800-D24C52 (#4808) 2020-06-28 07:22:12 -07:00
sai_3800_24x50g_52x100g.xml added files to create SKU Mellanox-SN3800-D24C52 (#4808) 2020-06-28 07:22:12 -07:00
sai.profile added files to create SKU Mellanox-SN3800-D24C52 (#4808) 2020-06-28 07:22:12 -07:00