04b9ce8e32
Manual verification on switch (TH3 device) admin@str2-xxxxx-01:~$ bcmcmd bsv bsv BRCM SAI ver: [6.0.0.10], OCP SAI ver: [1.9.1], SDK ver: [sdk-6.5.23] drivshell> admin@str2-xxxxx-01:~$ bcmcmd version version Broadcom Command Monitor: Copyright (c) 1998-2021 Broadcom Release: sdk-6.5.23 built 20211020 (Wed Oct 20 06:52:58 2021) From root@fedbbfdbee81:/__w/2/s/output/x86-xgsall-deb/hsdk Platform: X86 OS: Unix (Posix) Chips: BCM56640_A0, BCM56850_A0, BCM56340_A0, BCM56960_A0, BCM56860_A0, BCM56970_A0, BCM56870_A0, BCM56980_A0, BCM56980_B0, BCM56370_A0, BCM56275_A0, BCM56770_A0, Chips: BCM56780_A0, BCM56782_A0, BCM56784_A0, BCM56785_A0, BCM56786_A0, BCM56787_A0, BCM56788_A0, BCM56789_A0, BCM56880_A0, BCM56880_B0, BCM56881_A0, BCM56881_B0, BCM56883_A0, BCM56883_B0, BCM56990_A0, BCM56990_B0, BCM56991_B0, BCM56992_B0, BCM56996_A0, BCM56996_B0, BCM56997_A0, BCM56997_B0 Variant drivers: BCM56780_A0_CNA_1_2_10, BCM56780_A0_DNA_2_7_6_0, BCM56880_A0_CNA_1_2_9, BCM56880_A0_DNA_4_9_5_0 PHYs: BCM5400, BCM54182, BCM54185, BCM54180, BCM54140, BCM54192, BCM54195, BCM54190, BCM54194, BCM54210, BCM54220, BCM54280, BCM54282, BCM54240, BCM54285, BCM5428X, BCM54290, BCM54292, BCM54294, BCM54295, BCM54296, BCM56160-GPHY, BCM53540-GPHY, BCM56275-GPHY, BCM8750, BCM8752, BCM8754, BCM84740, BCM84164, BCM84758, BCM84780, BCM84784, BCM84318, BCM84328, Sesto, BCM82780, copper sfp drivshell>
95 lines
2.2 KiB
C
95 lines
2.2 KiB
C
/*! \file ngbde_iio.c
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*
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* API for managing and accessing memory-mapped I/O for interrupt
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* controller registers.
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*
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*/
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/*
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* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
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* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* A copy of the GNU General Public License version 2 (GPLv2) can
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* be found in the LICENSES folder.$
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*/
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#include <ngbde.h>
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void *
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ngbde_iio_map(void *devh, phys_addr_t addr, phys_addr_t size)
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{
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struct ngbde_dev_s *sd = (struct ngbde_dev_s *)devh;
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if (sd->iio_mem) {
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if (addr == sd->iio_win.addr && size == sd->iio_win.size) {
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/* Already mapped */
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return sd->iio_mem;
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}
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ngbde_iio_unmap(devh);
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}
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sd->iio_mem = ioremap_nocache(addr, size);
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if (sd->iio_mem) {
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/* Save mapped resources */
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sd->iio_win.addr = addr;
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sd->iio_win.size = size;
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}
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return sd->iio_mem;
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}
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void
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ngbde_iio_unmap(void *devh)
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{
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struct ngbde_dev_s *sd = (struct ngbde_dev_s *)devh;
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if (sd->iio_mem) {
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iounmap(sd->iio_mem);
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sd->iio_mem = NULL;
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}
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}
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void
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ngbde_iio_cleanup(void)
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{
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struct ngbde_dev_s *swdev, *sd;
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unsigned int num_swdev, idx;
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ngbde_swdev_get_all(&swdev, &num_swdev);
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for (idx = 0; idx < num_swdev; idx++) {
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sd = ngbde_swdev_get(idx);
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ngbde_iio_unmap(sd);
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}
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}
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void
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ngbde_iio_write32(void *devh, uint32_t offs, uint32_t val)
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{
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struct ngbde_dev_s *sd = (struct ngbde_dev_s *)devh;
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if (sd->iio_mem) {
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NGBDE_IOWRITE32(val, sd->iio_mem + offs);
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}
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}
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uint32_t
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ngbde_iio_read32(void *devh, uint32_t offs)
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{
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struct ngbde_dev_s *sd = (struct ngbde_dev_s *)devh;
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if (sd->iio_mem) {
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return NGBDE_IOREAD32(sd->iio_mem + offs);
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}
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return 0;
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}
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