787dd7221d
Why I did it Add platform support for Debian 12 (Bookworm) on Mellanox Platform How I did it Update hw-management to v7.0030.2008 Deprecate the sfp_count == module_count approach in favour of asic init completion Ref: Mellanox/hw-mgmt@bf4f593 Add xxd package to base image which is required by hw-management scripts Add the non-upstream flag into linux kernel cache options Update the thermalctl logic based on new sysfs attributes Fix the integrate-mlnx-hw-mgmt script to not populate the arm64 Kconfig How to verify it Build kernel and run platform tests Signed-off-by: Vivek Reddy <vkarri@nvidia.com> Co-authored-by: Junchao-Mellanox <junchao@nvidia.com> Co-authored-by: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
159 lines
4.2 KiB
Diff
159 lines
4.2 KiB
Diff
From be8912e006b49c4f9febcd2556030876737e1b72 Mon Sep 17 00:00:00 2001
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From: Liming Sun <limings@nvidia.com>
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Date: Tue, 4 Apr 2023 19:30:00 -0400
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Subject: [PATCH backport 6.1.42 68/85] UBUNTU: SAUCE: mmc: sdhci-of-dwcmshc:
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Add runtime PM operations for BlueField-3
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BugLink: https://bugs.launchpad.net/bugs/2015307
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This commit implements the runtime PM operations For BlueField-3 SoC
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to disable eMMC card clock when idle.
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Reviewed-by: Khalil Blaiech <kblaiech@nvidia.com>
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Signed-off-by: Liming Sun <limings@nvidia.com>
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Acked-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
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Acked-by: Andrei Gherzan <andrei.gherzan@canonical.com>
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[bzolnier: use a short URL version for BugLink]
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Signed-off-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
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---
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drivers/mmc/host/sdhci-of-dwcmshc.c | 102 +++++++++++++++++++++++++++-
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1 file changed, 101 insertions(+), 1 deletion(-)
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diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
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index 7d657d29af21..32fd0668b427 100644
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--- a/drivers/mmc/host/sdhci-of-dwcmshc.c
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+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
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@@ -17,6 +17,7 @@
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#include <linux/of_device.h>
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#include <linux/reset.h>
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#include <linux/sizes.h>
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+#include <linux/pm_runtime.h>
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#include "sdhci-pltfm.h"
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@@ -91,6 +92,21 @@ struct dwcmshc_priv {
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void *priv; /* pointer to SoC private stuff */
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};
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+/* Last jiffies when entering idle state */
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+static uint64_t idle_last_jiffies;
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+
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+/* Total jiffies in idle state */
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+static uint64_t idle_total_jiffies;
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+
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+/* Total idle time */
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+static int idle_time;
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+module_param(idle_time, int, 0444);
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+MODULE_PARM_DESC(idle_time, "idle time (seconds)");
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+
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+/* The current idle state */
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+static int idle_state;
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+module_param(idle_state, int, 0444);
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+MODULE_PARM_DESC(idle_state, "idle state (0: not idle, 1: idle)");
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/*
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* If DMA addr spans 128MB boundary, we split the DMA transfer into two
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* so that each DMA transfer doesn't exceed the boundary.
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@@ -532,6 +548,7 @@ static int dwcmshc_probe(struct platform_device *pdev)
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#ifdef CONFIG_ACPI
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if (pltfm_data == &sdhci_dwcmshc_bf3_pdata) {
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sdhci_enable_v4_mode(host);
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+ pm_runtime_enable(dev);
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}
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#endif
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@@ -635,7 +652,90 @@ static int dwcmshc_resume(struct device *dev)
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}
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#endif
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-static SIMPLE_DEV_PM_OPS(dwcmshc_pmops, dwcmshc_suspend, dwcmshc_resume);
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+#ifdef CONFIG_PM
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+
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+#ifdef CONFIG_ACPI
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+static void dwcmshc_enable_card_clk(struct sdhci_host *host)
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+{
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+ u16 ctrl;
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+
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+ ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
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+ ctrl |= SDHCI_CLOCK_CARD_EN;
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+ sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL);
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+}
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+
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+static void dwcmshc_disable_card_clk(struct sdhci_host *host)
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+{
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+ u16 ctrl;
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+
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+ ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
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+ ctrl &= ~SDHCI_CLOCK_CARD_EN;
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+ sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL);
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+}
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+#endif
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+
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+static int dwcmshc_runtime_suspend(struct device *dev)
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+{
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+ struct sdhci_host *host = dev_get_drvdata(dev);
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+ const struct sdhci_pltfm_data *pltfm_data;
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+ int ret = 0;
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+
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+ pltfm_data = device_get_match_data(dev);
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+ if (!pltfm_data)
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+ return -ENODEV;
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+
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+#ifdef CONFIG_ACPI
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+ if (pltfm_data == &sdhci_dwcmshc_bf3_pdata) {
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+ ret = sdhci_runtime_suspend_host(host);
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+ if (!ret) {
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+ dwcmshc_disable_card_clk(host);
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+
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+ if (!idle_state) {
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+ idle_state = 1;
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+ idle_last_jiffies = jiffies;
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+ }
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+ }
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+ }
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+#endif
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+
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+ return ret;
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+}
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+
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+static int dwcmshc_runtime_resume(struct device *dev)
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+{
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+ struct sdhci_host *host = dev_get_drvdata(dev);
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+ const struct sdhci_pltfm_data *pltfm_data;
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+ int ret = 0;
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+
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+ pltfm_data = device_get_match_data(dev);
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+ if (!pltfm_data)
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+ return -ENODEV;
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+
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+#ifdef CONFIG_ACPI
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+ if (pltfm_data == &sdhci_dwcmshc_bf3_pdata) {
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+ dwcmshc_enable_card_clk(host);
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+
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+ if (idle_state) {
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+ idle_state = 0;
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+ idle_total_jiffies = jiffies - idle_last_jiffies;
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+ idle_time += jiffies_to_msecs(
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+ idle_total_jiffies) / 1000;
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+ }
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+
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+ ret = sdhci_runtime_resume_host(host, 0);
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+ }
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+#endif
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+
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+ return ret;
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+}
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+
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+#endif
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+
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+static const struct dev_pm_ops dwcmshc_pmops = {
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+ SET_SYSTEM_SLEEP_PM_OPS(dwcmshc_suspend, dwcmshc_resume)
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+ SET_RUNTIME_PM_OPS(dwcmshc_runtime_suspend,
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+ dwcmshc_runtime_resume, NULL)
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+};
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static struct platform_driver sdhci_dwcmshc_driver = {
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.driver = {
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--
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2.20.1
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