os=unix schan_intr_enable=0 l2_mem_entries=40960 l2xmsg_mode=1 l3_mem_entries=40960 mem_cache_enable=0 parity_correction=0 parity_enable=0 pbmp_oversubscribe=0x000fffc0000ffff0003ffffc0000001e pbmp_xport_xe=0x000fffc0000ffff0003ffffc0000001e # Tile-0: 1, 5, 9, 21 portmap_1=1:100 portmap_2=5:100 portmap_3=9:100 portmap_4=21:100 ## TX lane swap xgxs_tx_lane_map_1=0x0123 xgxs_tx_lane_map_2=0x2301 xgxs_tx_lane_map_3=0x0123 xgxs_tx_lane_map_4=0x1302 ## RX lane swap xgxs_rx_lane_map_1=0x0123 xgxs_rx_lane_map_2=0x2301 xgxs_rx_lane_map_3=0x0123 xgxs_rx_lane_map_4=0x2031 ## TX polarity phy_xaui_tx_polarity_flip_1=0x0 phy_xaui_tx_polarity_flip_2=0xf phy_xaui_tx_polarity_flip_3=0x0 phy_xaui_tx_polarity_flip_4=0xf ## RX polarity phy_xaui_rx_polarity_flip_1=0x0 phy_xaui_rx_polarity_flip_2=0xf phy_xaui_rx_polarity_flip_3=0x0 phy_xaui_rx_polarity_flip_4=0xf # Tile-1: 8, 9, 11, 12, 13 portmap_34=33:25 portmap_35=34:25 portmap_36=35:25 portmap_37=36:25 portmap_38=37:25 portmap_39=38:25 portmap_40=39:25 portmap_41=40:25 portmap_42=41:25 portmap_43=42:25 portmap_44=43:25 portmap_45=44:25 portmap_46=49:25 portmap_47=50:25 portmap_48=51:25 portmap_49=52:25 portmap_50=53:25 portmap_51=54:25 portmap_52=55:25 portmap_53=56:25 ## TX lane swap xgxs_tx_lane_map_34=0x3210 xgxs_tx_lane_map_38=0x0123 xgxs_tx_lane_map_42=0x2031 xgxs_tx_lane_map_46=0x0123 xgxs_tx_lane_map_50=0x0123 ## RX lane swap xgxs_rx_lane_map_34=0x2301 xgxs_rx_lane_map_38=0x1032 xgxs_rx_lane_map_42=0x0213 xgxs_rx_lane_map_46=0x2301 xgxs_rx_lane_map_50=0x2301 ## TX polarity phy_xaui_tx_polarity_flip_34=0x0 phy_xaui_tx_polarity_flip_35=0x1 phy_xaui_tx_polarity_flip_36=0x0 phy_xaui_tx_polarity_flip_37=0x1 phy_xaui_tx_polarity_flip_38=0x1 phy_xaui_tx_polarity_flip_39=0x0 phy_xaui_tx_polarity_flip_40=0x1 phy_xaui_tx_polarity_flip_41=0x0 phy_xaui_tx_polarity_flip_42=0x1 phy_xaui_tx_polarity_flip_43=0x0 phy_xaui_tx_polarity_flip_44=0x1 phy_xaui_tx_polarity_flip_45=0x0 phy_xaui_tx_polarity_flip_46=0x0 phy_xaui_tx_polarity_flip_47=0x1 phy_xaui_tx_polarity_flip_48=0x0 phy_xaui_tx_polarity_flip_49=0x1 phy_xaui_tx_polarity_flip_50=0x0 phy_xaui_tx_polarity_flip_51=0x1 phy_xaui_tx_polarity_flip_52=0x0 phy_xaui_tx_polarity_flip_53=0x1 ## RX polarity phy_xaui_rx_polarity_flip_34=0x0 phy_xaui_rx_polarity_flip_35=0x1 phy_xaui_rx_polarity_flip_36=0x0 phy_xaui_rx_polarity_flip_37=0x1 phy_xaui_rx_polarity_flip_38=0x1 phy_xaui_rx_polarity_flip_39=0x0 phy_xaui_rx_polarity_flip_40=0x1 phy_xaui_rx_polarity_flip_41=0x0 phy_xaui_rx_polarity_flip_42=0x1 phy_xaui_rx_polarity_flip_43=0x0 phy_xaui_rx_polarity_flip_44=0x1 phy_xaui_rx_polarity_flip_45=0x0 phy_xaui_rx_polarity_flip_46=0x0 phy_xaui_rx_polarity_flip_47=0x1 phy_xaui_rx_polarity_flip_48=0x0 phy_xaui_rx_polarity_flip_49=0x1 phy_xaui_rx_polarity_flip_50=0x0 phy_xaui_rx_polarity_flip_51=0x1 phy_xaui_rx_polarity_flip_52=0x0 phy_xaui_rx_polarity_flip_53=0x1 # Tile-2: 16, 17, 20, 21 portmap_68=65:25 portmap_69=66:25 portmap_70=67:25 portmap_71=68:25 portmap_72=69:25 portmap_73=70:25 portmap_74=71:25 portmap_75=72:25 portmap_76=81:25 portmap_77=82:25 portmap_78=83:25 portmap_79=84:25 portmap_80=85:25 portmap_81=86:25 portmap_82=87:25 portmap_83=88:25 ## TX lane swap xgxs_tx_lane_map_68=0x3210 xgxs_tx_lane_map_72=0x0123 xgxs_tx_lane_map_76=0x0123 xgxs_tx_lane_map_80=0x3210 ## RX lane swap xgxs_rx_lane_map_68=0x1032 xgxs_rx_lane_map_72=0x2301 xgxs_rx_lane_map_76=0x0123 xgxs_rx_lane_map_80=0x3210 ## TX polarity phy_xaui_tx_polarity_flip_68=0x0 phy_xaui_tx_polarity_flip_69=0x1 phy_xaui_tx_polarity_flip_70=0x0 phy_xaui_tx_polarity_flip_71=0x1 phy_xaui_tx_polarity_flip_72=0x0 phy_xaui_tx_polarity_flip_73=0x1 phy_xaui_tx_polarity_flip_74=0x0 phy_xaui_tx_polarity_flip_75=0x1 phy_xaui_tx_polarity_flip_76=0x0 phy_xaui_tx_polarity_flip_77=0x1 phy_xaui_tx_polarity_flip_78=0x0 phy_xaui_tx_polarity_flip_79=0x1 phy_xaui_tx_polarity_flip_80=0x1 phy_xaui_tx_polarity_flip_81=0x0 phy_xaui_tx_polarity_flip_82=0x1 phy_xaui_tx_polarity_flip_83=0x0 ## RX polarity phy_xaui_rx_polarity_flip_68=0x0 phy_xaui_rx_polarity_flip_69=0x1 phy_xaui_rx_polarity_flip_70=0x0 phy_xaui_rx_polarity_flip_71=0x1 phy_xaui_rx_polarity_flip_72=0x0 phy_xaui_rx_polarity_flip_73=0x1 phy_xaui_rx_polarity_flip_74=0x0 phy_xaui_rx_polarity_flip_75=0x1 phy_xaui_rx_polarity_flip_76=0x0 phy_xaui_rx_polarity_flip_77=0x1 phy_xaui_rx_polarity_flip_78=0x0 phy_xaui_rx_polarity_flip_79=0x1 phy_xaui_rx_polarity_flip_80=0x1 phy_xaui_rx_polarity_flip_81=0x0 phy_xaui_rx_polarity_flip_82=0x1 phy_xaui_rx_polarity_flip_83=0x0 # Tile-3: 24, 25, 26; 27, 29 portmap_102=97:25 portmap_103=98:25 portmap_104=99:25 portmap_105=100:25 portmap_106=101:25 portmap_107=102:25 portmap_108=103:25 portmap_109=104:25 portmap_110=105:25 portmap_111=106:25 portmap_112=107:25 portmap_113=108:25 portmap_114=109:100 portmap_115=117:100 ## TX lane swap xgxs_tx_lane_map_102=0x0123 xgxs_tx_lane_map_106=0x3210 xgxs_tx_lane_map_110=0x0123 xgxs_tx_lane_map_114=0x3120 xgxs_tx_lane_map_115=0x2301 ## RX lane swap xgxs_rx_lane_map_102=0x0123 xgxs_rx_lane_map_106=0x3210 xgxs_rx_lane_map_110=0x0123 xgxs_rx_lane_map_114=0x3120 xgxs_rx_lane_map_115=0x2301 ## TX polarity phy_xaui_tx_polarity_flip_102=0 phy_xaui_tx_polarity_flip_103=1 phy_xaui_tx_polarity_flip_104=0 phy_xaui_tx_polarity_flip_105=1 phy_xaui_tx_polarity_flip_106=1 phy_xaui_tx_polarity_flip_107=0 phy_xaui_tx_polarity_flip_108=1 phy_xaui_tx_polarity_flip_109=0 phy_xaui_tx_polarity_flip_110=0 phy_xaui_tx_polarity_flip_111=1 phy_xaui_tx_polarity_flip_112=0 phy_xaui_tx_polarity_flip_113=1 phy_xaui_tx_polarity_flip_114=0xf phy_xaui_tx_polarity_flip_115=0xf ## RX polarity phy_xaui_rx_polarity_flip_102=0 phy_xaui_rx_polarity_flip_103=1 phy_xaui_rx_polarity_flip_104=0 phy_xaui_rx_polarity_flip_105=1 phy_xaui_rx_polarity_flip_106=1 phy_xaui_rx_polarity_flip_107=0 phy_xaui_rx_polarity_flip_108=1 phy_xaui_rx_polarity_flip_109=0 phy_xaui_rx_polarity_flip_110=0 phy_xaui_rx_polarity_flip_111=1 phy_xaui_rx_polarity_flip_112=0 phy_xaui_rx_polarity_flip_113=1 phy_xaui_rx_polarity_flip_114=0xf phy_xaui_rx_polarity_flip_115=0xf