This is to address an issue where it was observed that SAI operations sometime may take a very long to time complete (over 45ms). It was determined that the ALPM distributed thread was causing this issue.
The fix is to disable this debug thread that has no functional purpose.
Preliminary tests looks fine. BGP neighbors were all up with proper routes programmed
interfaces are all up
Manually ran the fib test cases on 7050CX3 (TD3), TD2, TH, TH2, and TH3 based platforms and
thy all passed.
Note: the testing was done over 20201230 image and are porting this change to master branch.
No need to port this to 20201230 branch as a separate PR was already done for that branch. (#9190)
this PR is created to port the changes made by (#9199) but could not be cherry picked directly to 202106 branch.
However in SAI 3.7 default behaviout got changes to 128 Group and 128
Memeber each.
This change is to make sure we are using same ECMP Group/Memeber Per
Group for 3.7 also so that behaviour is consistent.
Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
as needed by SAI 3.7 and above. Without this change
Warmboot fails from 3.5 to 3.7 as Braodcoam Datastructure
gets corrupted after warm-boot.
Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
* [HWSKU] Added Arista-7060CX-32S-Q24C8 HWSKU
Added an Arista HWSKU with 24x40G + 8x100G ports
The ports are distributed along core lines
Signed-off-by: Michel Moriniaux <m.moriniaux@criteo.com>
* [HWSKU] Added Arista-7060CX-32S-T96C8 HWSKU
Added the bcm config files for a 96x25G+8x100G ToR
Signed-off-by: Michel Moriniaux <m.moriniaux@criteo.com>
* [HWSKU] Added Arista-7060CX-32S-Q24C8 HWSKU
Added an Arista HWSKU with 24x40G + 8x100G ports
The ports are distributed along core lines
Signed-off-by: Michel Moriniaux <m.moriniaux@criteo.com>
