Commit Graph

973 Commits

Author SHA1 Message Date
jostar-yang
519dcde939
[AS7712-32X] Add to support PDDF (#8040)
* [AS7712-32X] Add to support PDDF

Signed-off-by: Jostar Yang <jostar_yang@accton.com.tw>

* Fix LGTM alerts

* Fix AS7712-32X xcvrd busy issue

Co-authored-by: Jostar Yang <jostar_yang@accton.com.tw>
2022-02-10 22:09:50 +05:30
jostar-yang
f9a29ef056
[AS4630-54PE] Add to support PDDF (#8014)
* [AS4630-54PE] Add to support PDDF

Signed-off-by: Jostar Yang <jostar_yang@accton.com.tw>

* Fix LGTM alerts

* Fix LGTM alerts

* Fix  LGTM alerts

* Add post_device.sh to turn off stk led

* Add to support system_health

* Correct the wait and timeout mechanism for better CPU usage

* Add event.c to support port evt change

Co-authored-by: Jostar Yang <jostar_yang@accton.com.tw>
2022-02-10 22:09:05 +05:30
Junchao-Mellanox
05cc8f9df2
[Mellanox] Fix issue: SN4600C has 4 CPU core temperature sensors (#9930)
- Why I did it
platform.json of 4600C only has 2 CPU core thermal sensors, but there are 4 actually

- How I did it
Added thermal sensors for CPU core 2 and core 3.

- How to verify it
Build.
2022-02-09 13:26:40 +02:00
Dror Prital
4361224686
[Mellanox] Add platform.json file into sn4800 SIMx environment (#9931)
- Why I did it
There was a missing file of platform.json on SN4800 SIMx platform

- How I did it
Add symbolic link to platform.json file from the real SN4800 platform

- How to verify it
Run SN4800 SIMx and verify that platfrom.json file exist at the following folder:
/usr/share/sonic/device/x86_64-nvidia_sn4800_simx-r0
2022-02-09 12:51:08 +02:00
saksarav-nokia
d136a39524
[Nokia][platform] Modified Nokia device data to support midplane (#9914)
Added midplane_subnet in chassisdb.conf for interfaces-config.sh to create midplane interface in multi-asic namespaces.

Signed-off-by: Sakthivadivu Saravanaraj <sakthivadivu.saravanaraj@nokia.com>
2022-02-08 14:03:12 -08:00
gechiang
ddfe87a71a
[BRCMSAI 6.0.0.13-1] Fix Cancun file directory at new location causing TD3 platform boot issue (#9922) 2022-02-07 08:56:06 -08:00
jostar-yang
9c5f38b9f3
[AS7726-32X] Add to support mulit PSU SN in PDDF (#8164)
* [AS7726-32X] Add to support mulit PSU in PDDF

Signed-off-by: Jostar Yang <jostar_yang@accton.com.tw>

* Modify SN offset and include path

* Fix device_name to PSU2-EEPROM in PSU2

Co-authored-by: Jostar Yang <jostar_yang@accton.com.tw>
2022-02-07 22:03:11 +05:30
Alexander Allen
e5ee501116
Remove redundant breakout mode for SN3800 (#9912) 2022-02-06 12:53:00 +05:30
Aravind Mani
c48e2488c5
[Dell S6100] Addition of 10G ports (#9906) 2022-02-02 17:30:55 +05:30
saksarav-nokia
e7877bf9df
[Nokia][platform] Modified the bcm config file for Nokia-IXR7250E-36x400G (#9622)
Why I did it
Updated the BCM config recommended by Broadcom for Nokia-IXR7250E-36x400G

How I did it
Updated the BCM config file

How to verify it
Verified running the image with this BCM config in Nokia-IXR7250E-36x400G and ensured that the syncd container was stable, ports were up and passing the traffic.

Signed-off-by: Sakthivadivu Saravanaraj <sakthivadivu.saravanaraj@nokia.com>
2022-01-31 09:53:07 -08:00
Andriy Yurkiv
cb3b9416a6
[Mellanox][VXLAN] add params to vxlan.json file in order to configure VXLAN src port range feature (#9658)
- Why I did it
Remove obsolete parameter that enables static VXLAN src port range
provide functionality no generate json config file according to appropriate parameter in config_db
Done for
SN3800:
• Mellanox-SN3800-D28C50
• Mellanox-SN3800-C64
• Mellanox-SN3800-D28C49S1 (New 10G SKU)

SN2700:
• Mellanox-SN2700-D48C8

- How I did it
Remove SAI_VXLAN_SRCPORT_RANGE_ENABLE=1 from appropriate sai.profile files
Created vxlan.json file and added few params that depends on DEVICE_METADATA.localhost.vxlan_port_range

- How to verify it
File /etc/swss/config.d/vxlan.json should be generated inside swss docker when it restart
[
    {
        "SWITCH_TABLE:switch": {
            "vxlan_src": "0xFF00",
            "vxlan_mask": "8"
        },
        "OP": "SET"
    }
]
Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com>
2022-01-31 15:57:30 +02:00
tjchadaga
3bc5053443
Revert "Dell S6100: Addition of SFP ports (#9820)" (#9872)
Master image build break - changes to reviewed and re-merged with appropriate fix
```
====================================================================== 
FAIL: test_buffers_dell6100_render_template (tests.test_j2files.TestJ2Files) 
---------------------------------------------------------------------- 
Traceback (most recent call last): 
File "/sonic/src/sonic-config-engine/tests/test_j2files.py", line 246, in test_buffers_dell6100_render_template 
self._test_buffers_render_template('dell', 'x86_64-dell_s6100_c2538-r0', 'Force10-S6100', 'sample-dell-6100-t0-minigraph.xml', 'buffers.json.j2', 'buffers-dell6100.json') 
File "/sonic/src/sonic-config-engine/tests/test_j2files.py", line 243, in _test_buffers_render_template 
assert filecmp.cmp(sample_output_file, self.output_file) 
AssertionError 
```

This reverts commit 533471231a.
2022-01-27 10:31:28 -08:00
Aravind Mani
533471231a
Dell S6100: Addition of SFP ports (#9820) 2022-01-25 16:12:15 -08:00
vdahiya12
61e9a7683c
[y_cable] Support for initialization of new daemon ycable to support ycables (#9125)
* [y_cable] Support for initialization of new Daemon ycable to support
ycables
This PR also adds the commit in sonic-platform-daemons

94fa239 [y_cable] refactor y_cable to a seperate logic and new daemon from xcvrd (#219)

Why I did it
This PR separates the logic of Y-Cable from xcvrd. Before this change we were utilizing xcvrd daemon to control all aspects of Y-Cable right from initialization to processing requests from other entities like orch,linkmgr.
Now we would have another daemon ycabled which will serve this purpose.
Logically everything still remains the same from the perspective of other daemons.
it also take care aspects like init/delete daemon from Y-Cable perspective.

How I did it
To serve the purpose we build a new wheel sonic_ycabled-1.0-py3-none-any.whl and install it inside pmon.
We also initalize the daemon ycabled which serves our purpose for refactor inside pmon

How to verify it
Ran the changes with an image for dualtor tests on a 7050cx3 platform

Signed-off-by: vaibhav-dahiya <vdahiya@microsoft.com>
2022-01-25 11:10:25 -08:00
Alexander Allen
8a07af95e5
[Mellanox] Modified Platform API to support all firmware updates in single boot (#9608)
Why I did it
Requirements from Microsoft for fwutil update all state that all firmwares which support this upgrade flow must support upgrade within a single boot cycle. This conflicted with a number of Mellanox upgrade flows which have been revised to safely meet this requirement.

How I did it
Added --no-power-cycle flags to SSD and ONIE firmware scripts
Modified Platform API to call firmware upgrade flows with this new flag during fwutil update all
Added a script to our reboot plugin to handle installing firmwares in the correct order with prior to reboot
How to verify it
Populate platform_components.json with firmware for CPLD / BIOS / ONIE / SSD
Execute fwutil update all fw --boot cold
CPLD will burn / ONIE and BIOS images will stage / SSD will schedule for reboot
Reboot the switch
SSD will install / CPLD will refresh / switch will power cycle into ONIE
ONIE installer will upgrade ONIE and BIOS / switch will reboot back into SONiC
In SONiC run fwutil show status to check that all firmware upgrades were successful
2022-01-24 00:56:38 -08:00
Samuel Angebault
20f7ae853b
Add platform.json configs for all denali SKUs (#9717) 2022-01-20 12:14:44 +05:30
Christian Svensson
bc56e064c3
[Celestica/Seastone2] Load interface LEDs (#9769)
Tested on a Celestica Seastone2 DX030 switch

Testing scenarios:
- Various QSFP ports in both normal and breakout config.
- 100G and 40G link speed show different colors.
- SFP1 port works.

Signed-off-by: Christian Svensson <blue@cmd.nu>
2022-01-19 00:42:51 -08:00
Kebo Liu
2cc973b582
[Mellanox] update system_health_monitoring_config for MSN4410/MSN4600/MSN4700 (#9728)
- Why I did it
For MSN4410/MSN4600/MSN4700 now they can support fetching PSU voltage threshold, no need to skip the psu voltage check in system health monitoring, so update the system health monitoring configuration file for these platforms.

- How I did it
remove skip PSU change config from the system_health_monitoring_config.json file

- How to verify it
Build image run on these platforms, system health monitoring will not report error against PSU voltage

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2022-01-19 10:29:26 +02:00
Alexander Allen
c80dabd0d8
[Mellanox] Add 2x40G support to MSN4700 platform (#9485)
- Why I did it
MSN4700 platform has 8 lanes per port and thus can support 2x40G with each lane running at 10G

- How I did it
Added 40G to 2x200G breakout mode in platform.json

- How to verify it
Run config int break Ethernet0 2x40G[200G,100G,50G,25G,10G,1G]
And verify the command runs successfully and the port speed was set to 40G with a 2x breakout.
2022-01-18 08:21:25 +02:00
Andriy Kokhan
4037867b7d
[BFN] Updated platform plugins (#9540)
* [BFN] Updated platform APIs impl

Signed-off-by: Andriy Kokhan <andriyx.kokhan@intel.com>

* Extended BFN platform SFP APIs implementation

* Update sfp.py

* [BFN] Extended SFP platform plugin implementation

Signed-off-by: Andriy Kokhan <andriyx.kokhan@intel.com>

* [BFN] Extended Fans platform plugin implementation

* [BFN] divided classes Fan and  FanDrawer into 2 files

* Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com>

What I did
	Add get_model() function
	Add get_low_critical_threshold() function
	Change __get(...) function.
How I did it
	Differnece from previous implementation of __get(...) function is return real value or -9999.9 if value is not provided by thrift API

* Add get_presence() function and revised __get() function

Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com>

* [BFN] Updated PSU platform APIs impl

Signed-off-by: Dmytro Lytvynenko <dmytrox.lytvynenko@intel.com>

* Added BFN PSU cache (#9)

Signed-off-by: Andriy Kokhan <andriyx.kokhan@intel.com>

* [BFN]  Fans and Fantray platform APIs update (#7)

* [BFN] Updated SFP platform APIs (#10)

Signed-off-by: Volodymyr Boyko <volodymyrx.boiko@intel.com>

* [BFN] Updated platform API for thermal (#8)

* Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com>

* Revert "[BFN]  Fans and Fantray platform APIs update (#7)" (#11)

This reverts commit c62a733443be49cbe4ba2d06047aac7516f0495e.

* Add support health monitor system (#15)

Signed-off-by: Petro Bratash <petrox.bratash@intel.com>

* Update chassis.py

* [BFN] Updated FANs and FAN Tray platform API (#14)

* Fix fix_alignment (#17)

Signed-off-by: Petro Bratash <petrox.bratash@intel.com>

* [BFN] Improvement show environment (#16)

* Added PSU temperature skip into platform.json (#18)

Signed-off-by: Andriy Kokhan <andriyx.kokhan@intel.com>

* Do not skip psud on Newport

Signed-off-by: Andriy Kokhan <andriyx.kokhan@intel.com>

* [BFN] fix fan status from Not OK to Ok (#19)

* [BFN] Updated SFP platform plugin (#13)

Signed-off-by: Volodymyr Boyko <volodymyrx.boiko@intel.com>

* [DPB] Fix typo for Ethernet0 2x200G[100G,40G] breakout mode (#21)

Signed-off-by: Mykola Gerasymenko <mykolax.gerasymenko@intel.com>

* [barefoot] Tmp fix vendor_rev (#22)

Signed-off-by: Volodymyr Boyko <volodymyrx.boiko@intel.com>

* Fixed python issues in sonic_platform/fan_drawer.py

Signed-off-by: Andriy Kokhan <andriyx.kokhan@intel.com>

* Updated fan_drawer.py

* Fixing trailing white spaces in fan_drawer.py

* [BFN] Fix thrift for SFPs API

Signed-off-by: Volodymyr Boyko <volodymyrx.boiko@intel.com>

* In platform.json, replaced 'false' with '0' to workaround ast.literal_eval() issue

Signed-off-by: Andriy Kokhan <andriyx.kokhan@intel.com>

* [Newport] Thermal manager  (#23)

* Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com>

* Revert "In platform.json, replaced 'false' with '0' to workaround ast.literal_eval() issue"

This reverts commit 1e73127830.

* Removed 'controllable' options from platform.json to fix factory default config generation

Signed-off-by: Andriy Kokhan <andriyx.kokhan@intel.com>

* Update thermal_manager.py

* Migrated SFP plugin to sonic_xcvr API (#30)

Signed-off-by: Andriy Kokhan <andriyx.kokhan@intel.com>

Co-authored-by: KostiantynYarovyiBf <kostiantynx.yarovyi@intel.com>
Co-authored-by: Vadym Yashchenko <vadymx.yashchenko@intel.com>
Co-authored-by: Dmytro Lytvynenko <dmytrox.lytvynenko@intel.com>
Co-authored-by: Volodymyr Boiko <volodymyrx.boiko@intel.com>
Co-authored-by: Petro Bratash <petrox.bratash@intel.com>
Co-authored-by: Mykola Gerasymenko <mykolax.gerasymenko@intel.com>
2022-01-17 11:16:20 +05:30
SeanWu
a2d1798a11
[AS7315-27XB] Fix build error and incorrect I2C bus number (#9712)
* Add intel_iommu=off to installer.conf

* This solve flooding DMAR err msg: "handling fault status reg 2"

Signed-off-by: Sean Wu <sean_wu@edge-core.com>

* remove customized at24 driver

* Use kernel 5.10.46 upstream at24 driver directly. The ADDR16 issue on
old driver has gone.

Signed-off-by: Sean Wu <sean_wu@edge-core.com>

* pin I2C-0/I2C-1 bus order

* otherwise, sometimes I2C-0/I2C-1 will be assigned to the undesired one.

Signed-off-by: Sean Wu <sean_wu@edge-core.com>

* fix i2c bus num for fan driver

Signed-off-by: Sean Wu <sean_wu@edge-core.com>

* backward compatible with R0A/R0B HW

Signed-off-by: Sean Wu <sean_wu@edge-core.com>
2022-01-16 12:13:16 +05:30
Viktor Ekmark
1b657becc9
[Celestica Seastone2] Build correct platform files (#9660)
* fix workdir for seastone2

Signed-off-by: Viktor Ekmark <viktor@ekmark.se>

* seastone2: Add I2C SFP definition for SFP1

Signed-off-by: Christian Svensson <blue@cmd.nu>

* [device/cel_seastone_2] sfputil logic for SFP1

Earlier logic resulted in the name of SFP1 being SFP33 which is not
correct. The cannonical source is seastone2_fpga module and it calls it
SFP1, so ensure the logic does as well.

Signed-off-by: Christian Svensson <blue@cmd.nu>

* [device/cel_seastone_2] sysfs paths for SFP1

Various changes that plumbs the correct port presence and DOM decoding
for the SFP1 port.

Signed-off-by: Christian Svensson <blue@cmd.nu>

Co-authored-by: Christian Svensson <blue@cmd.nu>
2022-01-16 12:11:28 +05:30
Samuel Angebault
4e72757dd1
[Arista] Change default_sku for 7050QX-32S (#9730) 2022-01-16 07:36:22 +05:30
Kebo Liu
8bb9ed6876
[Mellanox] Add sensors conf for MSN4600C A1 platform (#9706)
- Why I did it
Add sensor conf for MSN4600C A1 platform

- How I did it
Add a new sensor conf file and relevant scripts to support two different versions of the platform

- How to verify it
Run "sensors" cmd to check the output on the A1 platform to see whether it's as expected.
Signed-off-by: Kebo Liu <kebol@nvidia.com>
2022-01-13 07:59:35 +02:00
SeanWu
a5515b5297
[Accton] Enable pca954x i2c mux idle_disconnect for 5.10 kernel (#9745)
Enable pca954x idle_disconnect to avoid possible I2C device address conflict.

How I did it
Change pca954x device_attr idle_state to -2 (MUX_IDLE_DISCONNECT).

How to verify it
Cat pca954x device_attr idle_state and confirm the value is -2.

Signed-off-by: Sean Wu <sean_wu@edge-core.com>
2022-01-12 13:43:47 -08:00
Aravind Mani
2865fd4c72
[DellEMC] DMA errors are seen when loading bullseye kernel (#9641)
Following errors are seen continuously on SMBus controller when loading bullseye kernel.

[ 273.643046] DMAR: [DMA Write] Request device [00:12.0] PASID ffffffff fault addr 0 [fault reason 05] PTE Write access is not set
[ 273.785784] DMAR: DRHD: handling fault status reg 2
[ 273.844072] DMAR: [DMA Write] Request device [00:12.0] PASID ffffffff fault addr 0 [fault reason 05] PTE Write access is not set
[ 273.986804] DMAR: DRHD: handling fault status reg 2
[ 274.045101] DMAR: [DMA Write] Request device [00:12.0] PASID ffffffff fault addr 0 [fault reason 05] PTE Write access is not set
[ 274.187789] DMAR: DRHD: handling fault status reg 2

root@sonic:~# lspci -s 00:12.0 -vv
00:12.0 System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller - Host (rev 11)

Issue was not seen in buster. 

Modified platform specific installer.conf to turn off io_mmu
2022-01-03 08:47:13 -08:00
Arun Saravanan Balachandran
174833d319
DellEMC: S6100, S6000 - Platform API implementation (#9586)
Why I did it
To incorporate the below changes in DellEMC S6100, S6000 platforms.

S6100, S6000:
Implement 'get_revision' method for Chassis
Implement 'get_maximum_consumed_power' method for FanDrawer
Implement 'get_revision', 'get_maximum_supplied_power' methods for PSU
Implement 'get_error_description' method for SFP.
S6100:
Implement 'get_module_index' method for Chassis
Implement 'get_description', 'get_maximum_consumed_power', 'get_oper_status', 'get_slot' methods for Module
Update component names in platform.json
How I did it
Implement the platform API methods in the respective device files

How to verify it
Verified that the respective sonic-mgmt platform API test cases report success.
2022-01-02 22:38:35 -08:00
Arun Saravanan Balachandran
a888a2d98d
DellEMC: S6000, S6100, Z9332f - Update platform.json (#9459)
Why I did it
To include newer Fan LED, thermal capabilities fields in platform.json of DellEMC S6000, S6100, Z9332f platforms.

How I did it
Add the capabilities fields in each platform's respective platform.json.

How to verify it
Ran sonic-mgmt platform api test cases that use capabilities fields and verified that the results are as expected.
2022-01-02 22:31:34 -08:00
Raphael Tryster
c2b0af89fb
Added platform.json in Mellanox Spectrum-4 and older simx platforms (#9621)
- Why I did it
Added missing functionality for dynamic buffer calculation in Spectrum-4.

- How I did it
Added a section of code in asic_table.j2 for Spectrum-4, and added the simx version of SN5600 to the supported list.

- How to verify it
Manually: buffershow -l should show all ingress/egress lossy/lossless pools, and all fields of profiles should show values.
Automatically: https://github.com/Azure/sonic-mgmt/blob/master/tests/qos/test_buffer.py

Signed-off-by: Raphael Tryster <raphaelt@nvidia.com>
2022-01-02 09:58:40 +02:00
Junchao-Mellanox
b0f0d4e963
[Mellanox] Fix platform name for SN4800 (#9635)
- Why I did it
Rename MSN4800 to SN4800 in platform files

- How I did it
Rename MSN4800 to SN4800 in platform files

- How to verify it
Run build.
2021-12-28 14:58:28 +02:00
Stephen Sun
34be53a22e
Fix typo and missing files in SN3800 and SN4600C's buffer templates (#9537)
Why I did it
Fix typo and missing files in SN3800 and SN4600C's buffer templates

How I did it
ingress_lossless_xoff_size => ingress_lossless_pool_xoff add missing files for SN4600C-D100C12S2

How to verify it
Deploy the fix and verify whether the device can be up.

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2021-12-20 13:31:45 -08:00
LuiSzee
9e19a9a7cf
[centec] support v682-48y8c and v682-48x8c (#9349)
Why I did it
Adding platform support for centec v682-48y8c and v682-48x8c.
V682-48y8c switch has 48 SFP+ (1G/10G/25G) ports, 8 QSFP28 (40G/100G) ports on CENTEC TsingMa.MX.
V682-48y8c is different from V682-48y8c_d in that:

transceiver is managed by cpu smbus rather than TsingMa.MX i2c bus.
port led is managed by mcu inside TsingMa.MX.
fan, psu, sensors, leds are managed by cpu smbus other than the cpu board vendor's close sourse driver.
V682-48x8c switch has 48 SFP+ (1G/10G) ports, 8 QSFP28 (40G/100G) ports on CENTEC TsingMa.MX.
CPU used in v682-48y8c and v682-48x8c is Intel(R) Xeon(R) CPU D-1527.

How I did it
Modify related code in platform and device directory.
Upgrade centec sai to v1.9.
upgrade python to python3 and kernel version to 5.0 for V682-48y8c_d.
How to verify it
Build centec amd64 sonic image, verify platform functions (port, sfp, led etc) on centec v682-48y8c and v682-48x8c board.

Co-authored-by: shil <shil@centecnetworks.com>
2021-12-17 15:20:27 -08:00
zzhiyuan
a6d0a27a18
[Arista] Increase switch PCIe timeout for 7060-cx32s (#9248)
Co-authored-by: Zhi Yuan (Carl) Zhao <zyzhao@arista.com>
Why I did it
Arista 7060 platform has a rare and unreproduceable PCIe timeout that could possibly be solved with increasing the switch PCIe timeout value. To do this we'll call a script for this platform to increase the PCIe timeout on boot-up.

No issues would be expected from the setpci command. From the PCIe spec:

"Software is permitted to change the value in this field at any
time. For Requests already pending when the Completion
Timeout Value is changed, hardware is permitted to use either
the new or the old value for the outstanding Requests, and is
permitted to base the start time for each Request either on when
this value was changed or on when each request was issued. "

How I did it
Add "platform-init" support in swss docker similar to how "hwsku-init" is called, only this would be for any device belonging to a platform. Then the script would reside in device data folder.

Additionally, add pciutils dependency to docker-orchagent so it can run the setpci commands.

How to verify it
On bootup of an Arista 7060, can execute:
lspci -vv -s 01:00.0 | grep -i "devctl2"
In order to check that the timeout has changed.
2021-12-17 08:43:25 -08:00
Vadym Hlushko
727a94634c
[Mellanox] [SN4410] Fixed capability files - port_config.ini, hwsku.json, platform.json (#9538)
- Why I did it
The capability files were incorrect in comparison to the marketing spec of the SN4410 platform.

- How I did it
Aligned the capability files according to the marketing spec.

- How to verify it
Basic manual sanity checks:
1. Check if critical docker containers were UP
2. Check if interfaces were created and were UP
3. Check if interfaces created in the syncd docker container by executing – sx_api_ports_dump.py script
4. Check the logs from the start of the switch – everything was OK
5. Verified the port breakout

Signed-off-by: Vadym Hlushko <vadymh@nvidia.com>
2021-12-15 19:25:20 +02:00
Junchao-Mellanox
d05afb5dbd
[Mellanox] Rename platform x86_64-mlnx_msn4800 to x86_64-nvidia_sn4800 (#9512)
- Why I did it
Rename platform x86_64-mlnx_msn4800 to x86_64-nvidia_msn4800

- How I did it
Rename platform folder as well as all code that reference the platform name

- How to verify it
Manual test
2021-12-15 09:08:04 +02:00
Alexander Allen
325276a917
[Mellanox] Add copyright headers to Mellanox-SN4600C-D100C12S2 SKU (#9345)
Missing NVIDIA copyright header from some files.
2021-12-10 08:23:26 +02:00
Raphael Tryster
e3c0a888c9
[Mellanox] Add support of SN5600 platform on top of Nvidia ASIC simulation (#9392)
- Why I did it
Add new Spectrum-4 system support SN5600 on top of Nvidia ASIC simulator.

- How I did it
Add all relevant system and simulator SKU.
Updated syseeprom.hex and related directories to reflect Nvidia SN5600 brand name.

- How to verify it
Tested init flow, basic show commands, up interfaces, traffic test.

Signed-off-by: Raphael Tryster <raphaelt@nvidia.com>
2021-12-09 17:46:24 +02:00
Aravind Mani
ac2885a988
[SFP-Refactor] Modify transceiver key name (#9447)
* Modify transceiever key name

* fix alignment
2021-12-09 12:38:45 +05:30
Samuel Angebault
d499455752
[Arista] Update driver submodules (#9393)
- Use SfpOptoeBase by default to leverage new `sonic_xcvr` refactor
 - Add support for `Woodleaf` product
 - Move `libsfp-eeprom.so` to a different `.deb` package
 - Add new logrotate configuration for arista logs
 - Improve logging mechanism for the drivers (IO loglevel, fix syslog duplicates)
 - Initialize chassis cards in parallel
 - Refactor of `get_change_event` to fix interrupts treated as presence change
2021-12-08 11:33:36 -08:00
Arun Saravanan Balachandran
6d07efa890
[DellEMC S6000]: Move fan control to thermalctld from fancontrol.sh (#7239)
Why I did it
To implement fan control using thermalctld in DellEMC S6000 platform

Requires: Azure/sonic-linux-kernel#241

How I did it
Add thermal policies in 'thermal_policy.json'
Implemented thermal_manager.py and the necessary modules to perform fan control via thermalctld
Removed fancontrol.sh
How to verify it
Verified that the fan speeds are set based on the fan and temperature status.
Logs: S6000_fan_control_test_logs.txt
2021-12-08 10:43:14 -08:00
Stephen Sun
2d097ded8a
[Mellanox] Adjust buffer parameters with 2km cable supported for 4600C non-generic SKUs (#9215)
- Why I did it
Also recalculated all parameters with the latest algorithm with per-speed peer response time taken into account

- How I did it
Detailed information of each SKU:

C64:
t0: 32 100G downlinks and 32 100G uplinks
t1: 56 100G downlinks and 8 100G uplinks with 2km-cable supported
D112C8: 112 50G downlinks and 8 100G uplinks.
D48C40: 48 50G downlinks, 32 100G downlinks, and 8 100G uplinks
D100C12S2: 4 100G downlinks, 2 10G downlinks, 100 50G downlinks, and 8 100G uplinks
2km cable is supported for C64 on t1 only

- How to verify it
Run regression test (QoS)

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2021-12-08 15:51:33 +02:00
Song Yuan
27a6641fb8
[QoS, Buffer template][new HW SKU] Add qos config and buffer profile for Arista SKU (#8380) 2021-12-07 14:14:32 -08:00
Arun Saravanan Balachandran
6d8c509817
[DellEMC] S6100 - iTCO watchdog support and reboot cause determination changes (#9149)
Why I did it
To support iTCO watchdog using watchdog APIs.
How I did it
Implemented a new watchdog class WatchdogTCO for interfacing with iTCO watchdog.
Updated reboot cause determination logic.
How to verify it
Verified that the watchdog APIs' return values are as expected.
Logs: UT_logs.txt
2021-12-06 21:52:20 -08:00
Lior Avramov
1fce3ebda3
[Mellanox] Add support for SN2201 platform (#9333)
- Why I did it
Add support for SN2201 platform

- How I did it
Add required content for SN2201 platform
Note: still missing kernel driver support for this system. Once all is upstream will be updated as well.

- How to verify it
Install and basic sanity tests including traffic.

Signed-off-by: liora liora@nvidia.com
2021-12-06 14:47:50 +02:00
byu343
a8cf990879
Add macsec_ipg setting to arista platforms (#9396) 2021-12-06 10:32:43 +08:00
Wirut Getbamrung
b28c800f17
[device/celestica]: add controllable config to platform.json of e1031 (#9183) 2021-11-30 13:59:21 +08:00
Stephen Sun
ba853348d5
[Reclaim buffer] Reclaim unused buffers by applying zero buffer profiles (#8768)
Signed-off-by: Stephen Sun stephens@nvidia.com

Why I did it
Support zero buffer profiles

Add buffer profiles and pool definition for zero buffer profiles
Support applying zero profiles on INACTIVE PORTS
Enable dynamic buffer manager to load zero pools and profiles from a JSON file
Dependency: It depends on Azure/sonic-swss#1910 and submodule advancing PR once the former merged.

How I did it
Add buffer profiles and pool definition for zero buffer profiles

If the buffer model is static:
Apply normal buffer profiles to admin-up ports
Apply zero buffer profiles to admin-down ports
If the buffer model is dynamic:
Apply normal buffer profiles to all ports
buffer manager will take care when a port is shut down
Update buffers_config.j2 to support INACTIVE PORTS by extending the existing macros to generate the various buffer objects, including PGs, queues, ingress/egress profile lists

Originally, all the macros to generate the above buffer objects took active ports only as an argument
Now that buffer items need to be generated on inactive ports as well, an extra argument representing the inactive ports need to be added
To be backward compatible, a new series of macros are introduced to take both active and inactive ports as arguments
The original version (with active ports only) will be checked first. If it is not defined, then the extended version will be called
Only vendors who support zero profiles need to change their buffer templates
Enable buffer manager to load zero pools and profiles from a JSON file:

The JSON file is provided on a per-platform basis
It is copied from platform/<vendor> folder to /usr/share/sonic/temlates folder in compiling time and rendered when the swss container is being created.
To make code clean and reduce redundant code, extract common macros from buffer_defaults_t{0,1}.j2 of all SKUs to two common files:

One in Mellanox-SN2700-D48C8 for single ingress pool mode
The other in ACS-MSN2700 for double ingress pool mode
Those files of all other SKUs will be symbol link to the above files

Update sonic-cfggen test accordingly:

Adjust example output file of JSON template for unit test
Add unit test in for Mellanox's new buffer templates.

How to verify it
Regression test.
Unit test in sonic-cfggen
Run regression test and manually test.
2021-11-29 08:04:01 -08:00
abdosi
5c2423e974
Added 40G {300/40/5m} pg lookup profile for 7260 100G SKU (#9249)
What I did:
Added 40G {300/40/5m} profile for 7260 100G SKU
2021-11-24 18:56:30 -08:00
Guohan Lu
f3faf6111b Revert "[gearbox] provide common gbsyncd.service.j2 to start for platform specific gbsyncd docker (#9286)"
This reverts commit 1d2a11bbb8.
2021-11-19 10:10:55 -08:00
Mykola Gerasymenko
fba7a7f389
[barefoot] add platform.json and hwsku.json for Newport (#8964)
To support dynamic port breakout configurations on Newport platforms.

Signed-off-by: Mykola Gerasymenko <mykolax.gerasymenko@intel.com>
2021-11-18 10:23:46 -08:00