Commit Graph

291 Commits

Author SHA1 Message Date
Kebo Liu
1b5f72127a
[Mellanox] Remove SFP sensors from sensors.conf (#17631)
- Why I did it
The cable thermal sensors will be deprecated from the kernel driver. When cable host management is enabled, NOS will fetch the cable temperature from cable EEPROM, kernel driver will not provide the sysfs anymore.

- How I did it
Remove the relevant sensor form the conf files

- How to verify it
Run sonic mgmt sensor test

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2024-02-12 16:12:57 +02:00
Volodymyr Samotiy
f1d6655004
[Mellanox] Disable SSD NCQ on Mellanox platforms (#17567)
- Why I did it
Based on some research some products might experience an occasional IO failures in the communication between CPU and SSD because of NCQ.
There seems to be a problem between some kernel versions and some SATA controllers.

Syslog error message examples:

Error "ata1: SError: { UnrecovData Handshk }" - "failed command: WRITE FPDMA QUEUED".
Error "ata1: SError: { RecovComm HostInt PHYRdyChg CommWake 10B8B DevExch }" - "failed command: READ FPDMA QUEUED".
Some vendors already disabled NCQ on their platforms in SONiC due to similar issue:

[Arista] Disable ATA NCQ for a few products #13739 [Arista] Disable ATA NCQ for a few products
[Arista] Disable SSD NCQ on DCS-7050CX3-32S #13964 [Arista] Disable SSD NCQ on DCS-7050CX3-32S
Also there are other discussions on Debian/Ubuntu forums about similar issues and it was suggested to disable NCQ:

https://askubuntu.com/questions/133946/are-these-sata-errors-dangerous

- How I did it
Add a kernel parameter to tell libata to disable NCQ

- How to verify it
Use FIO tool - fio --direct=1 --rw=randrw --bs=64k --ioengine=libaio --iodepth=64 --runtime=120 --numjobs=4
2024-01-28 16:26:07 +02:00
Junchao-Mellanox
c1cb292310
[Mellanox] implement platform wait in python code (#17398)
- Why I did it
New implementation of Nvidia platform_wait due to:
1. sysfs deprecated by hw-mgmt
2. new dependencies to SDK
3. For CMIS host management mode

- How I did it
wait hw-management ready
wait SDK sysfs nodes ready

- How to verify it
manual test
unit test
sonic-mgmt regression
2023-12-14 12:04:24 +02:00
DavidZagury
ee598deced
[Mellanox][SKU] Adding Mellanox-SN4700-O8V48 SKU (#17425)
- Why I did it
To add new SKU Mellanox-SN4700-O8V48 with following requirements:

- How I did it
Create new SKU files based on the below definition:
* Port Mapping: 1-12 2x200G, 13-20 1x400G, 21-32 2x200G
   T0 topology: 48x200G Downlinks 8x400G uplinks.
   Length of downlink: 5m
   Length of uplink: 40m
* Auto-negotiation enable/disable: Yes
* FEC mode: RS
* Shared headroom: Enabled
* Shared headroom pool factor: 2
* Warmboot enabled: yes

- How to verify it
SONiC build with new SKU finish init, all ports up, qos tests suite from sonic-mgmt
2023-12-10 16:18:11 +02:00
Junchao-Mellanox
c02c8f0cc3
[Mellanox] remove log in RAM kernel option for 2700 A1 platform (#17254)
- Why I did it
Remove logs_inram kernel option

- How I did it
Remove logs_inram kernel option

- How to verify it
SONiC mgmt regression test of 202305
2023-12-05 17:52:38 +02:00
Vivek
787dd7221d [Mellanox] Upgrade HW-MGMT to 7.0030.2008 and update platform-api (#17134)
Why I did it
Add platform support for Debian 12 (Bookworm) on Mellanox Platform

How I did it
Update hw-management to v7.0030.2008
Deprecate the sfp_count == module_count approach in favour of asic init completion
Ref: Mellanox/hw-mgmt@bf4f593
Add xxd package to base image which is required by hw-management scripts
Add the non-upstream flag into linux kernel cache options
Update the thermalctl logic based on new sysfs attributes
Fix the integrate-mlnx-hw-mgmt script to not populate the arm64 Kconfig
How to verify it
Build kernel and run platform tests

Signed-off-by: Vivek Reddy <vkarri@nvidia.com>
Co-authored-by: Junchao-Mellanox <junchao@nvidia.com>
Co-authored-by: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
2023-11-21 18:53:15 -08:00
Oleksandr Ivantsiv
c2af11064f
[Mellanox] Change the default breakout mode for internal ports of the Mellanox-SN4700-O28 SKU. (#17192)
- Why I did it
Fix the issue with configuration generation from the minigrapth:

- How I did it
Change the default breakout mode for internal ports to the mode that corresponds platfom.json configuration.

- How to verify it
1. Deploy minigraph
2. Run config load_minigraph -y command
2023-11-21 09:51:36 +02:00
Stephen Sun
b93852d53d
[Mellanox] Support running hw-management service on MSN4700 emulation platform (#16584)
- Why I did it
Support running hw-management service on MSN4700 emulation platform.

- How I did it
Use physical EEPROM instead of the fake one
Do not skip PSUd, PCId, thermal control daemon
Adjust PCIe and thermal configuration files
Adjust platform.json for different chassis names and thermals
Remove a patch to hw-management in order to enable it

- How to verify it
Run Nvidia simulation on SN4700 (ASIC and Platform)

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2023-11-19 11:03:46 +02:00
Kebo Liu
8b62e7a5b2
[Mellanox] fix new MSN2700-A1 platform name (#17151)
- Why I did it
New introduced MSN2700 platform has a different platform name compared to the old one, it should be "MSN2700-A1".

- How I did it
Update the name to the new one in platform.json and platform_components.json.

- How to verify it
run platform-related sonic-mgmt test cases on the new platform.

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2023-11-15 08:29:11 +02:00
Sudharsan Dhamal Gopalarathnam
070d488e9d
[Mellanox] [SN5600] Removing 8x DPB mode from platform files (#17071)
- Why I did it
Removing 8x split DPB mode from platform files since it is not fully supported yet.

- How I did it
Updating platform file.

- How to verify it
Manual testing.
2023-11-07 08:45:23 +02:00
Nazarii Hnydyn
845bb80a3c
[ppi]: Enable global port late create for all Mellanox HWSKUs. (#16945)
HLD: sonic-net/SONiC#1084

To improve FAST reboot dataplane downtime

Signed-off-by: Nazarii Hnydyn <nazariig@nvidia.com>
2023-11-01 21:50:14 -07:00
Ashwin Srinivasan
61683d9d64
Revert "Move /var/log to RAM for Mellanox SN2700, Nokia 7215 and Dell S6100 (#15077)" (#16775)
This reverts commit 05f326eed9.

Microsoft ADO 25355843:
2023-10-11 10:36:29 -07:00
Yakiv Huryk
5719d1a59a
[Mellanox] add Mellanox-SN4700-O28 SKU (#16784)
- Why I did it
To add new SKU for Virtual Smart Switch. T1 switch with 28x400G ports.

- How I did it
Add new SKU with all relevant files.

- How to verify it
run sonic-mgmt t1-28 test suites based on master.
Few issues observed not relevant to the topology but to the stability of master

Signed-off-by: Yakiv Huryk <yhuryk@nvidia.com>
2023-10-10 19:20:10 +03:00
Nazarii Hnydyn
875a6d9a1f
[Mellanox][Switching Mode] Enable Store-And-Forward switching mode on specific platforms (#16781)
- Why I did it
To enable Store-And-Forward switching mode for SN2700/SN3800/SN4600C/SN4700 on specific and requested SKUs. Default SKU remain untouched.

- How I did it
Added vendor SAI config options

- How to verify it
make configure PLATFORM=mellanox
make target/sonic-mellanox.bin
run sonic-mgmt test suits while this option is enabled.

Signed-off-by: Nazarii Hnydyn <nazariig@nvidia.com>
2023-10-09 19:00:02 +03:00
Vadym Hlushko
3bd396043e
[buffers] Add 'create_only_config_db_buffers.json' file for the Mellanox devices (not MSFT SKU) (#16233)
* [buffers] Add create_only_config_db_buffers.json for MLNX devices (not MSFT SKU), inject it at the start of the swss docker

Signed-off-by: vadymhlushko-mlnx <vadymh@nvidia.com>

* [buffers] Align the sonic-device_metadata.yang

Signed-off-by: vadymhlushko-mlnx <vadymh@nvidia.com>

---------

Signed-off-by: vadymhlushko-mlnx <vadymh@nvidia.com>
2023-10-03 08:35:57 -07:00
Nazarii Hnydyn
d1ea3620c0
[Mellanox]: Update default SKU for SN2700. (#16663)
Set default SKU for SN2700: Mellanox-SN2700 -> ACS-MSN2700

Signed-off-by: Nazarii Hnydyn <nazariig@nvidia.com>
2023-09-30 01:43:30 -07:00
Junchao-Mellanox
5138afe4e7
[Mellanox] add new platform 2700 a1 (#16515)
- new pcie.yaml
- new sensors.conf
- new thermal support
- new platform.json file
- adjust test code
2023-09-23 00:15:17 -07:00
Kebo Liu
e286869b24
[Mellanox] Update HW-MGMT package to new version V.7.0030.1011 (#16239)
- Why I did it
1. Update Mellanox HW-MGMT package to newer version V.7.0030.1011
2. Replace the SONiC PMON Thermal control algorithm with the one inside the HW-MGMT package on all Nvidia platforms
3. Support Spectrum-4 systems

- How I did it
1. Update the HW-MGMT package version number and submodule pointer
2. Remove the thermal control algorithm implementation from Mellanox platform API
3. Revise the patch to HW-MGMT package which will disable HW-MGMT from running on SIMX
4. Update the downstream kernel patch list

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2023-09-06 11:32:08 +03:00
Vadym Hlushko
78587cedc3
[Mellanox] Remove mlxtrace support for SPC4 (#16373)
- Why I did it
Because the Spectrum4 devices don't support mlxtrace utility.

- How I did it
Edit sai.profile and remove mlxtrace_spectrum4_itrace_*.cfg.ext files

Signed-off-by: vadymhlushko-mlnx <vadymh@nvidia.com>
2023-09-04 10:53:20 +03:00
Junchao-Mellanox
0be57803e2
[Mellanox] Revise label name and fix typo in sensor.conf of 4600C (#16271)
- Why I did it
Revise lable name and fix typo in sensor.conf of 4600C

- How I did it
Revise lable name and fix typo in sensor.conf of 4600C

- How to verify it
Manual test
sonic-mgmt test_sensors.py
2023-08-31 19:41:12 +03:00
Nazarii Hnydyn
65b0011866
[Mellanox] [PPI] Enable global port late create for SN5600 (#15866)
- Why I did it
Enabled port late create on SN5600 Spectrum-4 switch boots up with no ports

Work item tracking
N/A

- How I did it
Updated SAI xml config file

- How to verify it
Run sonic-mgmt tests of fastboot

Signed-off-by: Nazarii Hnydyn <nazariig@nvidia.com>
2023-08-28 14:50:53 +03:00
Vivek
d4923615d6
[Mellanox] [SN4410] Support new breakout modes for PAM4 (#15668)
- Why I did it
Add new breakout modes to be used in PAM4 supported cables

- How I did it

- How to verify it
Verified the 50G per lane breakout modes are applied properly on the switch

Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
2023-08-16 08:30:33 +03:00
Stephen Sun
97a091abd2
[Mellanox] Use Debian reboot in Nvidia platform reboot when it is invoked from kdump capture boot (#15701)
#### Why I did it

When a kernel crash occurs, the system will reboot to the kdump capture kernel if kdump is enabled (`config kdump enable`). In the kdump capture boot, it only stores the crash information, and then reboot the system to a normal boot.
In this boot, no SONiC service is started but it invokes `reboot` which is actually the SONiC reboot that depends on SONiC services. There is a logic to skip all SONiC stuff and invoke platform reboot in SONiC reboot to avoid issues.
However, on Nvidia platforms, the platform reboot still depends on SONiC services, which can cause issues.
So, the Debian reboot is called directly in platform reboot if it is invoked from the kdump capture boot.

#### How I did it

Manual test
2023-08-04 13:24:38 -07:00
Vadym Hlushko
521a86b2de
[Mellanox] Add mlxtrace to techsupport (#15961)
- Why I did it
Added the fwtrace config files in order to be able to call the mlxstrace utility during the show techsupport dump.

Work item tracking
Microsoft ADO (number only):

- How I did it
Added fwtrace config files. Added path to these files to sai.profile for each mlnx device.

- How to verify it
Execute the show techsupport command and check if mlxstrace output is in system dump.

Signed-off-by: vadymhlushko-mlnx <vadymh@nvidia.com>
2023-08-03 11:36:58 +03:00
Ashwin Srinivasan
0b067bfb2a
[master] Mellanox: 2700, 4600c - Quoted device IDs to prevent false flags in pcied (#15896)
Why I did it
Certain all-numeric device IDs of PCI devices in the pcie.yaml file are left unquoted, leading to false mismatch flags in the pcie daemon and subsequently leads to log flooding. This PR fixes that issue.

Work item tracking
Microsoft ADO (number only): 24578930
How I did it
Added quotes around numeric PCI devices in the pcie.yaml files of the following platforms:

x86_64-mlnx_msn2700-r0
x86_64-mlnx_msn4600c-r0

How to verify it
Install latest image after the merge and verify that syslogs are not flooded with PCI device mismatch errors
2023-07-18 21:14:00 -07:00
Prince George
05f326eed9
Move /var/log to RAM for Mellanox SN2700, Nokia 7215 and Dell S6100 (#15077)
* add ONIE_PLATFORM_EXTRA_CMDLINE_LINUX to kernel bootparam
2023-06-26 10:58:39 -07:00
Kebo Liu
3cb13226be
Update SN5600 platform.json with service port sfp (#15337)
Signed-off-by: Kebo Liu <kebol@nvidia.com>
2023-06-13 14:15:15 +03:00
Sudharsan Dhamal Gopalarathnam
5680c544b6
[Mellanox]Adding SKU Mellanox-SN4700-O8C48 (#15179)
#### Why I did it
To add new SKU Mellanox-SN4700-O8C48 with following requirements:

| Port configuration | Value |
| ------  |--------- |
 | Breakout mode for each port  |**Defined in port mapping** |
| Speed of the port |  **Defined in Port mapping** |
| Auto-negotiation enable/disable | **No setting required** |
| FEC mode | **No setting required** |
|Type of transceiver used | **Not needed**|

 Buffer configuration | Value
------  |---------
 Shared headroom | **Enabled**
 Shared headroom pool factor | **2**
 Dynamic Buffer | **Disable**
 In static buffer scenario how many uplinks and downlinks? | **48x100G  Downlinks and  8x400G uplinks**
 2km cable support required? | **Yes**

Switch configuration | Value
------  |---------
 Warmboot enabled? | **yes**
 Should warmboot be added to SAI profile when enabled? | **yes**
 Is VxLAN source port range set? | **No**
 Should Vxlan source port range be added to SAI profile when set. | **No**
 Is Static Policy Based Hashing enabled? | **No**

Port Mapping

| Ports  | Mode      |
| ------  |--------- |
| 1-12   | 2x100G |
| 13-20  | 1x400G   | 
| 21-32  | 2x100G |


Number of Uplinks / Downlinks:
T1 topology: **48x100G Downlinks 8x400G uplinks**.
Length of downlink: **40m**
Length of uplink: **2000m**

##### Work item tracking
- Microsoft ADO **(number only)**:

#### How I did it
Defined the SKU as per requirements

#### How to verify it
Load the SKU and verify if all links come up and traffic passes.


#### A picture of a cute animal (not mandatory but encouraged)
2023-06-02 13:10:04 -07:00
Vivek
d3f2d06117
[Mellanox] Add Copyright Headers for missing files (#15136)
Added NVIDIA copyright to missing files under platform/mellanox & device/mellanox
Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
2023-05-25 07:55:44 +03:00
DavidZagury
a10c1951d6
[Mellanox] Update SN5600 SAI XML file (#14947)
- Why I did it
Update SAI xml file to align with the default SKU

- How I did it
Update the SN5600 SAI xml file

- How to verify it
Install image on SN5600 device
2023-05-10 20:43:27 +03:00
Kebo Liu
14a5f21c08
[Mellanox] Update SN5600 sensors.conf and pcie.yaml files (#14883)
- Why I did it
Update the sensors.conf and pcie.yaml according to the real hardware.

- How I did it
Update the sensors.conf and pcie.yaml

- How to verify it
run relevant sonic-mgmt test cases.

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2023-05-02 10:36:57 +03:00
Stephen Sun
3112997b5a
[Mellanox] Advance hw-mgmt to v.7.0020.4104 (#13372)
- Why I did it
Advance hw-mgmt service to V.7.0020.4100
Add missing thermal sensors that are supported by hw-mgmt package
Delay system health service before hw-mgmt has started on Mellanox platform in order to avoid reading some sensors before ready.
Depends on sonic-net/sonic-linux-kernel#305

- How I did it
1. Update hw mgmt version
2. Add missing sensors
3. Delay service 

- How to verify it
Regression test.

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2023-02-12 11:23:47 +02:00
Stephen Sun
e3ff08833e
[Mellanox] Support DSCP remapping in dual ToR topo on T0 switch (#12605)
- Why I did it
Support DSCP remapping in dual ToR topo on T0 switch for SKU Mellanox-SN4600c-C64, Mellanox-SN4600c-D48C40, Mellanox-SN2700, Mellanox-SN2700-D48C8.

- How I did it
Regarding buffer settings, originally, there are two lossless PGs and queues 3, 4. In dual ToR scenario, the lossless traffic from the leaf switch to the uplink of the ToR switch can be bounced back.
To avoid PFC deadlock, we need to map the bounce-back lossless traffic to different PGs and queues. Therefore, 2 additional lossless PGs and queues are allocated on uplink ports on ToR switches.

On uplink ports, map DSCP 2/6 to TC 2/6 respectively
On downlink ports, both DSCP 2/6 are still mapped to TC 1
Buffer adjusted according to the ports information:
Mellanox-SN4600c-C64:
56 downlinks 50G + 8 uplinks 100G
Mellanox-SN4600c-D48C40, Mellanox-SN2700, Mellanox-SN2700-D48C8:
24 downlinks 50G + 8 uplinks 100G

- How to verify it
Unit test.

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2023-02-07 16:21:59 +02:00
Junchao-Mellanox
7d38b459e4
[Mellanox] Add device files for SN5600 (#12831)
- Why I did it
Add device files for new platform SN5600

- How I did it
Add device files for new platform SN5600

- How to verify it
Manual test
2022-11-30 19:47:50 +02:00
Vivek
a68ce12dd6
[Mellanox] [SKU] Added Mellanox-SN4700-A96C8V8 SKU (#12347)
- Why I did it
A new SKU for MSN4700 Platform i.e. Mellanox-SN4700-V16A96

Requirements:

Breakout:
Port 1-24: 4x25G(4)[10G,1G]
Port 25-28: 2x100G[200G,50G,40G,25G,10G,1G]
Port 29-32: 2x200G[100G,50G,40G,25G,10G,1G]
Downlinks: 96 (1-24) + 4 (25-28)
Uplinks: 4 (29-32)
Shared Headroom: Enabled
Over Subscribe Ratio: 1:4
Default Topology: T0
Default Cable Length for T1: 5m
VxLAN source port range set: No
Static Policy Based Hashing Supported: No

Additional Details:
QoS params: The default ones defined in qos_config.j2 will be applied
Small Packet Percentage: Used 50% for traditional buffer model Note: For dynamic model, the value defined in LOSSLESS_TRAFFIC_PATTERN|AZURE|small_packet_percentage is used
SKU was drafted under the assumption that the downlink ports uses xcvr's that will only support the first 4 lanes of the physical port they are connected to. Hence for the ports 1-24, the last four lanes are not used
Cable Lengths used for generating buffer_defaults_{t0,t1}.j2 values

Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
2022-10-20 09:50:07 +03:00
Vivek
bc8ee7a105
[Mellanox] [SKU] Mellanox-SN4700-V48C32 SKU added (#12250)
A new SKU for MSN4700 Platform i.e. Mellanox-SN4700-V48C32

Requirements:
Breakout:
Port 1-24: 2x200G
Port 25-32: 4x100G
Downlinks: 48 (1-24)
Uplinks: 32 (25-32)
Shared Headroom: Enabled
Over Subscribe Ratio: 1:8
Default Topology: T1
Default Cable Length for T1: 300m
VxLAN source port range set: No
Static Policy Based Hashing Supported: No
Additional Details:
QoS params: The default ones defined in qos_config.j2 will be applied
Small Packet Percentage: Used 50% for traditional buffer model Note: For dynamic model, the value defined in LOSSLESS_TRAFFIC_PATTERN|AZURE|small_packet_percentage is used
Cable Lengths used for generating buffer_defaults_{t0,t1}.j2 values

Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
2022-10-18 12:11:02 +03:00
Sudharsan Dhamal Gopalarathnam
629343e0b7
[Mellanox]Adding SKU Mellanox-SN2700-D44C10 (#12396)
#### Why I did it
To add new SKU Mellanox-SN2700-D44C10 with following requirements:

| Port configuration | Value |
| ------  |--------- |
 | Breakout mode for each port  |**Defined in port mapping** |
| Speed of the port |  **Defined in Port mapping** |
| Auto-negotiation enable/disable | **No setting required** |
| FEC mode | **No setting required** |
|Type of transceiver used | **Not needed**|

 Buffer configuration | Value
------  |---------
 Shared headroom | **Enabled**
 Shared headroom pool factor  |  **2**
 Dynamic Buffer | **Disable**
 In static buffer scenario how many uplinks and downlinks? | **44 x50G and 2x100G Downlinks 8x100G uplinks**
 2km cable support required? | **No**

Switch configuration | Value
------  |---------
 Warmboot enabled? | **yes**
 Should warmboot be added to SAI profile when enabled? | **yes**
 Is VxLAN source port range set? | **No**
 Should Vxlan source port range be added to SAI profile when set. | **No**
 Is Static Policy Based Hashing enabled? | **No**

Port Mapping

| Ports  | Mode      |
| ------  |--------- |
| 1,2      | 1x100G |
|  3-6    | 2x50G   | 
| 7-10   | 1x100G |
| 11-22 | 2x50G   |
| 23-26 | 1x100G | 
| 27-32 | 2x50G   |

Number of Uplinks / Downlinks:
TO topology: **44 x50G and 2x100G Downlinks 8x100G uplinks**.

#### How I did it
Defined the SKU as per requirements

#### How to verify it
Load the SKU and verify if all links come up and traffic passes.
2022-10-14 22:12:28 -07:00
Mai Bui
648ca075c7
[device/mellanox] Mitigation for security vulnerability (#11877)
Signed-off-by: maipbui <maibui@microsoft.com>
Dependency: [PR (#12065)](https://github.com/sonic-net/sonic-buildimage/pull/12065) needs to merge first.
#### Why I did it
`subprocess.Popen()` and `subprocess.check_output()` is used with `shell=True`, which is very dangerous for shell injection.
#### How I did it
Disable `shell=True`, enable `shell=False`
#### How to verify it
Tested on DUT, compare and verify the output between the original behavior and the new changes' behavior.
[testresults.zip](https://github.com/sonic-net/sonic-buildimage/files/9550867/testresults.zip)
2022-10-06 17:51:31 -04:00
Dror Prital
44356fa8d7
[Mellanox] Add NVIDIA copyright header for NVIDIA added files (#12130)
- Why I did it
Add NVIDIA Copyright header for new "NVIDIA" files

- How I did it
Add the copyright header as remark at the head of the file
2022-10-02 11:34:24 +03:00
Kebo Liu
78eeeb7670
[SN2201] remove extra empty lines in the pg_profile_lookup.ini (#11923)
- Why I did it
Remove extra empty lines in the SN2201 pg_profile_lookup.ini to make it aligned with other platforms.
This extra empty line could confuse some test cases which need to parse this file.

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2022-09-04 10:53:07 +03:00
Saikrishna Arcot
186568a21d
Update sensor names for msn4600c for the 5.10 kernel (#11491)
* Update sensor names for msn4600c for the 5.10 kernel

Looks like a sensor was removed in the 5.10 kernel for the tps53679
sensor, so the names/indexing has changed.

Related to Azure/sonic-mgmt#4513.

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>

* Update sensors file

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
2022-08-29 11:34:23 -07:00
Vivek
f3c1c14d22
[Mellanox] [4700] Update platform capability file to support new breakout mode (#11614)
- Why I did it
This new breakout mode is required when a QSFP cable is used on the QSFP-DD supported 4700 port. since QSFP only uses the first 4 lanes, this mode is required to restrict the child ports to only use the first four lanes

- How I did it
Updated the platfrom.json file with the extended data

- How to verify it
Tested on one port:

root@msn-4700:/home/admin# show int status
  Interface                            Lanes    Speed    MTU    FEC    Alias    Vlan    Oper    Admin                                             Type    Asym PFC
-----------  -------------------------------  -------  -----  -----  -------  ------  ------  -------  -----------------------------------------------  ----------
  Ethernet0                                0      25G   9100    N/A    etp1a  routed      up       up                                  QSFP28 or later         N/A
  Ethernet1                                1      25G   9100    N/A    etp1b  routed    down       up                                              N/A         N/A
  Ethernet2                                2      25G   9100    N/A    etp1c  routed    down       up                                              N/A         N/A
  Ethernet3                                3      25G   9100    N/A    etp1d  routed    down       up                                              N/A         N/A

Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
2022-08-24 11:55:33 +03:00
DavidZagury
027bc7f044
[Mellanox] Add support for Service Port in SN5600 (#11609)
- Why I did it
SN5600 has an additional service interface with a different parameters than other interfaces.

- How I did it
Added the etp65 interface with the correct parameters.

- How to verify it
Run platform test on SN5600 platform.
Check the service port can startup correctly.
2022-08-15 11:47:56 +03:00
Vivek
15e59fce00
[Mellanox] [SKU] Mellanox-SN4700-C128 SKU added (#11574)
- Why I did it
New SKU for MSN-4700 Platform i.e. Mellanox-SN4700-C128

Requirements:
* Breakout: Port 1-32: 4x100G
* Downlinks: 120 (1-30)
* Uplinks: 8 (31-32)
* Shared Headroom: Enabled
* Over Subscribe Ratio: 1:8
* Default Topology: T2
* Default Cable Length for T2: 1500m
* QoS params: The default ones defined in qos_config.j2 will be applied
* Small Packet Percentage: Used 50% for traditional buffer model Note: For dynamic model, the value defined in LOSSLESS_TRAFFIC_PATTERN|AZURE|small_packet_percentage is used

Additional Details:
Switch Type has to be programmed as SpineRouter through config_db.json in DEVICE_METADATA|localhost|type field for the buffer values & cable lengths defined in the buffers_defaults_t2.j2 to apply on the device
Cable Lengths Used for generating buffer_defaults_{t0,t1,t2}.j2 values

Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
2022-08-11 10:37:33 +03:00
Kebo Liu
3660129d68
[Mellanox] Add Sensor conf to support respined platforms(SN3700/SN3700C/SN4600C) (#11553)
- Why I did it
Add new sensor conf file to support respined platforms(SN3700/SN3700C/SN4600C)

- How I did it
Add new sensor conf
Update the get_sensors_conf_path scripts to apply the sensor conf according to the HW respin version info

- How to verify it
run platform test(including sensor test)

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2022-08-10 18:09:10 +03:00
Stephen Sun
de4755be9a
Support queue 7 in dual ToR scenario (#11571)
Signed-off-by: Stephen Sun <stephens@nvidia.com>
2022-08-01 09:27:36 +08:00
Stephen Sun
8f4a1b7b85
[Mellanox] Support Mellanox-SN4600C-C64 as T1 switch in dual-ToR scenario (#11261)
- Why I did it
Support Mellanox-SN4600C-C64 as T1 switch in dual-ToR scenario
This is to port #11032 and #11299 from 202012 to master.

Support additional queue and PG in buffer templates, including both traditional and dynamic model
Support mapping DSCP 2/6 to lossless traffic in the QoS template.
Add macros to generate additional lossless PG in the dynamic model
Adjust the order in which the generic/dedicated (with additional lossless queues) macros are checked and called to generate buffer tables in common template buffers_config.j2
Buffer tables are rendered via using macros.
Both generic and dedicated macros are defined on our platform. Currently, the generic one is called as long as it is defined, which causes the generic one always being called on our platform. To avoid it, the dedicated macrio is checked and called first and then the generic ones.
Support MAP_PFC_PRIORITY_TO_PRIORITY_GROUP on ports with additional lossless queues.
On Mellanox-SN4600C-C64, buffer configuration for t1 is calculated as:

40 * 100G downlink ports with 4 lossless PGs/queues, 1 lossy PG, and 3 lossy queues
16 * 100G uplink ports with 2 lossless PGs/queues, 1 lossy PG, and 5 lossy queues

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2022-07-20 09:48:15 +03:00
Kebo Liu
7ac590b5c5
[Mellanox] Enhance Platform API to support SN2201 - RJ45 ports and new components mgmt. (#10377)
* Support new platform SN2201 and RJ45 port

Signed-off-by: Kebo Liu <kebol@nvidia.com>

* remove unused import and redundant function

Signed-off-by: Kebo Liu <kebol@nvidia.com>

* fix error introduced by rebase

Signed-off-by: Kebo Liu <kebol@nvidia.com>

* Revert the special handling of RJ45 ports (#56)

* Revert the special handling of RJ45 ports

sfp.py
sfp_event.py
chassis.py

Signed-off-by: Stephen Sun <stephens@nvidia.com>

* Remove deadcode

Signed-off-by: Stephen Sun <stephens@nvidia.com>

* Support CPLD update for SN2201

A new class is introduced, deriving from ComponentCPLD and overloading _install_firmware
Change _install_firmware from private (starting with __) to protected, making it overloadable

Signed-off-by: Stephen Sun <stephens@nvidia.com>

* Initialize component BIOS/CPLD

Signed-off-by: Stephen Sun <stephens@nvidia.com>

* Remove swb_amb which doesn't on DVT board any more

Signed-off-by: Stephen Sun <stephens@nvidia.com>

* Remove the unexisted sensor - switch board ambient - from platform.json

Signed-off-by: Stephen Sun <stephens@nvidia.com>

* Do not report error on receiving unknown status on RJ45 ports

Translate it to disconnect for RJ45 ports
Report error for xSFP ports

Signed-off-by: Stephen Sun <stephens@nvidia.com>

* Add reinit for RJ45 to avoid exception

Signed-off-by: Stephen Sun <stephens@nvidia.com>

Co-authored-by: Stephen Sun <5379172+stephenxs@users.noreply.github.com>
Co-authored-by: Stephen Sun <stephens@nvidia.com>
2022-06-20 19:12:20 -07:00
Kebo Liu
b2bc90e34b
add flag skip_xcvrd_cmis_mgr to skip cmis task on Nvidia platform (#11120)
Signed-off-by: Kebo Liu <kebol@nvidia.com>
2022-06-15 16:33:08 -07:00
Kebo Liu
a3895c3116
[Mellanox] Update SN2201 sai profile and platform reboot script (#10978)
- Why I did it
1. SN2201 sai profile needs to be updated according to the latest hardware.
2. In the reboot script, need to use the common symbol link of the power_cycle sysfs instead of directly accessing it due to SN2201 sysfs is different than other platforms.
3. echo 1 > $SYSFS_PWR_CYCLE will trigger the reboot immediately, the following sleep 3 and echo 0 > $SYSFS_PWR_CYCLE will never be executed, can be removed.

- How I did it
1. Replace the SN2201 sai profile with the latest one.
2. In the platform_reboot script, replace the direct sysfs path with the symbol link path.
3. Remove the redundant code from platform_reboot

- How to verify it
Perform reboot on all the Nvidia platforms, and check all can be rebooted successfully.

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2022-06-07 15:05:54 +03:00