Commit Graph

24 Commits

Author SHA1 Message Date
Kebo Liu
1158701edc
add pcied config files for mellanox platform (#5669)
This PR has a dependency on community change to move PCIe config files from $PLATFORM/plugin folder to $PLATFORM/ folder
- Why I did it
To support PCIed daemon on Mellanox platforms
- How I did it
Add PCIed config yaml files for all Mellanox platforms
Update pmon daemon config files for SimX platforms
2020-11-02 19:45:36 -08:00
Nazarii Hnydyn
5486f87afc
[Mellanox] Update platform components config files. (#5685)
Signed-off-by: Nazarii Hnydyn <nazariig@nvidia.com>
2020-10-25 19:44:37 +02:00
Stephen Sun
c8277a4eba
Update buffer configuration for SKUs based on SN3800 (#5320)
C64: 32 100G down links and 32 100G up links.
D112C8: 112 50G down links and 8 100G up links.
D24C52: 24 50G down links, 20 100G down links, and 32 100G up links.
D28C50: 28 50G down links, 18 100G down links, and 32 100G up links.

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2020-09-22 19:10:18 +03:00
Nazarii Hnydyn
e2b4afc438
[Mellanox] Update platform components config files. (#5360)
Signed-off-by: Nazarii Hnydyn <nazariig@nvidia.com>
2020-09-13 10:23:22 +03:00
Stephen Sun
54fcdbb380
Support single ingress pool for MSFT SKUs and optimize headroom calculation (#4686)
Calculate pool size in t1 as 24 * downlink port + 8 * uplink port

- Take both port and peer MTU into account when calculating headroom
- Worst case factor is decreased to 50%
- Mellanox-SN2700-C28D8 t0, assume 48 * 50G/5m + 8 * 100G/40m ports
- Mellanox-SN2700 (C32)
  - t0: 16 * 100G/5m + 16 * 100G/40m
  - t1: 16 * 100G/40m + 16 * 100G/300m

Signed-off-by: Stephen Sun <stephens@mellanox.com>

Co-authored-by: Stephen Sun <stephens@mellanox.com>
2020-08-13 13:12:09 +03:00
Stephen Sun
0db7e88313
[Mellanox] Update the buffer setting (#4989)
* Update the buffer size based on the latest excel

Signed-off-by: Stephen Sun <stephens@mellanox.com>

* Align the buffer configuration with the latest formula:

- reduce redundant "*2" in formula
- use port MTU for local sending the PFC frame and peer lossless MTU for peer sending lossless traffic

Buffer pool size updated accordingly.

Signed-off-by: Stephen Sun <stephens@mellanox.com>
2020-07-30 14:22:08 +03:00
Junchao-Mellanox
e1f7fb135b
[Mellanox] Add system health configuration file for Mellanox platforms (#4834)
The new feature system health support a platform based configuration file. Add configuration files for all Mellanox platform.

Add a configuration file for SN2700, other platform will use a soft link to it.
2020-07-13 10:20:22 -07:00
Junchao-Mellanox
563a0fd21e
[Mellanox] Change port index in port_config.ini to 1-based (#4781)
* Change port index in port_config.ini to 1-based
* Add default port index to port_config.ini, change platform plugins to accept 1-based port index
* fix port index in sfp_event.py
2020-06-23 17:21:36 -07:00
madhanmellanox
d2366d4ff7
added files to create SKU Mellanox-SN3800-C64 (#4812)
* added files to create SKU Mellanox-SN3800-C64
Co-authored-by: Madhan Babu <madhan@arc-build-server.mtr.labs.mlnx>
2020-06-22 08:42:30 -07:00
madhanmellanox
b5f1b37386
added files to create SKU Mellanox-SN3800-D24C52 (#4808)
* added files to create SKU Mellanox-SN3800-D24C52

Co-authored-by: Madhan Babu <madhan@arc-build-server.mtr.labs.mlnx>
2020-06-21 12:19:11 -07:00
madhanmellanox
5efd1e7527
added files to create SKU Mellanox-SN3800-D28C50 (#4809)
* added files to create SKU Mellanox-SN3800-D28C50

Co-authored-by: Madhan Babu <madhan@arc-build-server.mtr.labs.mlnx>
2020-06-21 12:17:56 -07:00
madhanmellanox
b5d0bada19
modified files relevant to SKU Mellanox-SN3800-D112C8 (#4810)
* modified files relevant to SKU Mellanox-SN3800-D112C8

Co-authored-by: Madhan Babu <madhan@arc-build-server.mtr.labs.mlnx>
2020-06-21 12:16:16 -07:00
Stephen Sun
a87bf4df83
[Mellanox] Fix error in sensors.conf for 3700/3700c/3800 (#4506) 2020-04-30 10:30:58 -07:00
Stephen Sun
e363293ac0
[Mellanox]Mellanox-SN3800-D112C8 support warm-reboot (#4482) 2020-04-27 12:47:44 -07:00
noaOrMlnx
837c13fa63
[Mellanox] Enable ISSU on MSN2100, MSN2740, MSN3800 (#4387) 2020-04-08 02:39:36 -07:00
Mykola F
7e7777e374
[devices][Mellanox] create sai.xml for MSN3800-D112-C8 (#4334)
sai_xml contains info about port splits, previously it simply linked to the MSN3800 sai xml, which does not have splits. New version describes splits and speeds according to Mellanox-SN3800-D112-C8 SKU.

Practically it can cause port recreation on SAI init.

Signed-off-by: Mykola Faryma <mykolaf@mellanox.com>
2020-03-31 11:25:52 -07:00
Stephen Sun
8f0ff4b764
[Mellanox] Calculate the buffer size based on the latest excel and with gearbox considered (#4239) 2020-03-11 13:44:18 -07:00
Junchao-Mellanox
be549db395
Add thermal control support for SONiC (#3949) 2020-03-09 10:41:10 -07:00
Stepan Blyshchak
fb59e9d753
[mellanox] enable ISSU on SPC2 systems (#4087)
Signed-off-by: Stepan Blyschak <stepanb@mellanox.com>
2020-02-11 09:54:38 -08:00
Nazarii Hnydyn
fc101b6ceb
[mellanox]: Add new Mellanox-SN3800-D112C8 sku. (#4085)
Signed-off-by: Nazarii Hnydyn <nazariig@mellanox.com>
2020-01-30 18:54:09 -08:00
Stephen Sun
3239d7fc5b [Mellanox]Implement plugins for PSU, fan and thermal (#4041)
* [plugins]add fan functions, add voltage, current, power for psu
* [plugins]link fanutil.py and psuutil.py to those in 2700
* [plugin]add thermal
* [plugin]add symbol links for thermalutil for all SKUs
2020-01-24 11:27:32 -08:00
Nazarii Hnydyn
cb2edcf3df [mellanox] Add fwutil platform components. (#3999)
Signed-off-by: Nazarii Hnydyn <nazariig@mellanox.com>
2020-01-24 11:26:17 -08:00
Nazarii Hnydyn
37ba921449 [mellanox] Update SN3800 device configs. (#3633)
Signed-off-by: Nazarii Hnydyn <nazariig@mellanox.com>
2019-10-19 12:11:58 +03:00
Nazarii Hnydyn
c6e442b946 [mellanox]: Added SN3800 platform (#3262)
* [mellanox]: Added SN3800 platform.

Signed-off-by: Nazarii Hnydyn <nazariig@mellanox.com>
2019-08-01 16:25:44 -07:00