Commit Graph

25 Commits

Author SHA1 Message Date
gechiang
ef457ab13f
Disable ALPM distributed hitbit thread that is used for debug purpose only but interfered with Other functional operations (#9199) 2021-11-09 07:21:57 -08:00
Ashok Daparthi-Dell
6cbdf11e53
SONIC QOS YANG - Remove qos tables field value refernce format (#7752)
Depends on Azure/sonic-utilities#1626
Depends on Azure/sonic-swss#1754

QOS tables in config db used ABNF format i.e "[TABLE_NAME|name] to refer fieldvalue to other qos tables.

Example:
Config DB:
"Ethernet92|3": {
"scheduler": "[SCHEDULER|scheduler.1]",
"wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]"
},
"Ethernet0|0": {
"profile": "[BUFFER_PROFILE|ingress_lossy_profile]"
},
"Ethernet0": {
"dscp_to_tc_map": "[DSCP_TO_TC_MAP|AZURE]",
"pfc_enable": "3,4",
"pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]",
"tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP|AZURE]",
"tc_to_queue_map": "[TC_TO_QUEUE_MAP|AZURE]"
},

This format is not consistent with other DB schema followed in sonic.
And also this reference in DB is not required, This is taken care by YANG "leafref".

Removed this format from all platform files to consistent with other sonic db schema.
Example:
"Ethernet92|3": {
"scheduler": "scheduler.1",
"wred_profile": "AZURE_LOSSLESS"
},

Dependent pull requests:
#7752 - To modify platfrom files
#7281 - Yang model
Azure/sonic-utilities#1626 - DB migration
Azure/sonic-swss#1754 - swss change to remove ABNF format
2021-09-28 09:21:24 -07:00
gechiang
8e903f4566
BRCM Disable ACL Drop counted towards interface RX_DRP counters (#8382)
* BRCM Disable ACL Drop counted towards interface RX_DRP counters
2021-08-10 19:03:22 -07:00
gechiang
6fc279b7c1
Add BRCM SOC Property to not count ACL drops towards interface RX_DRP… (#7945)
* Add BRCM SOC Property to not count ACL drops towards interface RX_DRP counter for 7050CX3 and 7260CX3 DualToR platforms
2021-06-23 18:09:47 -07:00
gechiang
6f65b42e4c
7260cx3 DualToR config.bcm support based on DualToR setting in device metadata at boot time (#7168)
* 7260cx3 DualToR config.bcm support based on DualToR setting in device metadata at boot time. 
For HWSKU Arista-7260CX3-C64 the MMU setting SOC for T0/T1 is also combined into the config.bcm.j2 logic so use just one config file and adding delta based on Switch Roles.
2021-03-31 14:23:24 -07:00
abdosi
a6a10f05b7
In SAI 3.5 by default we are supporting 256 Group with 64 Memeber each. (#5400)
However in SAI 3.7 default behaviout got changes to 128 Group and 128
    Memeber each.

    This change is to make sure we are using same ECMP Group/Memeber Per
    Group for 3.7 also so that behaviour is consistent.

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
2020-09-22 11:21:12 -07:00
abdosi
b6efb49817
Update bcm soc property bcm_num_cos from 8 to 10 (#5314)
as needed by SAI 3.7 and above. Without this change
Warmboot fails from 3.5 to 3.7 as Braodcoam Datastructure
gets corrupted after warm-boot.

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
2020-09-04 07:40:17 -07:00
Wenda Ni
0d2aa7fb5b [devices]: PG headroom change for Arista 7260 (#3600)
Signed-off-by: Wenda Ni <wenni@microsoft.com>
2019-10-15 06:03:48 -07:00
Ying Xie
eeeda28434
[bcm config] enable sram scan (#3558)
Per Broadcom's recommendations.

Signed-off-by: Ying Xie <ying.xie@microsoft.com>
2019-10-03 17:02:59 -07:00
Wenda Ni
7b0a5ba6ae Remove the divide by 4 operation to the under the hood SAI (#1532)
* Remove the divide by 4 operation to the under the hood SAI

This is to avoid the need and thus the confusion for application program to know
the mmu internal architecture

This change must have support from SAI change to reach the correct
config

Signed-off-by: Wenda <wenni@microsoft.com>

* Relegate the divide by 4 operation to the under the hood SAI for egress
lossless pool

Extend to 7060 and 6100

Signed-off-by: Wenda <wenni@microsoft.com>

* Add more TH/TH2 hwskus

Signed-off-by: Wenda Ni <wenni@microsoft.com>

* Update config test

Signed-off-by: Wenda Ni <wenni@microsoft.com>

* Add TH2 ingress lossy profile

Signed-off-by: Wenda Ni <wenni@microsoft.com>

* Move the divide by 4 operation to SAI internal

Signed-off-by: Wenda Ni <wenni@microsoft.com>

* [bcm SAI] Upgrade Broadcom SAI to version 3.5.3.1-15

- Broadcom SAI 3.5 GA release 20190924.

Signed-off-by: Ying Xie <ying.xie@microsoft.com>
2019-09-25 15:57:07 -07:00
zzhiyuan
0ef7dc5d98 [devices]: Update Arista 7260CX3-64 10G SFP tuning (#3151) 2019-07-16 08:42:55 -07:00
Wenda Ni
ce9a3f0c5a [QoS]: QoS Config change for multiple devices (#2505)
* QoS config change: 1) DSCP mapping; 2) link pg/queue 6 to lossy buffer;
3) redistribute scheduler

Signed-off-by: Wenda <wenni@microsoft.com>

* Add scheduling weight to queue 2

Signed-off-by: Wenda <wenni@microsoft.com>

* Link pg/queue 2 to lossy buffer

Signed-off-by: Wenda <wenni@microsoft.com>

* Update the pg headroom for a7060-D48C8 50G

Signed-off-by: Wenda <wenni@microsoft.com>

* Update config gen test for qos

Signed-off-by: Wenda <wenni@microsoft.com>

* Update pg headroom size, and update egress lossy pool size accordingly

Signed-off-by: Wenda <wenni@microsoft.com>

* Update headroom pool size; Update ingress service pool and egress lossy
pool sizes accordingly;

Signed-off-by: Wenda <wenni@microsoft.com>

* a7260: update headroom pool size; Update ingress service pool and egress lossy pool sizes accordingly;

Signed-off-by: Wenda <wenni@microsoft.com>

* Update config gen test for buffer

Signed-off-by: Wenda <wenni@microsoft.com>
2019-01-30 19:00:13 -08:00
Wenda Ni
77652c55fd [QoS]: Unify qos json by using qos_config.j2 template (#2023)
* Unify qos config with qos_config.j2 template

Signed-off-by: Wenda <wenni@microsoft.com>

* Change 7050 to use qos config template

Signed-off-by: Wenda <wenni@microsoft.com>

	modified:   device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/qos.json.j2
	modified:   device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/qos.json.j2

* Change a7060, a7260, s6000, s6100, z9100  to use qos config template

Signed-off-by: Wenda <wenni@microsoft.com>

* Change mlnx devices to use qos config template

Signed-off-by: Wenda <wenni@microsoft.com>

	modified:   ../../../mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/qos.json.j2
	modified:   ../../../mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/qos.json.j2
	modified:   ../../../mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2
	modified:   ../../../mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/qos.json.j2

* Change barefoot devices to use qos config template

Signed-off-by: Wenda <wenni@microsoft.com>

	modified:   barefoot/x86_64-accton_wedge100bf_32x-r0/montara/qos.json.j2
	modified:   barefoot/x86_64-accton_wedge100bf_65x-r0/mavericks/qos.json.j2

* Change accton as7212 to use qos config template

Signed-off-by: Wenda <wenni@microsoft.com>

	modified:   accton/x86_64-accton_as7212_54x-r0/AS7212-54x/qos.json.j2

* Apply PORT_QOS_MAP to active ports only

Signed-off-by: Wenda <wenni@microsoft.com>

* Update qos config test with qos_config.j2 template

Signed-off-by: Wenda <wenni@microsoft.com>

* Update sample output of qos-dell6100.json

Signed-off-by: Wenda <wenni@microsoft.com>

* Remove generating the default port name and index list, i.e., remove the generate_port_lists macro, because PORT is always defined

Signed-off-by: Wenda <wenni@microsoft.com>

* Include pfc_to_pg_map according to platform asic type obtained from
/etc/sonic/sonic_version.yml rather than specifying per hwsku

Signed-off-by: Wenda Ni <wenni@microsoft.com>

* Customize TC_TO_PRIORITY_GROUP_MAP and
PFC_PRIORITY_TO_PRIORITY_GROUP_MAP for barefoot

Signed-off-by: Wenda <wenni@microsoft.com>

* Unify PFC_PRIORITY_TO_PRIORITY_GROUP_MAP: remove "0":"0", "1":"1" as
these two pgs do not generate PFC frames.

Signed-off-by: Wenda <wenni@microsoft.com>
2018-10-17 14:10:34 -07:00
Ying Xie
5ab66b191a
[bcm config] remove scache_filename config entry (#2140)
Warm boot is managed by SAI. This configuration entry shouldn't be
included in bcm config.

Signed-off-by: Ying Xie <ying.xie@microsoft.com>
2018-10-12 08:05:38 -07:00
Wenda Ni
d995147050 Migrate brcm platform to use new ECN config, which is (#1818)
applied on lossless traffic

Arista-7060CX-32S-C32
Arista-7060CX-32S-D48C8
Arista-7060CX-32S-Q32
Arista-7260CX3-D108C8
Force10-Z9100-T0
Force10-Z9100

Signed-off-by: Wenda Ni <wenni@microsoft.com>
2018-06-27 19:22:37 -07:00
pavel-shirshov
3681cfa553
Use only active ports when applying buffers/qos configuration (#1787)
* First part of skipping not used port for qos configuration

* Use active ports only to set QoS parameters for 6100

* Add a test for qos.json.j2

* Add a test for Dell S6100 buffers.json template

* Update submodulre
2018-06-21 11:51:37 -07:00
Ying Xie
58584ca30c
[test] Adding Broadcom configuration file test (#1611)
* [test] Adding Broadcom configuration file test

In order to allow SONiC community to check in Broadcom configuration
file directly under device folder. We need to add this test to make
sure the contents of the configuration is compliant with Broadcom
specifications.

* Invoke test from Debian package builder

* Use $() syntax

* Remove the debug echo statement
2018-04-17 21:10:17 -07:00
Ying Xie
652bc4853c
[Arista7260CX3] add port speed information to port_config.ini (#1412)
* [port_config] add speed information for Arista7260CX3-D108C8

* [port config] add port speed information for Arista-7260CX3-C64
2018-02-27 12:16:15 -08:00
Ying Xie
720c71399c
Improve: buffer configuration infrastructure (#1403)
* [sonic build] Define folder macro for target folder /usr/sonic/share/templates

* [sonic-cfggen] allow templates to include from common folders

- Allow templates to include files under /usr/share/sonic/templates
- Allow templates to include files in the same folder as the root template

* [Buffer config] install the buffer configuration template

* [Arista7260cx3] Add buffer configuration for Arista7260CX3 T0 topology

- pg profile look up table is incomplete. Currently contains T0 default
  values.

* [Arista7260cx3] Adding QoS configuration

* Address review comments

1. Stop generating ingress pg configuration for lossless pgs.
2. Stop putting ports into speed sets, put all ports in one set.
3. Remove ingress lossless profiles.
4. Added some tailing '-' back to remove leading spaces.
2018-02-27 12:15:56 -08:00
Ying Xie
1989c436b9
[Arista7260cx3] Update port map to match production layout (#1411) 2018-02-22 17:32:49 -08:00
Ying Xie
4e367c6984
[Arista7260cx3] update port_config.ini for Arista-7260CX3-D108C8 (#1130)
- Port 18 and 20 are now in 50G breakout mode.
2017-11-08 15:09:19 -08:00
Ying Xie
ce6cbbbb99
[Arista7260CX3] Fix a typo in port_ini.cfg (#1114) 2017-11-03 17:58:34 -07:00
Samuel Angebault
ca214b947c [arista]: Bump sonic-platform-modules-arista submodule (#1111)
* Bump sonic-platform-modules-arista

Improves i2c performance for xcvrs
Fix the led_plugin by ignoring unknown ports
Miscellaneous improvements

* Fix index column for Arista-7260CX3-D108C8

* Fix flash permissions for Arista platforms

The ext4 flash uses acl to properly handle permissions in EOS.
Aboot isn't built with this support and therefore can't be used
to set the flash permissions. It has to be deferred in sonic initrd.
2017-11-03 15:22:05 -07:00
Joe LeVeque
002aabe8ba Change all port_config.ini column headers from 'port' to 'index' (#1001) 2017-09-30 11:02:18 -07:00
Ying Xie
02c125f5ce [Arista-7260CX3] Rename hwSKU Arista-7260CX3-64 to Arista-7260CX3-C64, introducing new hwSKU Arista-7260CX3-D108C8 (#920)
* [Device] Rename SKU Arista-7260CX3-64 to Arista-7260CX3-C64

Renaming to add the speed indication: C64 means 64 100G ports.

renamed:    Arista-7260CX3-64/port_config.ini -> Arista-7260CX3-C64/port_config.ini
renamed:    Arista-7260CX3-64/sai.profile -> Arista-7260CX3-C64/sai.profile

* [Arista-7260cx3] Fix 64x100G port_config.ini

Reorder the port lanes to match the front panel port numbering.

* [Arista-7260CX3] add hwSKU Arista-7260CX3-D108C8

This hwSKU has 108x50G ports and 8x100G ports (2 x 100G ports are unused)
2017-08-25 17:31:19 -07:00