* Utilize the same sai.profile and config.bcm file
Signed-off-by: Zhenggen Xu <zxu@linkedin.com>
* Fix the index issues for HWSKU: Seastone-DX010-25-50 and Seastone-DX010-50-40
Signed-off-by: Zhenggen Xu <zxu@linkedin.com>
* Update sonic-swss submodule
* src/sonic-swss 63afbd5...5be3963 (11):
> Remove the platform check for remove/add port action at init phase. (#1006)
> [test]: Add Class object in each test script file (#992)
> [vstest]: add --imgname option to specify vs image to test (#996)
> [qosorch]: Add cir and pir parameters for scheduler (#991)
> [vstest]: report error when team kernel module is not available (#994)
> Support per buffer pool watermark polling mode (#973)
> [test]: Update test_vlan to use dvs functions (#986)
> Add synchronous switch to orch agent (#987)
> ARM32 bit fixes, for 64bit printf format specifier (#989)
> [portsorch]: Rename function isPortReady() to allPortsReady() (#990)
> [routeorch]: Fix observer detaching procedure for next hop observers (#985)
Signed-off-by: Zhenggen Xu <zxu@linkedin.com>
* update sfputil, port indext start from 1
* DX010 update SKUs port config index
Port index in port_config.ini now start from 1.
* Seastone-DX010-10-50 port config update
* Seastone-DX010-50 port config update
* Seastone-DX010 port config update
* Update dx010 sfputil plugin
* Implement lpmode set function.
* Implement transceiver reset function.
* Python code style format.
* Remove new line at the end of port_config.ini
*New line cause parsing error in sfputilbase.
* Add get_transceiver_change_event method
*This needed by new sfputilbase implement.
* Fix unintended line breaks
* ASIC part support for Celestica DX010 platform.
It includes:
*Three different configurations: 32x100G, 64x50G, 96x10G+16x50G.(Script to be includd in the platform directory).
*Data port LED
Also from vendor:
*fancontrol configuration
*eeprom.py/sfpulti.py plugins
*sensor configuration
* Typo fix
* Add the port configuration change script
* move the script to sonic-utilities repo
