Commit Graph

279 Commits

Author SHA1 Message Date
mssonicbld
403d09db78
[Mellanox] [SN5600] Removing 8x DPB mode from platform files (#17071) (#17119) 2023-11-08 22:48:22 +08:00
Vadym Hlushko
28ecd068d4
[202305][buffers] Add 'create_only_config_db_buffers.json' file for the Mellanox devices (not MSFT SKU) (#17006)
Why I did it
Add the create_only_config_db_buffers attribute to the DEVICE_METADATA|localhost. If the "create_only_config_db_buffers" exists and is equal to "true" - the buffers will be created according to the config_db configuration (for example BUFFER_QUEUE|* table), otherwise the maximum available buffers (which are read from SAI) will be created, regardless of the CONFIG_DB buffers configuration.

Work item tracking
Microsoft ADO (number only):
How I did it
Add the create_only_config_db_buffers.json files for Mellanox devices (not MSFT SKU's), and inject the content to the CONFIG_DB during the swss docker container start.

How to verify it
Manual verification:

Install the image with this PR included on the not MSFT SKU switch
Check the show queue counters output and verify that only configured in CONFIG_DB buffers are created
root@sonic:/home/admin# show queue counters
     Port    TxQ    Counter/pkts    Counter/bytes    Drop/pkts    Drop/bytes
---------  -----  --------------  ---------------  -----------  ------------
Ethernet0    UC0               0                0            0           N/A
Ethernet0    UC1               0                0            0           N/A
Ethernet0    UC2               0                0            0           N/A
Ethernet0    UC3               0                0            0           N/A
Ethernet0    UC4               0                0            0           N/A
Ethernet0    UC5               0                0            0           N/A
Ethernet0    UC6               0                0            0           N/A
Open the /usr/share/sonic/device/$DEVICE/$SKU/create_only_config_db_buffers.json and change it to:
"create_only_config_db_buffers": "false"
Do config reload
Check the show queue counters output and verify that all available buffers are created
root@sonic:/home/admin# show queue counters
     Port    TxQ    Counter/pkts    Counter/bytes    Drop/pkts    Drop/bytes
---------  -----  --------------  ---------------  -----------  ------------
Ethernet0    UC0               0                0            0           N/A
Ethernet0    UC1               0                0            0           N/A
Ethernet0    UC2               0                0            0           N/A
Ethernet0    UC3               0                0            0           N/A
Ethernet0    UC4               0                0            0           N/A
Ethernet0    UC5               0                0            0           N/A
Ethernet0    UC6               0                0            0           N/A
Ethernet0    UC7              60            15346            0           N/A
Ethernet0    MC8             N/A              N/A          N/A           N/A
Ethernet0    MC9             N/A              N/A          N/A           N/A
Ethernet0   MC10             N/A              N/A          N/A           N/A
Ethernet0   MC11             N/A              N/A          N/A           N/A
Ethernet0   MC12             N/A              N/A          N/A           N/A
Ethernet0   MC13             N/A              N/A          N/A           N/A
Ethernet0   MC14             N/A              N/A          N/A           N/A
Ethernet0   MC15             N/A              N/A          N/A           N/A
2023-11-03 14:27:17 +08:00
Nazarii Hnydyn
7d54155f67
[ppi]: Enable global port late create for all Mellanox HWSKUs. (#16946)
Why I did it
To improve FAST reboot dataplane downtime
Work item tracking
N/A
How I did it
Updated SAI xml config file
How to verify it
Run sonic-mgmt tests of fastboot
2023-11-02 23:14:18 +08:00
Ashwin Srinivasan
c31ccbaba8 Revert "Move /var/log to RAM for Mellanox SN2700, Nokia 7215 and Dell S6100 (#15077)" (#16775)
This reverts commit 05f326eed9.

Microsoft ADO 25355843:
2023-10-18 00:37:18 +08:00
Nazarii Hnydyn
ea40778e35
[ssm]: Enable Store-And-Forward switching mode for SN2700/SN3800/SN4600C/SN4700. (#16761)
BACKPORT: #16781

Why I did it
To enable Store-And-Forward switching mode for SN2700/SN3800/SN4600C/SN4700
Work item tracking
N/A
How I did it
Added vendor SAI config options
How to verify it
make configure PLATFORM=mellanox
make target/sonic-mellanox.bin
2023-10-08 12:29:09 +08:00
mssonicbld
c3ea44a522
[Mellanox] add new platform 2700 a1 (#16515) (#16795) 2023-10-08 03:06:03 +08:00
mssonicbld
a713299614
[Mellanox] Remove mlxtrace support for SPC4 (#16373) (#16625)
- Why I did it
Because the Spectrum4 devices don't support mlxtrace utility.

- How I did it
Edit sai.profile and remove mlxtrace_spectrum4_itrace_*.cfg.ext files

Signed-off-by: vadymhlushko-mlnx <vadymh@nvidia.com>
Co-authored-by: Vadym Hlushko <62022266+vadymhlushko-mlnx@users.noreply.github.com>
2023-09-21 20:38:22 +08:00
Kebo Liu
27f15d40e1 [Mellanox] Update HW-MGMT package to new version V.7.0030.1011 (#16239)
- Why I did it
1. Update Mellanox HW-MGMT package to newer version V.7.0030.1011
2. Replace the SONiC PMON Thermal control algorithm with the one inside the HW-MGMT package on all Nvidia platforms
3. Support Spectrum-4 systems

- How I did it
1. Update the HW-MGMT package version number and submodule pointer
2. Remove the thermal control algorithm implementation from Mellanox platform API
3. Revise the patch to HW-MGMT package which will disable HW-MGMT from running on SIMX
4. Update the downstream kernel patch list

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2023-09-21 18:34:07 +08:00
Junchao-Mellanox
6c9c2cca42 [Mellanox] Revise label name and fix typo in sensor.conf of 4600C (#16271)
- Why I did it
Revise lable name and fix typo in sensor.conf of 4600C

- How I did it
Revise lable name and fix typo in sensor.conf of 4600C

- How to verify it
Manual test
sonic-mgmt test_sensors.py
2023-09-03 18:32:30 +08:00
Vivek
1908a04fdf [Mellanox] [SN4410] Support new breakout modes for PAM4 (#15668)
- Why I did it
Add new breakout modes to be used in PAM4 supported cables

- How I did it

- How to verify it
Verified the 50G per lane breakout modes are applied properly on the switch

Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
2023-09-03 16:33:21 +08:00
Nazarii Hnydyn
dd08437b3d [Mellanox] [PPI] Enable global port late create for SN5600 (#15866)
- Why I did it
Enabled port late create on SN5600 Spectrum-4 switch boots up with no ports

Work item tracking
N/A

- How I did it
Updated SAI xml config file

- How to verify it
Run sonic-mgmt tests of fastboot

Signed-off-by: Nazarii Hnydyn <nazariig@nvidia.com>
2023-09-03 16:33:15 +08:00
mssonicbld
875b81e407
[Mellanox] Add mlxtrace to techsupport (#15961) (#16215) 2023-08-20 23:51:38 +08:00
Stephen Sun
33d14521f2 [Mellanox] Use Debian reboot in Nvidia platform reboot when it is invoked from kdump capture boot (#15701)
#### Why I did it

When a kernel crash occurs, the system will reboot to the kdump capture kernel if kdump is enabled (`config kdump enable`). In the kdump capture boot, it only stores the crash information, and then reboot the system to a normal boot.
In this boot, no SONiC service is started but it invokes `reboot` which is actually the SONiC reboot that depends on SONiC services. There is a logic to skip all SONiC stuff and invoke platform reboot in SONiC reboot to avoid issues.
However, on Nvidia platforms, the platform reboot still depends on SONiC services, which can cause issues.
So, the Debian reboot is called directly in platform reboot if it is invoked from the kdump capture boot.

#### How I did it

Manual test
2023-08-07 14:33:34 +08:00
mssonicbld
0eb0749442
Move /var/log to RAM for Mellanox SN2700, Nokia 7215 and Dell S6100 (#15077) (#15871)
Why I did it
Move the /var/log on RAM. This is to prevent too many disk write on /var/log when mounted on disk.

Work item tracking
Microsoft ADO (number only): 17955517

How I did it
Pass kernel cmdline option "log_inram=on"

How to verify it
Mellanox SN2700
root@str-msn2700-02:~# df -h
Filesystem Size Used Avail Use% Mounted on
udev 3.9G 0 3.9G 0% /dev
tmpfs 791M 15M 776M 2% /run
root-overlay 15G 12G 2.9G 80% /
/dev/sda3 15G 12G 2.9G 80% /host
tmpfs 790M 12M 779M 2% /var/log
tmpfs 3.9G 107M 3.8G 3% /dev/shm
tmpfs 5.0M 0 5.0M 0% /run/lock
tmpfs 4.0M 0 4.0M 0% /sys/fs/cgroup
overlay 15G 12G 2.9G 80% /var/lib/docker/overlay2/f50948841bee041368bf7c0546ceab4c71f05951fb0ed5ae70411f28dde68907/merged
overlay 15G 12G 2.9G 80% /var/lib/docker/overlay2/c45de6c53e7185631a37e87686dd296b2585425f638aa92c720c90eae038480c/merged
overlay 15G 12G 2.9G 80% /var/lib/docker/overlay2/f5bc87d5c2965b21b222f09dd57fe0fc798e518101d7ecd25d170b7662ae3e80/merged
overlay 15G 12G 2.9G 80% /var/lib/docker/overlay2/b2f435a256b930da4897d8a096095dcce183a6efa55b5b637187a654db0585ee/merged
overlay 15G 12G 2.9G 80% /var/lib/docker/overlay2/5c3588e42b29fd0516a164c00de621b7a00236ecbb240c4d0b3903ec706c220d/merged
overlay 15G 12G 2.9G 80% /var/lib/docker/overlay2/5a4a2a2602fb4ed1d1df90c3916076f595b4d8bc18eb465dd23e33f354adcfb8/merged
overlay 15G 12G 2.9G 80% /var/lib/docker/overlay2/9926f7378de9223fd3e88c8f59d888ad178e2ca23fa978f372e9838f10b7b803/merged
overlay 15G 12G 2.9G 80% /var/lib/docker/overlay2/130abaf95cffc06d952adacb6aa54a2f5e7c54c81fa8c15184389e25a7884328/merged
overlay 15G 12G 2.9G 80% /var/lib/docker/overlay2/aeef95cf5af6e20909a4cfd6c696176cc5dcb31dd456cc8acbbd3d59d47333d7/merged
overlay 15G 12G 2.9G 80% /var/lib/docker/overlay2/ef9bb94012b9fe987e55c9b73141296da8081d258d0d134922776c3c4b3ec551/merged
overlay 15G 12G 2.9G 80% /var/lib/docker/overlay2/cf425d372b347fd68569f128e1771e5a70dbf504b2f013304d60bcef6dfbd0da/merged
overlay 15G 12G 2.9G 80% /var/lib/docker/overlay2/7a2592cdac5c7369a6a98e07dbf1c2d96d29634e7d7b593617c50cc7e09e5cb3/merged
root@str-msn2700-02:~# 
root@str-msn2700-02:~# free -h
 total used free shared buff/cache available
Mem: 7.7Gi 3.0Gi 3.3Gi 133Mi 1.5Gi 4.4Gi
Swap: 0B 0B 0B
root@str-msn2700-02:~# 


Dell S6100

root@str-s6100-acs-5:~# df -h
Filesystem Size Used Avail Use% Mounted on
udev 3.9G 0 3.9G 0% /dev
tmpfs 794M 15M 780M 2% /run
root-overlay 14G 9.9G 3.6G 74% /
/dev/sda4 14G 9.9G 3.6G 74% /host
tmpfs 793M 13M 781M 2% /var/log
tmpfs 3.9G 60K 3.9G 1% /dev/shm
tmpfs 5.0M 0 5.0M 0% /run/lock
tmpfs 4.0M 0 4.0M 0% /sys/fs/cgroup
overlay 14G 9.9G 3.6G 74% /var/lib/docker/overlay2/f94441208fba5df49b0b8f0b49c699475ed0fd07673ab4a3eb574869b8e17c83/merged
overlay 14G 9.9G 3.6G 74% /var/lib/docker/overlay2/1c3dc3b582599602aec0dbd78945560f330f6244d2e218750622b3814dc53ed3/merged
overlay 14G 9.9G 3.6G 74% /var/lib/docker/overlay2/ab5b96e72e323fff5168abc69f8599fa244410d856dbd10cdbf73c99a4fe8d67/merged
overlay 14G 9.9G 3.6G 74% /var/lib/docker/overlay2/0e6e3adaba6bb1d2684da444661e540030d588ef498466b7d8ff773ce263a2ea/merged
overlay 14G 9.9G 3.6G 74% /var/lib/docker/overlay2/1218ed8bfa7a17c8927b20005d45f5e1e4a634e653d5c5c2057ac54713dc3387/merged
overlay 14G 9.9G 3.6G 74% /var/lib/docker/overlay2/b31486f665e5c929966185397990553fee6b41b515cbef28c945096673ac9bef/merged
overlay 14G 9.9G 3.6G 74% /var/lib/docker/overlay2/b984fa70f30bd1bac92bdf8d36542ed4433b4dabc33f7bb1f0a17a5eaee90f3e/merged
overlay 14G 9.9G 3.6G 74% /var/lib/docker/overlay2/b7866a1462768f3564b832187837c7a5e3d493b8084204e59610960cc5f6bc19/merged
overlay 14G 9.9G 3.6G 74% /var/lib/docker/overlay2/113bbbe88ee8452f4310b02a1343cfb4f1beb5fedf68a7d810ff5b5d7457c9f0/merged
overlay 14G 9.9G 3.6G 74% /var/lib/docker/overlay2/e7cc383186c6f9acecf2031c0c1f0870b8a7f63e1918b8359afa7a13d3c28963/merged
overlay 14G 9.9G 3.6G 74% /var/lib/docker/overlay2/c5d269100da205981c51e70e9e86facf69487f99e234dcdac822b8ab01af3d6a/merged
overlay 14G 9.9G 3.6G 74% /var/lib/docker/overlay2/463874ab78b2e45a34cf4d3d1cd2e45ff18c0abbf37be62d2c8559dce38d6219/merged
root@str-s6100-acs-5:~# free -h
 total used free shared buff/cache available
Mem: 7.8Gi 2.1Gi 4.1Gi 69Mi 1.6Gi 5.3Gi
Swap: 0B 0B 0B
root@str-s6100-acs-5:~# 

Nokia-7215

root@str-2-7215-acs-4:~# df -h
Filesystem Size Used Avail Use% Mounted on
udev 1.5G 0 1.5G 0% /dev
tmpfs 303M 14M 289M 5% /run
root-overlay 15G 7.2G 7.2G 51% /
/dev/sda2 15G 7.2G 7.2G 51% /host
tmpfs 302M 7.5M 295M 3% /var/log
tmpfs 1.5G 60K 1.5G 1% /dev/shm
tmpfs 5.0M 0 5.0M 0% /run/lock
tmpfs 4.0M 0 4.0M 0% /sys/fs/cgroup
overlay 15G 7.2G 7.2G 51% /var/lib/docker/overlay2/617e49b8b8e4368db2b3b2fb3e3204e80ec572fe7981d67ad2116d9c3e4472f3/merged
overlay 15G 7.2G 7.2G 51% /var/lib/docker/overlay2/c94b855482fc14aa1f032b0c8dc035b02f37ad9e4341cb5a8d22f14e14c63824/merged
overlay 15G 7.2G 7.2G 51% /var/lib/docker/overlay2/2d8c6ee95b212bbc8376d15916723128455678f2a3c88f382b451bec88297341/merged
overlay 15G 7.2G 7.2G 51% /var/lib/docker/overlay2/92114013a19dc19f30505ba645f961d50e093365422a9b22116ced1fa88ded2b/merged
overlay 15G 7.2G 7.2G 51% /var/lib/docker/overlay2/c8e79a8403863887666324f163a4b6633c40c8b349402b3a0f40ba7e51adb28b/merged
overlay 15G 7.2G 7.2G 51% /var/lib/docker/overlay2/27fd4a51859f3febd345a8551a0b4686d696c205048e1d595b76114385a68949/merged
root@str-2-7215-acs-4:~#
2023-07-19 16:09:37 +08:00
Kebo Liu
3cb13226be
Update SN5600 platform.json with service port sfp (#15337)
Signed-off-by: Kebo Liu <kebol@nvidia.com>
2023-06-13 14:15:15 +03:00
Sudharsan Dhamal Gopalarathnam
5680c544b6
[Mellanox]Adding SKU Mellanox-SN4700-O8C48 (#15179)
#### Why I did it
To add new SKU Mellanox-SN4700-O8C48 with following requirements:

| Port configuration | Value |
| ------  |--------- |
 | Breakout mode for each port  |**Defined in port mapping** |
| Speed of the port |  **Defined in Port mapping** |
| Auto-negotiation enable/disable | **No setting required** |
| FEC mode | **No setting required** |
|Type of transceiver used | **Not needed**|

 Buffer configuration | Value
------  |---------
 Shared headroom | **Enabled**
 Shared headroom pool factor | **2**
 Dynamic Buffer | **Disable**
 In static buffer scenario how many uplinks and downlinks? | **48x100G  Downlinks and  8x400G uplinks**
 2km cable support required? | **Yes**

Switch configuration | Value
------  |---------
 Warmboot enabled? | **yes**
 Should warmboot be added to SAI profile when enabled? | **yes**
 Is VxLAN source port range set? | **No**
 Should Vxlan source port range be added to SAI profile when set. | **No**
 Is Static Policy Based Hashing enabled? | **No**

Port Mapping

| Ports  | Mode      |
| ------  |--------- |
| 1-12   | 2x100G |
| 13-20  | 1x400G   | 
| 21-32  | 2x100G |


Number of Uplinks / Downlinks:
T1 topology: **48x100G Downlinks 8x400G uplinks**.
Length of downlink: **40m**
Length of uplink: **2000m**

##### Work item tracking
- Microsoft ADO **(number only)**:

#### How I did it
Defined the SKU as per requirements

#### How to verify it
Load the SKU and verify if all links come up and traffic passes.


#### A picture of a cute animal (not mandatory but encouraged)
2023-06-02 13:10:04 -07:00
Vivek
d3f2d06117
[Mellanox] Add Copyright Headers for missing files (#15136)
Added NVIDIA copyright to missing files under platform/mellanox & device/mellanox
Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
2023-05-25 07:55:44 +03:00
DavidZagury
a10c1951d6
[Mellanox] Update SN5600 SAI XML file (#14947)
- Why I did it
Update SAI xml file to align with the default SKU

- How I did it
Update the SN5600 SAI xml file

- How to verify it
Install image on SN5600 device
2023-05-10 20:43:27 +03:00
Kebo Liu
14a5f21c08
[Mellanox] Update SN5600 sensors.conf and pcie.yaml files (#14883)
- Why I did it
Update the sensors.conf and pcie.yaml according to the real hardware.

- How I did it
Update the sensors.conf and pcie.yaml

- How to verify it
run relevant sonic-mgmt test cases.

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2023-05-02 10:36:57 +03:00
Stephen Sun
3112997b5a
[Mellanox] Advance hw-mgmt to v.7.0020.4104 (#13372)
- Why I did it
Advance hw-mgmt service to V.7.0020.4100
Add missing thermal sensors that are supported by hw-mgmt package
Delay system health service before hw-mgmt has started on Mellanox platform in order to avoid reading some sensors before ready.
Depends on sonic-net/sonic-linux-kernel#305

- How I did it
1. Update hw mgmt version
2. Add missing sensors
3. Delay service 

- How to verify it
Regression test.

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2023-02-12 11:23:47 +02:00
Stephen Sun
e3ff08833e
[Mellanox] Support DSCP remapping in dual ToR topo on T0 switch (#12605)
- Why I did it
Support DSCP remapping in dual ToR topo on T0 switch for SKU Mellanox-SN4600c-C64, Mellanox-SN4600c-D48C40, Mellanox-SN2700, Mellanox-SN2700-D48C8.

- How I did it
Regarding buffer settings, originally, there are two lossless PGs and queues 3, 4. In dual ToR scenario, the lossless traffic from the leaf switch to the uplink of the ToR switch can be bounced back.
To avoid PFC deadlock, we need to map the bounce-back lossless traffic to different PGs and queues. Therefore, 2 additional lossless PGs and queues are allocated on uplink ports on ToR switches.

On uplink ports, map DSCP 2/6 to TC 2/6 respectively
On downlink ports, both DSCP 2/6 are still mapped to TC 1
Buffer adjusted according to the ports information:
Mellanox-SN4600c-C64:
56 downlinks 50G + 8 uplinks 100G
Mellanox-SN4600c-D48C40, Mellanox-SN2700, Mellanox-SN2700-D48C8:
24 downlinks 50G + 8 uplinks 100G

- How to verify it
Unit test.

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2023-02-07 16:21:59 +02:00
Junchao-Mellanox
7d38b459e4
[Mellanox] Add device files for SN5600 (#12831)
- Why I did it
Add device files for new platform SN5600

- How I did it
Add device files for new platform SN5600

- How to verify it
Manual test
2022-11-30 19:47:50 +02:00
Vivek
a68ce12dd6
[Mellanox] [SKU] Added Mellanox-SN4700-A96C8V8 SKU (#12347)
- Why I did it
A new SKU for MSN4700 Platform i.e. Mellanox-SN4700-V16A96

Requirements:

Breakout:
Port 1-24: 4x25G(4)[10G,1G]
Port 25-28: 2x100G[200G,50G,40G,25G,10G,1G]
Port 29-32: 2x200G[100G,50G,40G,25G,10G,1G]
Downlinks: 96 (1-24) + 4 (25-28)
Uplinks: 4 (29-32)
Shared Headroom: Enabled
Over Subscribe Ratio: 1:4
Default Topology: T0
Default Cable Length for T1: 5m
VxLAN source port range set: No
Static Policy Based Hashing Supported: No

Additional Details:
QoS params: The default ones defined in qos_config.j2 will be applied
Small Packet Percentage: Used 50% for traditional buffer model Note: For dynamic model, the value defined in LOSSLESS_TRAFFIC_PATTERN|AZURE|small_packet_percentage is used
SKU was drafted under the assumption that the downlink ports uses xcvr's that will only support the first 4 lanes of the physical port they are connected to. Hence for the ports 1-24, the last four lanes are not used
Cable Lengths used for generating buffer_defaults_{t0,t1}.j2 values

Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
2022-10-20 09:50:07 +03:00
Vivek
bc8ee7a105
[Mellanox] [SKU] Mellanox-SN4700-V48C32 SKU added (#12250)
A new SKU for MSN4700 Platform i.e. Mellanox-SN4700-V48C32

Requirements:
Breakout:
Port 1-24: 2x200G
Port 25-32: 4x100G
Downlinks: 48 (1-24)
Uplinks: 32 (25-32)
Shared Headroom: Enabled
Over Subscribe Ratio: 1:8
Default Topology: T1
Default Cable Length for T1: 300m
VxLAN source port range set: No
Static Policy Based Hashing Supported: No
Additional Details:
QoS params: The default ones defined in qos_config.j2 will be applied
Small Packet Percentage: Used 50% for traditional buffer model Note: For dynamic model, the value defined in LOSSLESS_TRAFFIC_PATTERN|AZURE|small_packet_percentage is used
Cable Lengths used for generating buffer_defaults_{t0,t1}.j2 values

Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
2022-10-18 12:11:02 +03:00
Sudharsan Dhamal Gopalarathnam
629343e0b7
[Mellanox]Adding SKU Mellanox-SN2700-D44C10 (#12396)
#### Why I did it
To add new SKU Mellanox-SN2700-D44C10 with following requirements:

| Port configuration | Value |
| ------  |--------- |
 | Breakout mode for each port  |**Defined in port mapping** |
| Speed of the port |  **Defined in Port mapping** |
| Auto-negotiation enable/disable | **No setting required** |
| FEC mode | **No setting required** |
|Type of transceiver used | **Not needed**|

 Buffer configuration | Value
------  |---------
 Shared headroom | **Enabled**
 Shared headroom pool factor  |  **2**
 Dynamic Buffer | **Disable**
 In static buffer scenario how many uplinks and downlinks? | **44 x50G and 2x100G Downlinks 8x100G uplinks**
 2km cable support required? | **No**

Switch configuration | Value
------  |---------
 Warmboot enabled? | **yes**
 Should warmboot be added to SAI profile when enabled? | **yes**
 Is VxLAN source port range set? | **No**
 Should Vxlan source port range be added to SAI profile when set. | **No**
 Is Static Policy Based Hashing enabled? | **No**

Port Mapping

| Ports  | Mode      |
| ------  |--------- |
| 1,2      | 1x100G |
|  3-6    | 2x50G   | 
| 7-10   | 1x100G |
| 11-22 | 2x50G   |
| 23-26 | 1x100G | 
| 27-32 | 2x50G   |

Number of Uplinks / Downlinks:
TO topology: **44 x50G and 2x100G Downlinks 8x100G uplinks**.

#### How I did it
Defined the SKU as per requirements

#### How to verify it
Load the SKU and verify if all links come up and traffic passes.
2022-10-14 22:12:28 -07:00
Mai Bui
648ca075c7
[device/mellanox] Mitigation for security vulnerability (#11877)
Signed-off-by: maipbui <maibui@microsoft.com>
Dependency: [PR (#12065)](https://github.com/sonic-net/sonic-buildimage/pull/12065) needs to merge first.
#### Why I did it
`subprocess.Popen()` and `subprocess.check_output()` is used with `shell=True`, which is very dangerous for shell injection.
#### How I did it
Disable `shell=True`, enable `shell=False`
#### How to verify it
Tested on DUT, compare and verify the output between the original behavior and the new changes' behavior.
[testresults.zip](https://github.com/sonic-net/sonic-buildimage/files/9550867/testresults.zip)
2022-10-06 17:51:31 -04:00
Dror Prital
44356fa8d7
[Mellanox] Add NVIDIA copyright header for NVIDIA added files (#12130)
- Why I did it
Add NVIDIA Copyright header for new "NVIDIA" files

- How I did it
Add the copyright header as remark at the head of the file
2022-10-02 11:34:24 +03:00
Kebo Liu
78eeeb7670
[SN2201] remove extra empty lines in the pg_profile_lookup.ini (#11923)
- Why I did it
Remove extra empty lines in the SN2201 pg_profile_lookup.ini to make it aligned with other platforms.
This extra empty line could confuse some test cases which need to parse this file.

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2022-09-04 10:53:07 +03:00
Saikrishna Arcot
186568a21d
Update sensor names for msn4600c for the 5.10 kernel (#11491)
* Update sensor names for msn4600c for the 5.10 kernel

Looks like a sensor was removed in the 5.10 kernel for the tps53679
sensor, so the names/indexing has changed.

Related to Azure/sonic-mgmt#4513.

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>

* Update sensors file

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
2022-08-29 11:34:23 -07:00
Vivek
f3c1c14d22
[Mellanox] [4700] Update platform capability file to support new breakout mode (#11614)
- Why I did it
This new breakout mode is required when a QSFP cable is used on the QSFP-DD supported 4700 port. since QSFP only uses the first 4 lanes, this mode is required to restrict the child ports to only use the first four lanes

- How I did it
Updated the platfrom.json file with the extended data

- How to verify it
Tested on one port:

root@msn-4700:/home/admin# show int status
  Interface                            Lanes    Speed    MTU    FEC    Alias    Vlan    Oper    Admin                                             Type    Asym PFC
-----------  -------------------------------  -------  -----  -----  -------  ------  ------  -------  -----------------------------------------------  ----------
  Ethernet0                                0      25G   9100    N/A    etp1a  routed      up       up                                  QSFP28 or later         N/A
  Ethernet1                                1      25G   9100    N/A    etp1b  routed    down       up                                              N/A         N/A
  Ethernet2                                2      25G   9100    N/A    etp1c  routed    down       up                                              N/A         N/A
  Ethernet3                                3      25G   9100    N/A    etp1d  routed    down       up                                              N/A         N/A

Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
2022-08-24 11:55:33 +03:00
DavidZagury
027bc7f044
[Mellanox] Add support for Service Port in SN5600 (#11609)
- Why I did it
SN5600 has an additional service interface with a different parameters than other interfaces.

- How I did it
Added the etp65 interface with the correct parameters.

- How to verify it
Run platform test on SN5600 platform.
Check the service port can startup correctly.
2022-08-15 11:47:56 +03:00
Vivek
15e59fce00
[Mellanox] [SKU] Mellanox-SN4700-C128 SKU added (#11574)
- Why I did it
New SKU for MSN-4700 Platform i.e. Mellanox-SN4700-C128

Requirements:
* Breakout: Port 1-32: 4x100G
* Downlinks: 120 (1-30)
* Uplinks: 8 (31-32)
* Shared Headroom: Enabled
* Over Subscribe Ratio: 1:8
* Default Topology: T2
* Default Cable Length for T2: 1500m
* QoS params: The default ones defined in qos_config.j2 will be applied
* Small Packet Percentage: Used 50% for traditional buffer model Note: For dynamic model, the value defined in LOSSLESS_TRAFFIC_PATTERN|AZURE|small_packet_percentage is used

Additional Details:
Switch Type has to be programmed as SpineRouter through config_db.json in DEVICE_METADATA|localhost|type field for the buffer values & cable lengths defined in the buffers_defaults_t2.j2 to apply on the device
Cable Lengths Used for generating buffer_defaults_{t0,t1,t2}.j2 values

Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
2022-08-11 10:37:33 +03:00
Kebo Liu
3660129d68
[Mellanox] Add Sensor conf to support respined platforms(SN3700/SN3700C/SN4600C) (#11553)
- Why I did it
Add new sensor conf file to support respined platforms(SN3700/SN3700C/SN4600C)

- How I did it
Add new sensor conf
Update the get_sensors_conf_path scripts to apply the sensor conf according to the HW respin version info

- How to verify it
run platform test(including sensor test)

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2022-08-10 18:09:10 +03:00
Stephen Sun
de4755be9a
Support queue 7 in dual ToR scenario (#11571)
Signed-off-by: Stephen Sun <stephens@nvidia.com>
2022-08-01 09:27:36 +08:00
Stephen Sun
8f4a1b7b85
[Mellanox] Support Mellanox-SN4600C-C64 as T1 switch in dual-ToR scenario (#11261)
- Why I did it
Support Mellanox-SN4600C-C64 as T1 switch in dual-ToR scenario
This is to port #11032 and #11299 from 202012 to master.

Support additional queue and PG in buffer templates, including both traditional and dynamic model
Support mapping DSCP 2/6 to lossless traffic in the QoS template.
Add macros to generate additional lossless PG in the dynamic model
Adjust the order in which the generic/dedicated (with additional lossless queues) macros are checked and called to generate buffer tables in common template buffers_config.j2
Buffer tables are rendered via using macros.
Both generic and dedicated macros are defined on our platform. Currently, the generic one is called as long as it is defined, which causes the generic one always being called on our platform. To avoid it, the dedicated macrio is checked and called first and then the generic ones.
Support MAP_PFC_PRIORITY_TO_PRIORITY_GROUP on ports with additional lossless queues.
On Mellanox-SN4600C-C64, buffer configuration for t1 is calculated as:

40 * 100G downlink ports with 4 lossless PGs/queues, 1 lossy PG, and 3 lossy queues
16 * 100G uplink ports with 2 lossless PGs/queues, 1 lossy PG, and 5 lossy queues

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2022-07-20 09:48:15 +03:00
Kebo Liu
7ac590b5c5
[Mellanox] Enhance Platform API to support SN2201 - RJ45 ports and new components mgmt. (#10377)
* Support new platform SN2201 and RJ45 port

Signed-off-by: Kebo Liu <kebol@nvidia.com>

* remove unused import and redundant function

Signed-off-by: Kebo Liu <kebol@nvidia.com>

* fix error introduced by rebase

Signed-off-by: Kebo Liu <kebol@nvidia.com>

* Revert the special handling of RJ45 ports (#56)

* Revert the special handling of RJ45 ports

sfp.py
sfp_event.py
chassis.py

Signed-off-by: Stephen Sun <stephens@nvidia.com>

* Remove deadcode

Signed-off-by: Stephen Sun <stephens@nvidia.com>

* Support CPLD update for SN2201

A new class is introduced, deriving from ComponentCPLD and overloading _install_firmware
Change _install_firmware from private (starting with __) to protected, making it overloadable

Signed-off-by: Stephen Sun <stephens@nvidia.com>

* Initialize component BIOS/CPLD

Signed-off-by: Stephen Sun <stephens@nvidia.com>

* Remove swb_amb which doesn't on DVT board any more

Signed-off-by: Stephen Sun <stephens@nvidia.com>

* Remove the unexisted sensor - switch board ambient - from platform.json

Signed-off-by: Stephen Sun <stephens@nvidia.com>

* Do not report error on receiving unknown status on RJ45 ports

Translate it to disconnect for RJ45 ports
Report error for xSFP ports

Signed-off-by: Stephen Sun <stephens@nvidia.com>

* Add reinit for RJ45 to avoid exception

Signed-off-by: Stephen Sun <stephens@nvidia.com>

Co-authored-by: Stephen Sun <5379172+stephenxs@users.noreply.github.com>
Co-authored-by: Stephen Sun <stephens@nvidia.com>
2022-06-20 19:12:20 -07:00
Kebo Liu
b2bc90e34b
add flag skip_xcvrd_cmis_mgr to skip cmis task on Nvidia platform (#11120)
Signed-off-by: Kebo Liu <kebol@nvidia.com>
2022-06-15 16:33:08 -07:00
Kebo Liu
a3895c3116
[Mellanox] Update SN2201 sai profile and platform reboot script (#10978)
- Why I did it
1. SN2201 sai profile needs to be updated according to the latest hardware.
2. In the reboot script, need to use the common symbol link of the power_cycle sysfs instead of directly accessing it due to SN2201 sysfs is different than other platforms.
3. echo 1 > $SYSFS_PWR_CYCLE will trigger the reboot immediately, the following sleep 3 and echo 0 > $SYSFS_PWR_CYCLE will never be executed, can be removed.

- How I did it
1. Replace the SN2201 sai profile with the latest one.
2. In the platform_reboot script, replace the direct sysfs path with the symbol link path.
3. Remove the redundant code from platform_reboot

- How to verify it
Perform reboot on all the Nvidia platforms, and check all can be rebooted successfully.

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2022-06-07 15:05:54 +03:00
Vivek R
5ea244cac8
Removed platform specific reboot files for mellanox simx platforms (#10806)
- Why I did it
Platform_reboot files for simx doesn't do aything different apart from calling /sbin/reboot. which is anyway done in the /usr/local/bin/reboot script i.e. the parent script which calls the platform specific reboot scripts if present.

Moreover, /sbin/reboot invoked in the platform specific reboot script is a non-blocking call and thus it returns back to the original script (although /sbin/reboot does it job in the background) and we see messages like this.

Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
2022-05-14 15:20:57 +03:00
Junchao-Mellanox
0191300b96
[Mellanox] Auto correct PSU voltage threshold (WA) (#10394)
- Why I did it
There is a hardware bug that PSU voltage threshold sysfs returns incorrect value. The workaround is to call "sensor -s" to refresh it.

- How I did it
Call "sensor -s" when the threshold value is not incorrect and PSU is "DELTA 1100"

- How to verify it
Unit test and Manual test
2022-04-14 08:14:40 +03:00
Dror Prital
8bc81206c5
[Mellanox] Update NVIDIA License header for files changed since 1.1.2022 (#10289)
- Why I did it
Update NVIDIA Copyright header to "mellanox" files which were changed since 1.1.2022

- How I did it
Update the copyright header

- How to verify it
Sanity tests and PR checkers.
2022-03-23 13:19:25 +02:00
Kebo Liu
9d2078c446
[Mellanox] Update Mellanox SN2201 device specific files (#10275)
Update device-specific files for new platform SN2201, including:

device/mellanox/x86_64-nvidia_sn2201-r0/ACS-SN2201/buffers_defaults_objects.j2
device/mellanox/x86_64-nvidia_sn2201-r0/ACS-SN2201/hwsku.json
device/mellanox/x86_64-nvidia_sn2201-r0/default_sku
device/mellanox/x86_64-nvidia_sn2201-r0/pcie.yaml
device/mellanox/x86_64-nvidia_sn2201-r0/platform.json
device/mellanox/x86_64-nvidia_sn2201-r0/platform_components.json
device/mellanox/x86_64-nvidia_sn2201-r0/sensors.conf

Signed-off-by: Kebo Liu <kebol@nvidia.com>
Co-authored-by: Stephen Sun <stephens@nvidia.com>
2022-03-18 12:11:13 -07:00
Alexander Allen
8dc00ef4e1
[mellanox] Fix DPB supported breakout modes (#10072) 2022-02-25 18:33:35 +05:30
Kebo Liu
129e9d1b25
fix MSN4410 chassis name in platform_components.json (#9939)
- Why I did it
The chassis name in MSN4410 platform_components.json is not correct

- How I did it
Fix the chassis name

- How to verify it
Run relevant platform API test

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2022-02-13 15:01:09 +02:00
Andriy Yurkiv
dd87b948a5
[Mellanox][vxlan] remove old static config for VXLAN src port range feature (#9956)
- Why I did it
Need to remove old static configs from sai.profile files.
New implementation: Azure/sonic-swss#1959
New configuration: #9658

- How I did it
Remove SAI_VXLAN_SRCPORT_RANGE_ENABLE=1 lines from files per HWSKU

- How to verify it
When static config is removed following test will fail (src port will be in range 0-255)

py.test vxlan/test_vnet_vxlan.py --inventory "../ansible/inventory, ../ansible/veos" --host-pattern (testbed)-t0 --module-path ../ansible/library/ --testbed (testbed)-t0 --testbed_file ../ansible/testbed.csv --allow_recover --assert plain --log-cli-level info --show-capture=no -ra --showlocals --disable_loganalyzer --skip_sanity --upper_bound_udp_port 65535 --lower_bound_udp_port 64128
2022-02-13 14:55:59 +02:00
Junchao-Mellanox
05cc8f9df2
[Mellanox] Fix issue: SN4600C has 4 CPU core temperature sensors (#9930)
- Why I did it
platform.json of 4600C only has 2 CPU core thermal sensors, but there are 4 actually

- How I did it
Added thermal sensors for CPU core 2 and core 3.

- How to verify it
Build.
2022-02-09 13:26:40 +02:00
Dror Prital
4361224686
[Mellanox] Add platform.json file into sn4800 SIMx environment (#9931)
- Why I did it
There was a missing file of platform.json on SN4800 SIMx platform

- How I did it
Add symbolic link to platform.json file from the real SN4800 platform

- How to verify it
Run SN4800 SIMx and verify that platfrom.json file exist at the following folder:
/usr/share/sonic/device/x86_64-nvidia_sn4800_simx-r0
2022-02-09 12:51:08 +02:00
Alexander Allen
e5ee501116
Remove redundant breakout mode for SN3800 (#9912) 2022-02-06 12:53:00 +05:30
Andriy Yurkiv
cb3b9416a6
[Mellanox][VXLAN] add params to vxlan.json file in order to configure VXLAN src port range feature (#9658)
- Why I did it
Remove obsolete parameter that enables static VXLAN src port range
provide functionality no generate json config file according to appropriate parameter in config_db
Done for
SN3800:
• Mellanox-SN3800-D28C50
• Mellanox-SN3800-C64
• Mellanox-SN3800-D28C49S1 (New 10G SKU)

SN2700:
• Mellanox-SN2700-D48C8

- How I did it
Remove SAI_VXLAN_SRCPORT_RANGE_ENABLE=1 from appropriate sai.profile files
Created vxlan.json file and added few params that depends on DEVICE_METADATA.localhost.vxlan_port_range

- How to verify it
File /etc/swss/config.d/vxlan.json should be generated inside swss docker when it restart
[
    {
        "SWITCH_TABLE:switch": {
            "vxlan_src": "0xFF00",
            "vxlan_mask": "8"
        },
        "OP": "SET"
    }
]
Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com>
2022-01-31 15:57:30 +02:00
Alexander Allen
8a07af95e5
[Mellanox] Modified Platform API to support all firmware updates in single boot (#9608)
Why I did it
Requirements from Microsoft for fwutil update all state that all firmwares which support this upgrade flow must support upgrade within a single boot cycle. This conflicted with a number of Mellanox upgrade flows which have been revised to safely meet this requirement.

How I did it
Added --no-power-cycle flags to SSD and ONIE firmware scripts
Modified Platform API to call firmware upgrade flows with this new flag during fwutil update all
Added a script to our reboot plugin to handle installing firmwares in the correct order with prior to reboot
How to verify it
Populate platform_components.json with firmware for CPLD / BIOS / ONIE / SSD
Execute fwutil update all fw --boot cold
CPLD will burn / ONIE and BIOS images will stage / SSD will schedule for reboot
Reboot the switch
SSD will install / CPLD will refresh / switch will power cycle into ONIE
ONIE installer will upgrade ONIE and BIOS / switch will reboot back into SONiC
In SONiC run fwutil show status to check that all firmware upgrades were successful
2022-01-24 00:56:38 -08:00