Commit Graph

10 Commits

Author SHA1 Message Date
pavel-shirshov
3681cfa553
Use only active ports when applying buffers/qos configuration (#1787)
* First part of skipping not used port for qos configuration

* Use active ports only to set QoS parameters for 6100

* Add a test for qos.json.j2

* Add a test for Dell S6100 buffers.json template

* Update submodulre
2018-06-21 11:51:37 -07:00
Ying Xie
58584ca30c
[test] Adding Broadcom configuration file test (#1611)
* [test] Adding Broadcom configuration file test

In order to allow SONiC community to check in Broadcom configuration
file directly under device folder. We need to add this test to make
sure the contents of the configuration is compliant with Broadcom
specifications.

* Invoke test from Debian package builder

* Use $() syntax

* Remove the debug echo statement
2018-04-17 21:10:17 -07:00
Ying Xie
652bc4853c
[Arista7260CX3] add port speed information to port_config.ini (#1412)
* [port_config] add speed information for Arista7260CX3-D108C8

* [port config] add port speed information for Arista-7260CX3-C64
2018-02-27 12:16:15 -08:00
Ying Xie
720c71399c
Improve: buffer configuration infrastructure (#1403)
* [sonic build] Define folder macro for target folder /usr/sonic/share/templates

* [sonic-cfggen] allow templates to include from common folders

- Allow templates to include files under /usr/share/sonic/templates
- Allow templates to include files in the same folder as the root template

* [Buffer config] install the buffer configuration template

* [Arista7260cx3] Add buffer configuration for Arista7260CX3 T0 topology

- pg profile look up table is incomplete. Currently contains T0 default
  values.

* [Arista7260cx3] Adding QoS configuration

* Address review comments

1. Stop generating ingress pg configuration for lossless pgs.
2. Stop putting ports into speed sets, put all ports in one set.
3. Remove ingress lossless profiles.
4. Added some tailing '-' back to remove leading spaces.
2018-02-27 12:15:56 -08:00
Ying Xie
1989c436b9
[Arista7260cx3] Update port map to match production layout (#1411) 2018-02-22 17:32:49 -08:00
Ying Xie
4e367c6984
[Arista7260cx3] update port_config.ini for Arista-7260CX3-D108C8 (#1130)
- Port 18 and 20 are now in 50G breakout mode.
2017-11-08 15:09:19 -08:00
Ying Xie
ce6cbbbb99
[Arista7260CX3] Fix a typo in port_ini.cfg (#1114) 2017-11-03 17:58:34 -07:00
Samuel Angebault
ca214b947c [arista]: Bump sonic-platform-modules-arista submodule (#1111)
* Bump sonic-platform-modules-arista

Improves i2c performance for xcvrs
Fix the led_plugin by ignoring unknown ports
Miscellaneous improvements

* Fix index column for Arista-7260CX3-D108C8

* Fix flash permissions for Arista platforms

The ext4 flash uses acl to properly handle permissions in EOS.
Aboot isn't built with this support and therefore can't be used
to set the flash permissions. It has to be deferred in sonic initrd.
2017-11-03 15:22:05 -07:00
Joe LeVeque
002aabe8ba Change all port_config.ini column headers from 'port' to 'index' (#1001) 2017-09-30 11:02:18 -07:00
Ying Xie
02c125f5ce [Arista-7260CX3] Rename hwSKU Arista-7260CX3-64 to Arista-7260CX3-C64, introducing new hwSKU Arista-7260CX3-D108C8 (#920)
* [Device] Rename SKU Arista-7260CX3-64 to Arista-7260CX3-C64

Renaming to add the speed indication: C64 means 64 100G ports.

renamed:    Arista-7260CX3-64/port_config.ini -> Arista-7260CX3-C64/port_config.ini
renamed:    Arista-7260CX3-64/sai.profile -> Arista-7260CX3-C64/sai.profile

* [Arista-7260cx3] Fix 64x100G port_config.ini

Reorder the port lanes to match the front panel port numbering.

* [Arista-7260CX3] add hwSKU Arista-7260CX3-D108C8

This hwSKU has 108x50G ports and 8x100G ports (2 x 100G ports are unused)
2017-08-25 17:31:19 -07:00