Commit Graph

15 Commits

Author SHA1 Message Date
gechiang
e0209f745a
[202106]Disable ALPM distributed hitbit thread that is used for debug purpose only but interfered with Other functional operations (#9293)
This is to address an issue where it was observed that SAI operations sometime may take a very long to time complete (over 45ms). It was determined that the ALPM distributed thread was causing this issue.
The fix is to disable this debug thread that has no functional purpose.

Preliminary tests looks fine. BGP neighbors were all up with proper routes programmed
interfaces are all up
Manually ran the fib test cases on 7050CX3 (TD3), TD2, TH, TH2, and TH3 based platforms and
thy all passed.
Note: the testing was done over 20201230 image and are porting this change to master branch.
No need to port this to 20201230 branch as a separate PR was already done for that branch. (#9190)

this PR is created to port the changes made by (#9199) but could not be cherry picked directly to 202106 branch.
2021-11-17 20:58:25 -08:00
gechiang
280df2ee46 BRCM Disable ACL Drop counted towards interface RX_DRP counters (#8382)
* BRCM Disable ACL Drop counted towards interface RX_DRP counters
2021-08-25 12:11:23 -07:00
gechiang
6fc279b7c1
Add BRCM SOC Property to not count ACL drops towards interface RX_DRP… (#7945)
* Add BRCM SOC Property to not count ACL drops towards interface RX_DRP counter for 7050CX3 and 7260CX3 DualToR platforms
2021-06-23 18:09:47 -07:00
abdosi
9f4359804e
Updated 7260 64x100 MMU Profile. (#7849)
What I did:

Updated 7260 MMU Profile based on latest MSFT Tier 1 Tomahawk2_MMU_Setting_48x100G_40m_16x100G_300m_v1.0 and
TH2_PGHdrm_MSFT.

How I verify:
Made sure image is up/traffic is flowing/mmu dump looked fine.
SAI qos test need will be updated to support this SKU.
2021-06-15 22:06:48 -07:00
gechiang
6f65b42e4c
7260cx3 DualToR config.bcm support based on DualToR setting in device metadata at boot time (#7168)
* 7260cx3 DualToR config.bcm support based on DualToR setting in device metadata at boot time. 
For HWSKU Arista-7260CX3-C64 the MMU setting SOC for T0/T1 is also combined into the config.bcm.j2 logic so use just one config file and adding delta based on Switch Roles.
2021-03-31 14:23:24 -07:00
Ying Xie
832e63554a
[Arista] add MMU configuration for Arista 7260 C64 (#7027)
Signed-off-by: Ying Xie <ying.xie@microsoft.com>
2021-03-26 11:10:19 -07:00
abdosi
a6a10f05b7
In SAI 3.5 by default we are supporting 256 Group with 64 Memeber each. (#5400)
However in SAI 3.7 default behaviout got changes to 128 Group and 128
    Memeber each.

    This change is to make sure we are using same ECMP Group/Memeber Per
    Group for 3.7 also so that behaviour is consistent.

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
2020-09-22 11:21:12 -07:00
abdosi
b6efb49817
Update bcm soc property bcm_num_cos from 8 to 10 (#5314)
as needed by SAI 3.7 and above. Without this change
Warmboot fails from 3.5 to 3.7 as Braodcoam Datastructure
gets corrupted after warm-boot.

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
2020-09-04 07:40:17 -07:00
Ying Xie
eeeda28434
[bcm config] enable sram scan (#3558)
Per Broadcom's recommendations.

Signed-off-by: Ying Xie <ying.xie@microsoft.com>
2019-10-03 17:02:59 -07:00
zzhiyuan
0ef7dc5d98 [devices]: Update Arista 7260CX3-64 10G SFP tuning (#3151) 2019-07-16 08:42:55 -07:00
Ying Xie
5ab66b191a
[bcm config] remove scache_filename config entry (#2140)
Warm boot is managed by SAI. This configuration entry shouldn't be
included in bcm config.

Signed-off-by: Ying Xie <ying.xie@microsoft.com>
2018-10-12 08:05:38 -07:00
Ying Xie
e7ef637a09
[config-bcm] move broadcom config files to device folder (#1947)
- Future versions of SAI packages will stop carrying these files.

Signed-off-by: Ying Xie <ying.xie@microsoft.com>
2018-08-20 10:11:11 -07:00
Ying Xie
652bc4853c
[Arista7260CX3] add port speed information to port_config.ini (#1412)
* [port_config] add speed information for Arista7260CX3-D108C8

* [port config] add port speed information for Arista-7260CX3-C64
2018-02-27 12:16:15 -08:00
Joe LeVeque
002aabe8ba Change all port_config.ini column headers from 'port' to 'index' (#1001) 2017-09-30 11:02:18 -07:00
Ying Xie
02c125f5ce [Arista-7260CX3] Rename hwSKU Arista-7260CX3-64 to Arista-7260CX3-C64, introducing new hwSKU Arista-7260CX3-D108C8 (#920)
* [Device] Rename SKU Arista-7260CX3-64 to Arista-7260CX3-C64

Renaming to add the speed indication: C64 means 64 100G ports.

renamed:    Arista-7260CX3-64/port_config.ini -> Arista-7260CX3-C64/port_config.ini
renamed:    Arista-7260CX3-64/sai.profile -> Arista-7260CX3-C64/sai.profile

* [Arista-7260cx3] Fix 64x100G port_config.ini

Reorder the port lanes to match the front panel port numbering.

* [Arista-7260CX3] add hwSKU Arista-7260CX3-D108C8

This hwSKU has 108x50G ports and 8x100G ports (2 x 100G ports are unused)
2017-08-25 17:31:19 -07:00