Commit Graph

940 Commits

Author SHA1 Message Date
Kebo Liu
2348f17d64 [Mellanox] Add sensors conf for MSN4600C A1 platform (#9706)
- Why I did it
Add sensor conf for MSN4600C A1 platform

- How I did it
Add a new sensor conf file and relevant scripts to support two different versions of the platform

- How to verify it
Run "sensors" cmd to check the output on the A1 platform to see whether it's as expected.
Signed-off-by: Kebo Liu <kebol@nvidia.com>
2022-01-16 22:44:56 -08:00
Arun Saravanan Balachandran
3c5438de0b DellEMC: S6000, S6100, Z9332f - Update platform.json (#9459)
Why I did it
To include newer Fan LED, thermal capabilities fields in platform.json of DellEMC S6000, S6100, Z9332f platforms.

How I did it
Add the capabilities fields in each platform's respective platform.json.

How to verify it
Ran sonic-mgmt platform api test cases that use capabilities fields and verified that the results are as expected.
2022-01-08 16:36:58 -08:00
Aravind Mani
6c82346c3d [DellEMC] DMA errors are seen when loading bullseye kernel (#9641)
Following errors are seen continuously on SMBus controller when loading bullseye kernel.

[ 273.643046] DMAR: [DMA Write] Request device [00:12.0] PASID ffffffff fault addr 0 [fault reason 05] PTE Write access is not set
[ 273.785784] DMAR: DRHD: handling fault status reg 2
[ 273.844072] DMAR: [DMA Write] Request device [00:12.0] PASID ffffffff fault addr 0 [fault reason 05] PTE Write access is not set
[ 273.986804] DMAR: DRHD: handling fault status reg 2
[ 274.045101] DMAR: [DMA Write] Request device [00:12.0] PASID ffffffff fault addr 0 [fault reason 05] PTE Write access is not set
[ 274.187789] DMAR: DRHD: handling fault status reg 2

root@sonic:~# lspci -s 00:12.0 -vv
00:12.0 System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller - Host (rev 11)

Issue was not seen in buster. 

Modified platform specific installer.conf to turn off io_mmu
2022-01-08 16:36:06 -08:00
Raphael Tryster
dd8fd57bb5 [Mellanox] Add support of SN5600 platform on top of Nvidia ASIC simulation (#9392)
- Why I did it
Add new Spectrum-4 system support SN5600 on top of Nvidia ASIC simulator.

- How I did it
Add all relevant system and simulator SKU.
Updated syseeprom.hex and related directories to reflect Nvidia SN5600 brand name.

- How to verify it
Tested init flow, basic show commands, up interfaces, traffic test.

Signed-off-by: Raphael Tryster <raphaelt@nvidia.com>
2022-01-08 16:35:56 -08:00
Stephen Sun
4ce56e3e29 Fix typo and missing files in SN3800 and SN4600C's buffer templates (#9537)
Why I did it
Fix typo and missing files in SN3800 and SN4600C's buffer templates

How I did it
ingress_lossless_xoff_size => ingress_lossless_pool_xoff add missing files for SN4600C-D100C12S2

How to verify it
Deploy the fix and verify whether the device can be up.

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2022-01-08 16:35:47 -08:00
Junchao-Mellanox
b6fad1b67d [Mellanox] Rename platform x86_64-mlnx_msn4800 to x86_64-nvidia_sn4800 (#9512)
- Why I did it
Rename platform x86_64-mlnx_msn4800 to x86_64-nvidia_msn4800

- How I did it
Rename platform folder as well as all code that reference the platform name

- How to verify it
Manual test
2022-01-08 16:35:30 -08:00
Arun Saravanan Balachandran
a56ecd711d [DellEMC] S6100 - iTCO watchdog support and reboot cause determination changes (#9149)
Why I did it
To support iTCO watchdog using watchdog APIs.
How I did it
Implemented a new watchdog class WatchdogTCO for interfacing with iTCO watchdog.
Updated reboot cause determination logic.
How to verify it
Verified that the watchdog APIs' return values are as expected.
Logs: UT_logs.txt
2021-12-26 20:58:23 -08:00
Stephen Sun
646a886a11 [Mellanox] Adjust buffer parameters with 2km cable supported for 4600C non-generic SKUs (#9215)
- Why I did it
Also recalculated all parameters with the latest algorithm with per-speed peer response time taken into account

- How I did it
Detailed information of each SKU:

C64:
t0: 32 100G downlinks and 32 100G uplinks
t1: 56 100G downlinks and 8 100G uplinks with 2km-cable supported
D112C8: 112 50G downlinks and 8 100G uplinks.
D48C40: 48 50G downlinks, 32 100G downlinks, and 8 100G uplinks
D100C12S2: 4 100G downlinks, 2 10G downlinks, 100 50G downlinks, and 8 100G uplinks
2km cable is supported for C64 on t1 only

- How to verify it
Run regression test (QoS)

Signed-off-by: Stephen Sun <stephens@nvidia.com>
2021-12-26 20:58:16 -08:00
Lior Avramov
2c6af8432b [Mellanox] Add support for SN2201 platform (#9333)
- Why I did it
Add support for SN2201 platform

- How I did it
Add required content for SN2201 platform
Note: still missing kernel driver support for this system. Once all is upstream will be updated as well.

- How to verify it
Install and basic sanity tests including traffic.

Signed-off-by: liora liora@nvidia.com
2021-12-26 20:57:52 -08:00
Alexander Allen
82832375c2 [Mellanox] Add copyright headers to Mellanox-SN4600C-D100C12S2 SKU (#9345)
Missing NVIDIA copyright header from some files.
2021-12-26 20:57:47 -08:00
LuiSzee
1e17d9c5b2 [centec] support v682-48y8c and v682-48x8c (#9349)
Why I did it
Adding platform support for centec v682-48y8c and v682-48x8c.
V682-48y8c switch has 48 SFP+ (1G/10G/25G) ports, 8 QSFP28 (40G/100G) ports on CENTEC TsingMa.MX.
V682-48y8c is different from V682-48y8c_d in that:

transceiver is managed by cpu smbus rather than TsingMa.MX i2c bus.
port led is managed by mcu inside TsingMa.MX.
fan, psu, sensors, leds are managed by cpu smbus other than the cpu board vendor's close sourse driver.
V682-48x8c switch has 48 SFP+ (1G/10G) ports, 8 QSFP28 (40G/100G) ports on CENTEC TsingMa.MX.
CPU used in v682-48y8c and v682-48x8c is Intel(R) Xeon(R) CPU D-1527.

How I did it
Modify related code in platform and device directory.
Upgrade centec sai to v1.9.
upgrade python to python3 and kernel version to 5.0 for V682-48y8c_d.
How to verify it
Build centec amd64 sonic image, verify platform functions (port, sfp, led etc) on centec v682-48y8c and v682-48x8c board.

Co-authored-by: shil <shil@centecnetworks.com>
2021-12-26 20:57:12 -08:00
Vadym Hlushko
678b936a64 [Mellanox] [SN4410] Fixed capability files - port_config.ini, hwsku.json, platform.json (#9538)
- Why I did it
The capability files were incorrect in comparison to the marketing spec of the SN4410 platform.

- How I did it
Aligned the capability files according to the marketing spec.

- How to verify it
Basic manual sanity checks:
1. Check if critical docker containers were UP
2. Check if interfaces were created and were UP
3. Check if interfaces created in the syncd docker container by executing – sx_api_ports_dump.py script
4. Check the logs from the start of the switch – everything was OK
5. Verified the port breakout

Signed-off-by: Vadym Hlushko <vadymh@nvidia.com>
2021-12-26 20:53:39 -08:00
Wirut Getbamrung
b28c800f17
[device/celestica]: add controllable config to platform.json of e1031 (#9183) 2021-11-30 13:59:21 +08:00
Stephen Sun
ba853348d5
[Reclaim buffer] Reclaim unused buffers by applying zero buffer profiles (#8768)
Signed-off-by: Stephen Sun stephens@nvidia.com

Why I did it
Support zero buffer profiles

Add buffer profiles and pool definition for zero buffer profiles
Support applying zero profiles on INACTIVE PORTS
Enable dynamic buffer manager to load zero pools and profiles from a JSON file
Dependency: It depends on Azure/sonic-swss#1910 and submodule advancing PR once the former merged.

How I did it
Add buffer profiles and pool definition for zero buffer profiles

If the buffer model is static:
Apply normal buffer profiles to admin-up ports
Apply zero buffer profiles to admin-down ports
If the buffer model is dynamic:
Apply normal buffer profiles to all ports
buffer manager will take care when a port is shut down
Update buffers_config.j2 to support INACTIVE PORTS by extending the existing macros to generate the various buffer objects, including PGs, queues, ingress/egress profile lists

Originally, all the macros to generate the above buffer objects took active ports only as an argument
Now that buffer items need to be generated on inactive ports as well, an extra argument representing the inactive ports need to be added
To be backward compatible, a new series of macros are introduced to take both active and inactive ports as arguments
The original version (with active ports only) will be checked first. If it is not defined, then the extended version will be called
Only vendors who support zero profiles need to change their buffer templates
Enable buffer manager to load zero pools and profiles from a JSON file:

The JSON file is provided on a per-platform basis
It is copied from platform/<vendor> folder to /usr/share/sonic/temlates folder in compiling time and rendered when the swss container is being created.
To make code clean and reduce redundant code, extract common macros from buffer_defaults_t{0,1}.j2 of all SKUs to two common files:

One in Mellanox-SN2700-D48C8 for single ingress pool mode
The other in ACS-MSN2700 for double ingress pool mode
Those files of all other SKUs will be symbol link to the above files

Update sonic-cfggen test accordingly:

Adjust example output file of JSON template for unit test
Add unit test in for Mellanox's new buffer templates.

How to verify it
Regression test.
Unit test in sonic-cfggen
Run regression test and manually test.
2021-11-29 08:04:01 -08:00
abdosi
5c2423e974
Added 40G {300/40/5m} pg lookup profile for 7260 100G SKU (#9249)
What I did:
Added 40G {300/40/5m} profile for 7260 100G SKU
2021-11-24 18:56:30 -08:00
Guohan Lu
f3faf6111b Revert "[gearbox] provide common gbsyncd.service.j2 to start for platform specific gbsyncd docker (#9286)"
This reverts commit 1d2a11bbb8.
2021-11-19 10:10:55 -08:00
Mykola Gerasymenko
fba7a7f389
[barefoot] add platform.json and hwsku.json for Newport (#8964)
To support dynamic port breakout configurations on Newport platforms.

Signed-off-by: Mykola Gerasymenko <mykolax.gerasymenko@intel.com>
2021-11-18 10:23:46 -08:00
Kostiantyn Yarovyi
dc74fd456a
[Barefoot] [newport] TF2 update switch-tna-sai.conf to use pcie cpu instead of eth cpu (#9260)
Switch hostif frpom Eth to PCIe to improve performance
2021-11-18 10:22:59 -08:00
Junhua Zhai
1d2a11bbb8
[gearbox] provide common gbsyncd.service.j2 to start for platform specific gbsyncd docker (#9286)
Why I did it
Fix #9059. It provides common gbsyncd.service.j2 to start for platform specific gbsyncd docker, which must be named 'gbsyncd'.

How I did it
All of platform specific gbsyncd dockers use a common name 'gbsyncd'
Use a unique systemd service template gbsyncd.service.j2 for gbsyncd docker
2021-11-17 23:49:49 -08:00
pettershao-ragilenetworks
0e0772596e
[ragile] support 32c and 4s platform (#8824)
Signed-off-by: pettershao-ragilenetworks pettershao@ragilenetworks.com

What I did it

Add new platform x86_64-ragile_ra-b6510-32c-r0 (Trident 3)
ASIC Vendor: Broadcom
Switch ASIC: Trident 3
Port Config: 32x100G

Add new platform x86_64-ragile_ra-b6920-4s-r0 (Tomahawk 3)
ASIC Vendor: Broadcom
Switch ASIC: Tomahawk 3
Port Config: 128x100G

-How I did it
Provide device and platform related files.

-How to verify it
show platform fan
show platform ssdhealth
show platform psustatus
show platform summary
show platform syseeprom
show platform temperature
show interface status
2021-11-17 23:49:06 -08:00
Prince Sunny
d6c3a9308c
[broadcom]: td2/td3 change cpu cos num to 10 (#9301)
bcm_num_cos=10 forces SDK default to map internal priority 0-7 to COS 0. It is now consistent with other SKUs.
2021-11-17 20:56:46 -08:00
Marty Y. Lok
0fa687a458
Update Nokia platform IXR7250E device data (#9209)
Add BCM config files for linecard Nokia-IXR7250E-36x400G and Supervisor card Nokia-IXR7250E-SUP.
2021-11-16 17:11:49 -08:00
Kostiantyn Yarovyi
39318f5549
updated platform info for device x86_64-accton_wedge100bf_32x-r0 (#9161)
Why I did it
For sonic-mgmt Platform API tests to have data to compare with

How I did it
updated platform info for device x86_64-accton_wedge100bf_32x-r0

How to verify it
Run sonic-mgmt Platform API tests get_name fo:

chassis
fans
fan_drawers
psus
thermals
2021-11-15 09:41:39 -08:00
Arun Saravanan Balachandran
f4c3aa4a03
DellEMC: S6000, S6100, Z9332f - Add capabilities fields in platform.json (#9168)
Why I did it
To include capabilities fields in platform.json of DellEMC S6000, S6100, Z9332f platforms.

How I did it
Add the capabilities fields in each platform's respective platform.json.

How to verify it
Ran sonic-mgmt platform api test cases that use capabilities fields and verified that the results are as expected.
2021-11-15 08:08:40 -08:00
Aravind Mani
c3c6a178c8 DellEMC bullseye merge (#2)
Upgrade DellEMC platforms to bullseye.
2021-11-10 15:27:22 -08:00
zzhiyuan
989bd9deb0
[Arista] Fix 7060 flex HWSKU SFP ports and Ethernet8/1 (#9173)
* [Arista] Fix 7060 flex HWSKU SFP ports and Ethernet8/1

* [Arista] Fix polarity flips for Arista 7060 on non-leading intfs

Co-authored-by: Zhi Yuan (Carl) Zhao <zyzhao@arista.com>
2021-11-10 08:46:25 -08:00
gechiang
ef457ab13f
Disable ALPM distributed hitbit thread that is used for debug purpose only but interfered with Other functional operations (#9199) 2021-11-09 07:21:57 -08:00
Marty Y. Lok
41756194c7
[Nokia][supervisor]Fixed the asic_type for Nokia IXR7250E supervisor card. (#9139)
The Nokia IXR7250E supervisor card asic_type should be broadcom-dnx instead of broadcom. Fixes #9140
2021-11-03 15:58:44 -07:00
shlomibitton
ac8fd0d5f7
[Mellanox] Fix split configuration for Mellanox SN3800-D112C8 SKU SAI profile for fast-reboot performance (#8897)
- Why I did it
Wrong SKU configuration will lead to longer init flow.
This will affect fast-reboot feature by increasing the traffic downtime.
Since MLNX met the required downtime period with this SKU this bug found with a delay.

- How I did it
Add the required split labels for ports.

- How to verify it
Run fast-reboot with this platform using SN3800-D112C8 SKU.
2021-11-01 18:53:26 +02:00
Qi Luo
7ae638c4c3
[devices]: Add platform_asic files for new platforms (#9078) 2021-10-27 08:58:05 -07:00
dflynn-Nokia
1957558362
[Nokia ixs7215] Add new platform capabilities to platform.json (#9032)
This commit more fully declares the HW capabilities of the Nokia-7215
platform. For example, support for the threshold values associated with each
thermal sensor is described. The intent here is to inform the sonic-mgmt
platform test cases of which HW features are supported.

This commit must align with PR# 4521 within the sonic-mgmt git repo which is
currently under review. Any changes to that PR will need to be reflected in
this commit.
2021-10-27 09:56:46 +08:00
Andrew Sapronov
8eab0e02df
Added Netberg Aurora 715 support (#8604)
* [202012][platform/barefoot] (#8543)

Why I did it
Pcied running by python 2.

How I did it
dropped python2 support and add python3 support for pcied in file docker-pmon.supervisord.conf.j2

How to verify it
docker exec pmon supervisorctl status

* [Netberg][nba715] Initial support for Netberg Aurora 715 switch

Signed-off-by: Andrew Sapronov <andrew.sapronov@gmail.com>

Co-authored-by: Kostiantyn Yarovyi <kostiantynx.yarovyi@intel.com>
2021-10-26 13:04:27 -07:00
LuiSzee
32ad7444f9
[centec] support TM.MX board v682-48y8c_d (#8747)
Adding platform support for centec v682-48y8c_d.

Why I did it
Adding platform support for centec v682-48y8c_d.
This switch has 48 SFP+ (1G/10G/25G) ports, 8 QSFP28 (40G/100G) ports on CENTEC TsingMa.MX.
CPU used in v682-48y8c_d is Intel(R) Xeon(R) CPU D-1527.

How I did it
Modify related code in platform and device directory.
Upgrade sai to v1.8.
fix bug for parallel compile centec platform modules.

How to verify it
Build centec amd64 sonic image, verify platform functions (port, sfp, led etc) on centec v682-48y8c_d board.

Co-authored-by: Shi Lei <shil@centecnetworks.com>
2021-10-26 12:55:24 -07:00
thaj-deen
f01076ea2a
Added Support for Dell EMC S5212f in SONiC (#8678)
Why I did it
Added Support for Dell EMC S5212f platform

How I did it
Implemented the support for Dell EMC S5212f platform

Platform: x86_64-dellemc_s5212f_c3538-r0
HwSKU: DellEMC-S5212f-P-25G
ASIC: broadcom
ASIC Count: 1

How to verify it
Verified the show command outputs
2021-10-26 12:52:03 -07:00
Kebo Liu
9c4a7c2fed
[PMON] Skip chassis_db_init task on Mellanox simx platform (#9017)
Why I did it
"chassis_db_init" task of PMON should be skipped on Mellanox simx platform, since the hardware info which this task is trying to access is not available on simx platforms, It will introduce some error log.

How I did it
Add the capability for "chassis_db_init" in the template for it can be skipped by adding configuration in "pmon_daemon_control.json".
add "skip_chassis_db_init" configuration for simx platforms.
use symbol link for "pmon_daemon_control.json" since all the simx platforms share the same configuration
How to verify it
Build an image and install it on simx platform to check whether "chassis_db_init" task is skipped.

Signed-off-by: Kebo Liu <kebol@nvidia.com>
2021-10-24 09:10:41 -07:00
juntseng62
963217891e
[Alphanetworks] Add new platform SNJ60D0-320F (#8780)
Why I did it
Added Support for Alphanetworks SNJ60D0-320F platform

How I did it
Implemented the support for Alphanetworks SNJ60D0-320F platform

Platform: x86_64-alphanetworks_snj60d0_320f-r0
HwSKU: Alphanetworks-SNJ60D0-320F
ASIC: broadcom
ASIC Count: 1

How to verify it
Verified the show command outputs
2021-10-22 12:37:39 -07:00
pettershao-ragilenetworks
7d981b9315
Update default_sku (#8992)
Why I did it
correct the default-sku type value for ragile platform

How I did it
How to verify it
ragile platform work as excepted.
2021-10-22 07:27:11 -07:00
Santhosh Kumar T
992dc47286
[Dell] S6000 I2C not responding to certain optics (#8736)
* [Dell] S6000 I2C not responding to certain optics

* Revising return states

* Moved lock file from /var/run/platform_cache to /etc/sonic
2021-10-21 18:53:41 +05:30
Arun Saravanan Balachandran
8a2b30702a
DellEMC: Z9332f - Component firmware upgrade platform API implementation (#8973) 2021-10-20 23:04:37 -07:00
Dror Prital
5356244e53
[Mellanox] Add NVIDIA Copyright header to "mellanox" files (#8799)
- Why I did it
Add NVIDIA Copyright header to "mellanox" files

- How I did it
Add NVIDIA Copyright header as a comment for Mellanox files

- How to verify it
Sanity tests and PR checkers.
2021-10-17 19:03:02 +03:00
Marty Y. Lok
c37470544a
[Nokia][port]Modify the Nokia-IXR7250E-36x400G device data (#8875)
-- Based on the new BCM configuration, Modify the portcoreid for the front panel port in the port_config.ini for line card Nokia-IXR7250e-36x400G
 -- Correct the pcie.pmal file
 -- Update the platform_ndk.json with new field "update-asic-pvt"
 -- Add chassis-internal-intf to chassisdb.conf
 -- update platform_reboot

Signed-off-by: mlok <marty.lok@nokia.com>
2021-10-14 13:47:12 -07:00
Ze Gan
f4f6955e43
[devices]: Add new SKU for SONiC VM (#8971)
The default ethernet port naming style is Ethernet0, Ethernet4...Ethernet(i*4) which isn't compatible with EOS's style Ethernet1,Ethernet2...Etherent(i+1)
SONiC-mgmt usually use EOS as neighbor devices. To relieve the compatible issue on SONiC as neighbor devices, This PR introduces a new SKU SONiC VM.

Signed-off-by: Ze Gan <ganze718@gmail.com>
2021-10-14 10:47:40 -07:00
Sudharsan Dhamal Gopalarathnam
434a641026
[DPB][Mellanox]Fixing DPB modes in Mellanox-SN2700-D40C8S8 (#8953)
#### Why I did it
Fixing https://github.com/Azure/sonic-buildimage/issues/8938
Fixing 1x10G DPB mode in Mellanox-SN2700-D40C8S8 SKU as it was causing sonic-cfggen to fail.


#### How I did it
Added correct mode format in hwksu.json in Mellanox-SN2700-D40C8S8  and updated platform.json for the new mode.


#### How to verify it
Using sonic-cfggen verify it works fine
2021-10-12 18:16:13 -07:00
Qi Luo
add9b651b6
Add platform_asic file to each platform folder in sonic-device-data based package (#8542)
#### Why I did it
Add platform_asic file to each platform folder in sonic-device-data package. The file content will be used as the ground truth of mapping from PLATFORM_STRING to switch ASIC family.

One use case of the mapping is to prevent installing a wrong image, which targets for other ASIC platforms. For example, currently we have several ONIE images naming as sonic-*.bin, it's easy to mistakenly install the wrong image. With this mapping built into image, we could fetch the ONIE platform string, and figure out which ASIC it is using, and check we are installing the correct image.

After this PR merged, each platform vendor has to add one mandatory text file  `device/PLATFORM_VENDOR/PLATFORM_STRING/platform_asic`, with the content of the platform's switch ASIC family.

I will update https://github.com/Azure/SONiC/wiki/Porting-Guide after this PR is merged.

You can get a list of the ASIC platforms by `ls -b platform | cat`. Currently the options are
```
barefoot
broadcom
cavium
centec
centec-arm64
generic
innovium
marvell
marvell-arm64
marvell-armhf
mellanox
nephos
p4
vs
```

Also support
```
broadcom-dnx
```

#### How I did it

#### How to verify it
Test one image on DUT. And check the folders under `/usr/share/sonic/device`
2021-10-08 19:27:48 -07:00
Aravind Mani
77b6bc39be
DellEMC: Fix z9332f low power mode issue (#8693) 2021-10-08 11:17:36 +05:30
Wirut Getbamrung
800de696db
[Celestica/sonic_platform]: Fixed failed test cases in Haliburton platform testing (#8815)
* [device/celestica-e1031]: fix apis follow lastest spec
* [device/celestica-e1031]: fix lgtm (#261)
2021-10-08 11:10:05 +08:00
byu343
677f31dac3
[arista] Add asic and phy configs for clearwater2ms (#8174)
* Add ASIC configs for clearwater2ms
* Add 100G gearbox configs for clearwater2ms
2021-10-04 19:11:57 -07:00
Ying Xie
3e397ce8b2
[Nokia 7215] Rename alias column with etpN normination (#8879)
also add hwsku alias Nokia-M0-7215

Signed-off-by: Ying Xie <ying.xie@microsoft.com>
2021-09-30 15:27:54 -07:00
Alexander Allen
57ad1ed680
Add Mellanox-SN4600C-D100C12S2 SKU (#8832)
*Add Mellanox-SN4600C-D100C12S2 SKU
2021-09-29 14:14:11 -07:00
Ashok Daparthi-Dell
6cbdf11e53
SONIC QOS YANG - Remove qos tables field value refernce format (#7752)
Depends on Azure/sonic-utilities#1626
Depends on Azure/sonic-swss#1754

QOS tables in config db used ABNF format i.e "[TABLE_NAME|name] to refer fieldvalue to other qos tables.

Example:
Config DB:
"Ethernet92|3": {
"scheduler": "[SCHEDULER|scheduler.1]",
"wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]"
},
"Ethernet0|0": {
"profile": "[BUFFER_PROFILE|ingress_lossy_profile]"
},
"Ethernet0": {
"dscp_to_tc_map": "[DSCP_TO_TC_MAP|AZURE]",
"pfc_enable": "3,4",
"pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]",
"tc_to_pg_map": "[TC_TO_PRIORITY_GROUP_MAP|AZURE]",
"tc_to_queue_map": "[TC_TO_QUEUE_MAP|AZURE]"
},

This format is not consistent with other DB schema followed in sonic.
And also this reference in DB is not required, This is taken care by YANG "leafref".

Removed this format from all platform files to consistent with other sonic db schema.
Example:
"Ethernet92|3": {
"scheduler": "scheduler.1",
"wred_profile": "AZURE_LOSSLESS"
},

Dependent pull requests:
#7752 - To modify platfrom files
#7281 - Yang model
Azure/sonic-utilities#1626 - DB migration
Azure/sonic-swss#1754 - swss change to remove ABNF format
2021-09-28 09:21:24 -07:00