matthew/sonic-buildimage
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5 Commits

Author SHA1 Message Date
mssonicbld
109275ac2a
Fix missing system_ref_core_clock_khz (#12663) (#13074) 
Add missing system_ref_core_clock_khz in Arista-7800R3A-36D2-C36 and Arista-7800R3A-36D2-C72

Co-authored-by: Maxime Lorrillere <mlorrillere@arista.com>
 2022-12-17 00:26:19 -08:00
mssonicbld
332480f4eb
DNX(J2/J2c/J2c+): Reserve Non-ECMP Fec Resource for Non-ECMP Route Nexthops/NBR Entries (#13076) (#13089) 2022-12-17 15:12:34 +08:00
mssonicbld
fd6523b423
Fix port index for multi-asic (#13042) (#13086) 
Port indexes of front panel ports are not contiguous in multi-asic because we didn't distiguish between
front panel and internal ports, e.g., recycle ports. Fix this by assigning index to front panel port first
and then internal ports.

Co-authored-by: Song Yuan <64041228+ysmanman@users.noreply.github.com>
 2022-12-16 14:56:12 -08:00
kenneth-arista
d410ebe645 Add aggregate port_config.ini for Wolverine SKU (#12951) 
Add missing aggregate port_config.ini needed by sonic-mgmt

Concatenate the ASIC specific port_config.ini from device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/[01] to create the aggregate file.
 2022-12-15 16:38:11 +08:00
Sambath Kumar Balasubramanian
a4d6676f83 Add 36 port 100g sku for x86_64-arista_7800r3a_36d series of linecards. (#11813) 
Add 36 port 100g sku for x86_64-arista_7800r3a_36d series of linecards.
 2022-10-25 20:35:45 +00:00